renesas-scif.S 1.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Renesas SCIF(A) debugging macro include header
  4. *
  5. * Based on r8a7790.S
  6. *
  7. * Copyright (C) 2012-2013 Renesas Electronics Corporation
  8. * Copyright (C) 1994-1999 Russell King
  9. */
  10. #define SCIF_PHYS CONFIG_DEBUG_UART_PHYS
  11. #define SCIF_VIRT ((SCIF_PHYS & 0x00ffffff) | 0xfd000000)
  12. #if defined(CONFIG_DEBUG_R7S9210_SCIF2) || defined(CONFIG_DEBUG_R7S9210_SCIF4)
  13. /* RZ/A2 SCIFA */
  14. #define FTDR 0x06
  15. #define FSR 0x08
  16. #elif CONFIG_DEBUG_UART_PHYS < 0xe6e00000
  17. /* SCIFA */
  18. #define FTDR 0x20
  19. #define FSR 0x14
  20. #else
  21. /* SCIF */
  22. #define FTDR 0x0c
  23. #define FSR 0x10
  24. #endif
  25. #define TDFE (1 << 5)
  26. #define TEND (1 << 6)
  27. .macro addruart, rp, rv, tmp
  28. ldr \rp, =SCIF_PHYS
  29. ldr \rv, =SCIF_VIRT
  30. .endm
  31. .macro waituartcts,rd,rx
  32. .endm
  33. .macro waituarttxrdy, rd, rx
  34. 1001: ldrh \rd, [\rx, #FSR]
  35. tst \rd, #TDFE
  36. beq 1001b
  37. .endm
  38. .macro senduart, rd, rx
  39. strb \rd, [\rx, #FTDR]
  40. ldrh \rd, [\rx, #FSR]
  41. bic \rd, \rd, #TEND
  42. strh \rd, [\rx, #FSR]
  43. .endm
  44. .macro busyuart, rd, rx
  45. 1001: ldrh \rd, [\rx, #FSR]
  46. tst \rd, #TEND
  47. beq 1001b
  48. .endm