vf500.dtsi 1.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright 2013 Freescale Semiconductor, Inc.
  4. #include "vfxxx.dtsi"
  5. #include <dt-bindings/interrupt-controller/arm-gic.h>
  6. / {
  7. #address-cells = <1>;
  8. #size-cells = <1>;
  9. chosen { };
  10. aliases { };
  11. cpus {
  12. #address-cells = <1>;
  13. #size-cells = <0>;
  14. a5_cpu: cpu@0 {
  15. compatible = "arm,cortex-a5";
  16. device_type = "cpu";
  17. reg = <0x0>;
  18. };
  19. };
  20. soc {
  21. bus@40000000 {
  22. intc: interrupt-controller@40003000 {
  23. compatible = "arm,cortex-a9-gic";
  24. #interrupt-cells = <3>;
  25. interrupt-controller;
  26. interrupt-parent = <&intc>;
  27. reg = <0x40003000 0x1000>,
  28. <0x40002100 0x100>;
  29. };
  30. global_timer: timer@40002200 {
  31. compatible = "arm,cortex-a9-global-timer";
  32. reg = <0x40002200 0x20>;
  33. interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
  34. interrupt-parent = <&intc>;
  35. clocks = <&clks VF610_CLK_PLATFORM_BUS>;
  36. };
  37. };
  38. bus@40080000 {
  39. pmu@40089000 {
  40. compatible = "arm,cortex-a5-pmu";
  41. interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
  42. interrupt-affinity = <&a5_cpu>;
  43. reg = <0x40089000 0x1000>;
  44. };
  45. };
  46. };
  47. };
  48. &mscm_ir {
  49. interrupt-parent = <&intc>;
  50. };
  51. &wdoga5 {
  52. status = "okay";
  53. };