versatile-pb.dts 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include "versatile-ab.dts"
  3. / {
  4. model = "ARM Versatile PB";
  5. compatible = "arm,versatile-pb";
  6. amba {
  7. /* The Versatile PB is using more SIC IRQ lines than the AB */
  8. sic: interrupt-controller@10003000 {
  9. clear-mask = <0xffffffff>;
  10. /*
  11. * Valid interrupt lines mask according to
  12. * figure 3-30 page 3-74 of ARM DUI 0224B
  13. */
  14. valid-mask = <0x7fe003ff>;
  15. };
  16. gpio2: gpio@101e6000 {
  17. compatible = "arm,pl061", "arm,primecell";
  18. reg = <0x101e6000 0x1000>;
  19. interrupts = <8>;
  20. gpio-controller;
  21. #gpio-cells = <2>;
  22. interrupt-controller;
  23. #interrupt-cells = <2>;
  24. clocks = <&pclk>;
  25. clock-names = "apb_pclk";
  26. };
  27. gpio3: gpio@101e7000 {
  28. compatible = "arm,pl061", "arm,primecell";
  29. reg = <0x101e7000 0x1000>;
  30. interrupts = <9>;
  31. gpio-controller;
  32. #gpio-cells = <2>;
  33. interrupt-controller;
  34. #interrupt-cells = <2>;
  35. clocks = <&pclk>;
  36. clock-names = "apb_pclk";
  37. };
  38. pci@10001000 {
  39. compatible = "arm,versatile-pci";
  40. device_type = "pci";
  41. reg = <0x10001000 0x1000
  42. 0x41000000 0x10000
  43. 0x42000000 0x100000>;
  44. bus-range = <0 0xff>;
  45. #address-cells = <3>;
  46. #size-cells = <2>;
  47. #interrupt-cells = <1>;
  48. ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
  49. 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
  50. 0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
  51. interrupt-map-mask = <0x1800 0 0 7>;
  52. interrupt-map = <0x1800 0 0 1 &sic 28
  53. 0x1800 0 0 2 &sic 29
  54. 0x1800 0 0 3 &sic 30
  55. 0x1800 0 0 4 &sic 27
  56. 0x1000 0 0 1 &sic 27
  57. 0x1000 0 0 2 &sic 28
  58. 0x1000 0 0 3 &sic 29
  59. 0x1000 0 0 4 &sic 30
  60. 0x0800 0 0 1 &sic 30
  61. 0x0800 0 0 2 &sic 27
  62. 0x0800 0 0 3 &sic 28
  63. 0x0800 0 0 4 &sic 29
  64. 0x0000 0 0 1 &sic 29
  65. 0x0000 0 0 2 &sic 30
  66. 0x0000 0 0 3 &sic 27
  67. 0x0000 0 0 4 &sic 28>;
  68. };
  69. fpga {
  70. mmc@5000 {
  71. /*
  72. * Overrides the interrupt assignment from
  73. * the Versatile AB board file.
  74. */
  75. interrupts-extended = <&sic 22 &sic 23>;
  76. };
  77. uart@9000 {
  78. compatible = "arm,pl011", "arm,primecell";
  79. reg = <0x9000 0x1000>;
  80. interrupt-parent = <&sic>;
  81. interrupts = <6>;
  82. clocks = <&xtal24mhz>, <&pclk>;
  83. clock-names = "uartclk", "apb_pclk";
  84. };
  85. sci@a000 {
  86. compatible = "arm,primecell";
  87. reg = <0xa000 0x1000>;
  88. interrupt-parent = <&sic>;
  89. interrupts = <5>;
  90. clocks = <&xtal24mhz>;
  91. clock-names = "apb_pclk";
  92. };
  93. mmc@b000 {
  94. compatible = "arm,pl180", "arm,primecell";
  95. reg = <0xb000 0x1000>;
  96. interrupt-parent = <&sic>;
  97. interrupts = <1>, <2>;
  98. clocks = <&xtal24mhz>, <&pclk>;
  99. clock-names = "mclk", "apb_pclk";
  100. };
  101. };
  102. };
  103. };