tegra124-nyan.dtsi 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/input/input.h>
  3. #include <dt-bindings/thermal/thermal.h>
  4. #include "tegra124.dtsi"
  5. / {
  6. aliases {
  7. rtc0 = "/i2c@7000d000/pmic@40";
  8. rtc1 = "/rtc@7000e000";
  9. serial0 = &uarta;
  10. };
  11. chosen {
  12. stdout-path = "serial0:115200n8";
  13. };
  14. /*
  15. * Note that recent version of the device tree compiler (starting with
  16. * version 1.4.2) warn about this node containing a reg property, but
  17. * missing a unit-address. However, the bootloader on these Chromebook
  18. * devices relies on the full name of this node to be exactly /memory.
  19. * Adding the unit-address causes the bootloader to create a /memory
  20. * node and write the memory bank configuration to that node, which in
  21. * turn leads the kernel to believe that the device has 2 GiB of
  22. * memory instead of the amount detected by the bootloader.
  23. *
  24. * The name of this node is effectively ABI and must not be changed.
  25. */
  26. memory {
  27. device_type = "memory";
  28. reg = <0x0 0x80000000 0x0 0x80000000>;
  29. };
  30. /delete-node/ memory@80000000;
  31. host1x@50000000 {
  32. hdmi@54280000 {
  33. status = "okay";
  34. vdd-supply = <&vdd_3v3_hdmi>;
  35. pll-supply = <&vdd_hdmi_pll>;
  36. hdmi-supply = <&vdd_5v0_hdmi>;
  37. nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  38. nvidia,hpd-gpio =
  39. <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  40. };
  41. sor@54540000 {
  42. status = "okay";
  43. avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
  44. vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>;
  45. nvidia,dpaux = <&dpaux>;
  46. nvidia,panel = <&panel>;
  47. };
  48. dpaux@545c0000 {
  49. vdd-supply = <&vdd_3v3_panel>;
  50. status = "okay";
  51. };
  52. };
  53. gpu@57000000 {
  54. status = "okay";
  55. vdd-supply = <&vdd_gpu>;
  56. };
  57. serial@70006000 {
  58. /* Debug connector on the bottom of the board near SD card. */
  59. status = "okay";
  60. };
  61. pwm@7000a000 {
  62. status = "okay";
  63. };
  64. i2c@7000c000 {
  65. status = "okay";
  66. clock-frequency = <100000>;
  67. acodec: audio-codec@10 {
  68. compatible = "maxim,max98090";
  69. reg = <0x10>;
  70. interrupt-parent = <&gpio>;
  71. interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
  72. };
  73. tmp451: temperature-sensor@4c {
  74. compatible = "ti,tmp451";
  75. reg = <0x4c>;
  76. interrupt-parent = <&gpio>;
  77. interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
  78. #thermal-sensor-cells = <1>;
  79. };
  80. };
  81. i2c@7000c400 {
  82. status = "okay";
  83. clock-frequency = <100000>;
  84. trackpad@15 {
  85. compatible = "elan,ekth3000";
  86. reg = <0x15>;
  87. interrupt-parent = <&gpio>;
  88. interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
  89. wakeup-source;
  90. };
  91. };
  92. i2c@7000c500 {
  93. status = "okay";
  94. clock-frequency = <400000>;
  95. tpm@20 {
  96. compatible = "infineon,slb9645tt";
  97. reg = <0x20>;
  98. };
  99. };
  100. hdmi_ddc: i2c@7000c700 {
  101. status = "okay";
  102. clock-frequency = <100000>;
  103. };
  104. i2c@7000d000 {
  105. status = "okay";
  106. clock-frequency = <400000>;
  107. pmic: pmic@40 {
  108. compatible = "ams,as3722";
  109. reg = <0x40>;
  110. interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
  111. ams,system-power-controller;
  112. #interrupt-cells = <2>;
  113. interrupt-controller;
  114. gpio-controller;
  115. #gpio-cells = <2>;
  116. pinctrl-names = "default";
  117. pinctrl-0 = <&as3722_default>;
  118. as3722_default: pinmux {
  119. gpio0 {
  120. pins = "gpio0";
  121. function = "gpio";
  122. bias-pull-down;
  123. };
  124. gpio1 {
  125. pins = "gpio1";
  126. function = "gpio";
  127. bias-pull-up;
  128. };
  129. gpio2_4_7 {
  130. pins = "gpio2", "gpio4", "gpio7";
  131. function = "gpio";
  132. bias-pull-up;
  133. };
  134. gpio3_6 {
  135. pins = "gpio3", "gpio6";
  136. bias-high-impedance;
  137. };
  138. gpio5 {
  139. pins = "gpio5";
  140. function = "clk32k-out";
  141. bias-pull-down;
  142. };
  143. };
  144. regulators {
  145. vsup-sd2-supply = <&vdd_5v0_sys>;
  146. vsup-sd3-supply = <&vdd_5v0_sys>;
  147. vsup-sd4-supply = <&vdd_5v0_sys>;
  148. vsup-sd5-supply = <&vdd_5v0_sys>;
  149. vin-ldo0-supply = <&vdd_1v35_lp0>;
  150. vin-ldo1-6-supply = <&vdd_3v3_run>;
  151. vin-ldo2-5-7-supply = <&vddio_1v8>;
  152. vin-ldo3-4-supply = <&vdd_3v3_sys>;
  153. vin-ldo9-10-supply = <&vdd_5v0_sys>;
  154. vin-ldo11-supply = <&vdd_3v3_run>;
  155. vdd_cpu: sd0 {
  156. regulator-name = "+VDD_CPU_AP";
  157. regulator-min-microvolt = <700000>;
  158. regulator-max-microvolt = <1350000>;
  159. regulator-min-microamp = <3500000>;
  160. regulator-max-microamp = <3500000>;
  161. regulator-always-on;
  162. regulator-boot-on;
  163. ams,ext-control = <2>;
  164. };
  165. sd1 {
  166. regulator-name = "+VDD_CORE";
  167. regulator-min-microvolt = <700000>;
  168. regulator-max-microvolt = <1350000>;
  169. regulator-min-microamp = <2500000>;
  170. regulator-max-microamp = <4000000>;
  171. regulator-always-on;
  172. regulator-boot-on;
  173. ams,ext-control = <1>;
  174. };
  175. vdd_1v35_lp0: sd2 {
  176. regulator-name = "+1.35V_LP0(sd2)";
  177. regulator-min-microvolt = <1350000>;
  178. regulator-max-microvolt = <1350000>;
  179. regulator-always-on;
  180. regulator-boot-on;
  181. };
  182. sd3 {
  183. regulator-name = "+1.35V_LP0(sd3)";
  184. regulator-min-microvolt = <1350000>;
  185. regulator-max-microvolt = <1350000>;
  186. regulator-always-on;
  187. regulator-boot-on;
  188. };
  189. vdd_1v05_run: sd4 {
  190. regulator-name = "+1.05V_RUN";
  191. regulator-min-microvolt = <1050000>;
  192. regulator-max-microvolt = <1050000>;
  193. };
  194. vddio_1v8: sd5 {
  195. regulator-name = "+1.8V_VDDIO";
  196. regulator-min-microvolt = <1800000>;
  197. regulator-max-microvolt = <1800000>;
  198. regulator-always-on;
  199. };
  200. vdd_gpu: sd6 {
  201. regulator-name = "+VDD_GPU_AP";
  202. regulator-min-microvolt = <650000>;
  203. regulator-max-microvolt = <1200000>;
  204. regulator-min-microamp = <3500000>;
  205. regulator-max-microamp = <3500000>;
  206. regulator-boot-on;
  207. regulator-always-on;
  208. };
  209. avdd_1v05_run: ldo0 {
  210. regulator-name = "+1.05V_RUN_AVDD";
  211. regulator-min-microvolt = <1050000>;
  212. regulator-max-microvolt = <1050000>;
  213. regulator-boot-on;
  214. regulator-always-on;
  215. ams,ext-control = <1>;
  216. };
  217. ldo1 {
  218. regulator-name = "+1.8V_RUN_CAM";
  219. regulator-min-microvolt = <1800000>;
  220. regulator-max-microvolt = <1800000>;
  221. };
  222. ldo2 {
  223. regulator-name = "+1.2V_GEN_AVDD";
  224. regulator-min-microvolt = <1200000>;
  225. regulator-max-microvolt = <1200000>;
  226. regulator-boot-on;
  227. regulator-always-on;
  228. };
  229. ldo3 {
  230. regulator-name = "+1.00V_LP0_VDD_RTC";
  231. regulator-min-microvolt = <1000000>;
  232. regulator-max-microvolt = <1000000>;
  233. regulator-boot-on;
  234. regulator-always-on;
  235. ams,enable-tracking;
  236. };
  237. vdd_run_cam: ldo4 {
  238. regulator-name = "+3.3V_RUN_CAM";
  239. regulator-min-microvolt = <2800000>;
  240. regulator-max-microvolt = <2800000>;
  241. };
  242. ldo5 {
  243. regulator-name = "+1.2V_RUN_CAM_FRONT";
  244. regulator-min-microvolt = <1200000>;
  245. regulator-max-microvolt = <1200000>;
  246. };
  247. vddio_sdmmc3: ldo6 {
  248. regulator-name = "+VDDIO_SDMMC3";
  249. regulator-min-microvolt = <1800000>;
  250. regulator-max-microvolt = <3300000>;
  251. };
  252. ldo7 {
  253. regulator-name = "+1.05V_RUN_CAM_REAR";
  254. regulator-min-microvolt = <1050000>;
  255. regulator-max-microvolt = <1050000>;
  256. };
  257. ldo9 {
  258. regulator-name = "+2.8V_RUN_TOUCH";
  259. regulator-min-microvolt = <2800000>;
  260. regulator-max-microvolt = <2800000>;
  261. };
  262. ldo10 {
  263. regulator-name = "+2.8V_RUN_CAM_AF";
  264. regulator-min-microvolt = <2800000>;
  265. regulator-max-microvolt = <2800000>;
  266. };
  267. ldo11 {
  268. regulator-name = "+1.8V_RUN_VPP_FUSE";
  269. regulator-min-microvolt = <1800000>;
  270. regulator-max-microvolt = <1800000>;
  271. };
  272. };
  273. };
  274. };
  275. spi@7000d400 {
  276. status = "okay";
  277. cros_ec: cros-ec@0 {
  278. compatible = "google,cros-ec-spi";
  279. spi-max-frequency = <3000000>;
  280. interrupt-parent = <&gpio>;
  281. interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
  282. reg = <0>;
  283. google,cros-ec-spi-msg-delay = <2000>;
  284. i2c-tunnel {
  285. compatible = "google,cros-ec-i2c-tunnel";
  286. #address-cells = <1>;
  287. #size-cells = <0>;
  288. google,remote-bus = <0>;
  289. charger: bq24735@9 {
  290. compatible = "ti,bq24735";
  291. reg = <0x9>;
  292. interrupt-parent = <&gpio>;
  293. interrupts = <TEGRA_GPIO(J, 0)
  294. IRQ_TYPE_EDGE_BOTH>;
  295. ti,ac-detect-gpios = <&gpio
  296. TEGRA_GPIO(J, 0)
  297. GPIO_ACTIVE_HIGH>;
  298. ti,external-control;
  299. };
  300. battery: sbs-battery@b {
  301. compatible = "sbs,sbs-battery";
  302. reg = <0xb>;
  303. sbs,i2c-retry-count = <2>;
  304. sbs,poll-retry-count = <10>;
  305. power-supplies = <&charger>;
  306. };
  307. };
  308. };
  309. };
  310. spi@7000da00 {
  311. status = "okay";
  312. spi-max-frequency = <25000000>;
  313. flash@0 {
  314. compatible = "winbond,w25q32dw", "jedec,spi-nor";
  315. spi-max-frequency = <25000000>;
  316. reg = <0>;
  317. };
  318. };
  319. pmc@7000e400 {
  320. nvidia,invert-interrupt;
  321. nvidia,suspend-mode = <0>;
  322. nvidia,cpu-pwr-good-time = <500>;
  323. nvidia,cpu-pwr-off-time = <300>;
  324. nvidia,core-pwr-good-time = <641 3845>;
  325. nvidia,core-pwr-off-time = <61036>;
  326. nvidia,core-power-req-active-high;
  327. nvidia,sys-clock-req-active-high;
  328. };
  329. cec@70015000 {
  330. status = "okay";
  331. };
  332. hda@70030000 {
  333. status = "okay";
  334. };
  335. usb@70090000 {
  336. phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
  337. <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
  338. <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
  339. <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
  340. <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
  341. phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
  342. avddio-pex-supply = <&vdd_1v05_run>;
  343. dvddio-pex-supply = <&vdd_1v05_run>;
  344. avdd-usb-supply = <&vdd_3v3_lp0>;
  345. avdd-pll-utmip-supply = <&vddio_1v8>;
  346. avdd-pll-erefe-supply = <&avdd_1v05_run>;
  347. avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
  348. hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
  349. hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
  350. status = "okay";
  351. };
  352. padctl@7009f000 {
  353. status = "okay";
  354. avdd-pll-utmip-supply = <&vddio_1v8>;
  355. avdd-pll-erefe-supply = <&avdd_1v05_run>;
  356. avdd-pex-pll-supply = <&vdd_1v05_run>;
  357. hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
  358. pads {
  359. usb2 {
  360. status = "okay";
  361. lanes {
  362. usb2-0 {
  363. nvidia,function = "xusb";
  364. status = "okay";
  365. };
  366. usb2-1 {
  367. nvidia,function = "xusb";
  368. status = "okay";
  369. };
  370. usb2-2 {
  371. nvidia,function = "xusb";
  372. status = "okay";
  373. };
  374. };
  375. };
  376. pcie {
  377. status = "okay";
  378. lanes {
  379. pcie-0 {
  380. nvidia,function = "usb3-ss";
  381. status = "okay";
  382. };
  383. pcie-1 {
  384. nvidia,function = "usb3-ss";
  385. status = "okay";
  386. };
  387. };
  388. };
  389. };
  390. ports {
  391. usb2-0 {
  392. vbus-supply = <&vdd_usb1_vbus>;
  393. status = "okay";
  394. mode = "otg";
  395. usb-role-switch;
  396. };
  397. usb2-1 {
  398. vbus-supply = <&vdd_run_cam>;
  399. status = "okay";
  400. mode = "host";
  401. };
  402. usb2-2 {
  403. vbus-supply = <&vdd_usb3_vbus>;
  404. status = "okay";
  405. mode = "host";
  406. };
  407. usb3-0 {
  408. nvidia,usb2-companion = <0>;
  409. status = "okay";
  410. };
  411. usb3-1 {
  412. nvidia,usb2-companion = <1>;
  413. status = "okay";
  414. };
  415. };
  416. };
  417. sdhci0_pwrseq: sdhci0_pwrseq {
  418. compatible = "mmc-pwrseq-simple";
  419. reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
  420. };
  421. mmc@700b0000 { /* WiFi/BT on this bus */
  422. status = "okay";
  423. bus-width = <4>;
  424. no-1-8-v;
  425. non-removable;
  426. mmc-pwrseq = <&sdhci0_pwrseq>;
  427. vmmc-supply = <&vdd_3v3_lp0>;
  428. vqmmc-supply = <&vddio_1v8>;
  429. keep-power-in-suspend;
  430. };
  431. mmc@700b0400 { /* SD Card on this bus */
  432. status = "okay";
  433. cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
  434. power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
  435. bus-width = <4>;
  436. no-1-8-v;
  437. vqmmc-supply = <&vddio_sdmmc3>;
  438. };
  439. mmc@700b0600 { /* eMMC on this bus */
  440. status = "okay";
  441. bus-width = <8>;
  442. no-1-8-v;
  443. non-removable;
  444. };
  445. /* CPU DFLL clock */
  446. clock@70110000 {
  447. status = "okay";
  448. vdd-cpu-supply = <&vdd_cpu>;
  449. nvidia,i2c-fs-rate = <400000>;
  450. };
  451. ahub@70300000 {
  452. i2s@70301100 {
  453. status = "okay";
  454. };
  455. };
  456. backlight: backlight {
  457. compatible = "pwm-backlight";
  458. enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
  459. power-supply = <&vdd_led>;
  460. pwms = <&pwm 1 1000000>;
  461. default-brightness-level = <224>;
  462. brightness-levels =
  463. < 0 1 2 3 4 5 6 7
  464. 8 9 10 11 12 13 14 15
  465. 16 17 18 19 20 21 22 23
  466. 24 25 26 27 28 29 30 31
  467. 32 33 34 35 36 37 38 39
  468. 40 41 42 43 44 45 46 47
  469. 48 49 50 51 52 53 54 55
  470. 56 57 58 59 60 61 62 63
  471. 64 65 66 67 68 69 70 71
  472. 72 73 74 75 76 77 78 79
  473. 80 81 82 83 84 85 86 87
  474. 88 89 90 91 92 93 94 95
  475. 96 97 98 99 100 101 102 103
  476. 104 105 106 107 108 109 110 111
  477. 112 113 114 115 116 117 118 119
  478. 120 121 122 123 124 125 126 127
  479. 128 129 130 131 132 133 134 135
  480. 136 137 138 139 140 141 142 143
  481. 144 145 146 147 148 149 150 151
  482. 152 153 154 155 156 157 158 159
  483. 160 161 162 163 164 165 166 167
  484. 168 169 170 171 172 173 174 175
  485. 176 177 178 179 180 181 182 183
  486. 184 185 186 187 188 189 190 191
  487. 192 193 194 195 196 197 198 199
  488. 200 201 202 203 204 205 206 207
  489. 208 209 210 211 212 213 214 215
  490. 216 217 218 219 220 221 222 223
  491. 224 225 226 227 228 229 230 231
  492. 232 233 234 235 236 237 238 239
  493. 240 241 242 243 244 245 246 247
  494. 248 249 250 251 252 253 254 255
  495. 256>;
  496. };
  497. clk32k_in: clock-32k {
  498. compatible = "fixed-clock";
  499. clock-frequency = <32768>;
  500. #clock-cells = <0>;
  501. };
  502. cpus {
  503. cpu@0 {
  504. vdd-cpu-supply = <&vdd_cpu>;
  505. };
  506. };
  507. gpio-keys {
  508. compatible = "gpio-keys";
  509. switch-lid {
  510. label = "Lid";
  511. gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
  512. linux,input-type = <5>;
  513. linux,code = <KEY_RESERVED>;
  514. debounce-interval = <1>;
  515. wakeup-source;
  516. };
  517. key-power {
  518. label = "Power";
  519. gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
  520. linux,code = <KEY_POWER>;
  521. debounce-interval = <30>;
  522. wakeup-source;
  523. };
  524. };
  525. vdd_mux: regulator-mux {
  526. compatible = "regulator-fixed";
  527. regulator-name = "+VDD_MUX";
  528. regulator-min-microvolt = <12000000>;
  529. regulator-max-microvolt = <12000000>;
  530. regulator-always-on;
  531. regulator-boot-on;
  532. };
  533. vdd_5v0_sys: regulator-5v0sys {
  534. compatible = "regulator-fixed";
  535. regulator-name = "+5V_SYS";
  536. regulator-min-microvolt = <5000000>;
  537. regulator-max-microvolt = <5000000>;
  538. regulator-always-on;
  539. regulator-boot-on;
  540. vin-supply = <&vdd_mux>;
  541. };
  542. vdd_3v3_sys: regulator-3v3sys {
  543. compatible = "regulator-fixed";
  544. regulator-name = "+3.3V_SYS";
  545. regulator-min-microvolt = <3300000>;
  546. regulator-max-microvolt = <3300000>;
  547. regulator-always-on;
  548. regulator-boot-on;
  549. vin-supply = <&vdd_mux>;
  550. };
  551. vdd_3v3_run: regulator-3v3run {
  552. compatible = "regulator-fixed";
  553. regulator-name = "+3.3V_RUN";
  554. regulator-min-microvolt = <3300000>;
  555. regulator-max-microvolt = <3300000>;
  556. regulator-always-on;
  557. regulator-boot-on;
  558. gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
  559. enable-active-high;
  560. vin-supply = <&vdd_3v3_sys>;
  561. };
  562. vdd_3v3_hdmi: regulator-3v3hdmi {
  563. compatible = "regulator-fixed";
  564. regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
  565. regulator-min-microvolt = <3300000>;
  566. regulator-max-microvolt = <3300000>;
  567. vin-supply = <&vdd_3v3_run>;
  568. };
  569. vdd_led: regulator-led {
  570. compatible = "regulator-fixed";
  571. regulator-name = "+VDD_LED";
  572. gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
  573. enable-active-high;
  574. vin-supply = <&vdd_mux>;
  575. };
  576. vdd_5v0_ts: regulator-ts {
  577. compatible = "regulator-fixed";
  578. regulator-name = "+5V_VDD_TS_SW";
  579. regulator-min-microvolt = <5000000>;
  580. regulator-max-microvolt = <5000000>;
  581. regulator-boot-on;
  582. gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
  583. enable-active-high;
  584. vin-supply = <&vdd_5v0_sys>;
  585. };
  586. vdd_usb1_vbus: regulator-usb1 {
  587. compatible = "regulator-fixed";
  588. regulator-name = "+5V_USB_HS";
  589. regulator-min-microvolt = <5000000>;
  590. regulator-max-microvolt = <5000000>;
  591. gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
  592. enable-active-high;
  593. gpio-open-drain;
  594. vin-supply = <&vdd_5v0_sys>;
  595. };
  596. vdd_usb3_vbus: regulator-usb3 {
  597. compatible = "regulator-fixed";
  598. regulator-name = "+5V_USB_SS";
  599. regulator-min-microvolt = <5000000>;
  600. regulator-max-microvolt = <5000000>;
  601. gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
  602. enable-active-high;
  603. gpio-open-drain;
  604. vin-supply = <&vdd_5v0_sys>;
  605. };
  606. vdd_3v3_panel: regulator-panel {
  607. compatible = "regulator-fixed";
  608. regulator-name = "+3.3V_PANEL";
  609. regulator-min-microvolt = <3300000>;
  610. regulator-max-microvolt = <3300000>;
  611. gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
  612. enable-active-high;
  613. vin-supply = <&vdd_3v3_run>;
  614. };
  615. vdd_3v3_lp0: regulator-lp0 {
  616. compatible = "regulator-fixed";
  617. regulator-name = "+3.3V_LP0";
  618. regulator-min-microvolt = <3300000>;
  619. regulator-max-microvolt = <3300000>;
  620. /*
  621. * TODO: find a way to wire this up with the USB EHCI
  622. * controllers so that it can be enabled on demand.
  623. */
  624. regulator-always-on;
  625. gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
  626. enable-active-high;
  627. vin-supply = <&vdd_3v3_sys>;
  628. };
  629. vdd_hdmi_pll: regulator-hdmipll {
  630. compatible = "regulator-fixed";
  631. regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
  632. regulator-min-microvolt = <1050000>;
  633. regulator-max-microvolt = <1050000>;
  634. gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
  635. vin-supply = <&vdd_1v05_run>;
  636. };
  637. vdd_5v0_hdmi: regulator-hdmicon {
  638. compatible = "regulator-fixed";
  639. regulator-name = "+5V_HDMI_CON";
  640. regulator-min-microvolt = <5000000>;
  641. regulator-max-microvolt = <5000000>;
  642. gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
  643. enable-active-high;
  644. vin-supply = <&vdd_5v0_sys>;
  645. };
  646. sound {
  647. nvidia,audio-routing =
  648. "Headphones", "HPR",
  649. "Headphones", "HPL",
  650. "Speakers", "SPKR",
  651. "Speakers", "SPKL",
  652. "Mic Jack", "MICBIAS",
  653. "DMICL", "Int Mic",
  654. "DMICR", "Int Mic",
  655. "IN34", "Mic Jack";
  656. nvidia,i2s-controller = <&tegra_i2s1>;
  657. nvidia,audio-codec = <&acodec>;
  658. clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
  659. <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
  660. <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
  661. clock-names = "pll_a", "pll_a_out0", "mclk";
  662. assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
  663. <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
  664. assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
  665. <&tegra_car TEGRA124_CLK_EXTERN1>;
  666. nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>;
  667. nvidia,mic-det-gpios =
  668. <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
  669. };
  670. gpio-restart {
  671. compatible = "gpio-restart";
  672. gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
  673. priority = <200>;
  674. };
  675. cpus {
  676. cpu0: cpu@0 {
  677. #cooling-cells = <2>;
  678. };
  679. cpu1: cpu@1 {
  680. #cooling-cells = <2>;
  681. };
  682. cpu2: cpu@2 {
  683. #cooling-cells = <2>;
  684. };
  685. cpu3: cpu@3 {
  686. #cooling-cells = <2>;
  687. };
  688. };
  689. thermal-zones {
  690. cpu-skin-thermal {
  691. polling-delay-passive = <1000>; /* milliseconds */
  692. polling-delay = <5000>; /* milliseconds */
  693. thermal-sensors = <&tmp451 0>;
  694. trips {
  695. cpu_passive_trip: cpu-alert0 {
  696. /* throttle at 70C until temperature drops to 69.8C */
  697. temperature = <70000>;
  698. hysteresis = <200>;
  699. type = "passive";
  700. };
  701. };
  702. cooling-maps {
  703. map0 {
  704. trip = <&cpu_passive_trip>;
  705. cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  706. <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  707. <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
  708. <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
  709. };
  710. };
  711. };
  712. };
  713. };
  714. #include "cros-ec-keyboard.dtsi"