stm32mp15xx-dhcom-som.dtsi 11 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
  2. /*
  3. * Copyright (C) 2019-2020 Marek Vasut <[email protected]>
  4. */
  5. #include "stm32mp15-pinctrl.dtsi"
  6. #include "stm32mp15xxaa-pinctrl.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/mfd/st,stpmic1.h>
  9. / {
  10. aliases {
  11. ethernet0 = &ethernet0;
  12. ethernet1 = &ksz8851;
  13. rtc0 = &hwrtc;
  14. rtc1 = &rtc;
  15. };
  16. memory@c0000000 {
  17. device_type = "memory";
  18. reg = <0xC0000000 0x40000000>;
  19. };
  20. reserved-memory {
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. ranges;
  24. mcuram2: mcuram2@10000000 {
  25. compatible = "shared-dma-pool";
  26. reg = <0x10000000 0x40000>;
  27. no-map;
  28. };
  29. vdev0vring0: vdev0vring0@10040000 {
  30. compatible = "shared-dma-pool";
  31. reg = <0x10040000 0x1000>;
  32. no-map;
  33. };
  34. vdev0vring1: vdev0vring1@10041000 {
  35. compatible = "shared-dma-pool";
  36. reg = <0x10041000 0x1000>;
  37. no-map;
  38. };
  39. vdev0buffer: vdev0buffer@10042000 {
  40. compatible = "shared-dma-pool";
  41. reg = <0x10042000 0x4000>;
  42. no-map;
  43. };
  44. mcuram: mcuram@30000000 {
  45. compatible = "shared-dma-pool";
  46. reg = <0x30000000 0x40000>;
  47. no-map;
  48. };
  49. retram: retram@38000000 {
  50. compatible = "shared-dma-pool";
  51. reg = <0x38000000 0x10000>;
  52. no-map;
  53. };
  54. };
  55. ethernet_vio: vioregulator {
  56. compatible = "regulator-fixed";
  57. regulator-name = "vio";
  58. regulator-min-microvolt = <3300000>;
  59. regulator-max-microvolt = <3300000>;
  60. gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
  61. regulator-always-on;
  62. regulator-boot-on;
  63. vin-supply = <&vdd>;
  64. };
  65. };
  66. &adc {
  67. vdd-supply = <&vdd>;
  68. vdda-supply = <&vdda>;
  69. vref-supply = <&vdda>;
  70. status = "okay";
  71. };
  72. &adc1 {
  73. channel@0 {
  74. reg = <0>;
  75. st,min-sample-time-ns = <5000>;
  76. };
  77. };
  78. &adc2 {
  79. channel@1 {
  80. reg = <1>;
  81. st,min-sample-time-ns = <5000>;
  82. };
  83. };
  84. &crc1 {
  85. status = "okay";
  86. };
  87. &dac {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
  90. vref-supply = <&vdda>;
  91. status = "okay";
  92. dac1: dac@1 {
  93. status = "okay";
  94. };
  95. dac2: dac@2 {
  96. status = "okay";
  97. };
  98. };
  99. &dts {
  100. status = "okay";
  101. };
  102. &ethernet0 {
  103. status = "okay";
  104. pinctrl-0 = <&ethernet0_rmii_pins_c &mco2_pins_a>;
  105. pinctrl-1 = <&ethernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
  106. pinctrl-names = "default", "sleep";
  107. phy-mode = "rmii";
  108. max-speed = <100>;
  109. phy-handle = <&phy0>;
  110. mdio {
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. compatible = "snps,dwmac-mdio";
  114. phy0: ethernet-phy@1 {
  115. reg = <1>;
  116. /* LAN8710Ai */
  117. compatible = "ethernet-phy-id0007.c0f0",
  118. "ethernet-phy-ieee802.3-c22";
  119. clocks = <&rcc CK_MCO2>;
  120. reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
  121. reset-assert-us = <500>;
  122. reset-deassert-us = <500>;
  123. smsc,disable-energy-detect;
  124. interrupt-parent = <&gpioi>;
  125. interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  126. };
  127. };
  128. };
  129. &fmc {
  130. pinctrl-names = "default", "sleep";
  131. pinctrl-0 = <&fmc_pins_b>;
  132. pinctrl-1 = <&fmc_sleep_pins_b>;
  133. status = "okay";
  134. ksz8851: ethernet@1,0 {
  135. compatible = "micrel,ks8851-mll";
  136. reg = <1 0x0 0x2>, <1 0x2 0x20000>;
  137. interrupt-parent = <&gpioc>;
  138. interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  139. bank-width = <2>;
  140. /* Timing values are in nS */
  141. st,fmc2-ebi-cs-mux-enable;
  142. st,fmc2-ebi-cs-transaction-type = <4>;
  143. st,fmc2-ebi-cs-buswidth = <16>;
  144. st,fmc2-ebi-cs-address-setup-ns = <5>;
  145. st,fmc2-ebi-cs-address-hold-ns = <5>;
  146. st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
  147. st,fmc2-ebi-cs-data-setup-ns = <45>;
  148. st,fmc2-ebi-cs-data-hold-ns = <1>;
  149. st,fmc2-ebi-cs-write-address-setup-ns = <5>;
  150. st,fmc2-ebi-cs-write-address-hold-ns = <5>;
  151. st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
  152. st,fmc2-ebi-cs-write-data-setup-ns = <45>;
  153. st,fmc2-ebi-cs-write-data-hold-ns = <1>;
  154. };
  155. };
  156. &gpioa {
  157. gpio-line-names = "", "", "", "",
  158. "", "", "DHCOM-K", "",
  159. "", "", "", "",
  160. "", "", "", "";
  161. };
  162. &gpiob {
  163. gpio-line-names = "", "", "", "",
  164. "", "", "", "",
  165. "DHCOM-Q", "", "", "",
  166. "", "", "", "";
  167. };
  168. &gpioc {
  169. gpio-line-names = "", "", "", "",
  170. "", "", "DHCOM-E", "",
  171. "", "", "", "",
  172. "", "", "", "";
  173. };
  174. &gpiod {
  175. gpio-line-names = "", "", "", "",
  176. "", "", "DHCOM-B", "",
  177. "", "", "", "DHCOM-F",
  178. "DHCOM-D", "", "", "";
  179. };
  180. &gpioe {
  181. gpio-line-names = "", "", "", "",
  182. "", "", "DHCOM-P", "",
  183. "", "", "", "",
  184. "", "", "", "";
  185. };
  186. &gpiof {
  187. gpio-line-names = "", "", "", "DHCOM-A",
  188. "", "", "", "",
  189. "", "", "", "",
  190. "", "", "", "";
  191. };
  192. &gpiog {
  193. gpio-line-names = "DHCOM-C", "", "", "",
  194. "", "", "", "",
  195. "DHCOM-L", "", "", "",
  196. "", "", "", "";
  197. };
  198. &gpioh {
  199. gpio-line-names = "", "", "", "",
  200. "", "", "", "DHCOM-N",
  201. "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
  202. "DHCOM-T", "", "DHCOM-S", "";
  203. };
  204. &gpioi {
  205. gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
  206. "DHCOM-R", "DHCOM-M", "", "",
  207. "", "", "", "",
  208. "", "", "", "";
  209. };
  210. &i2c4 {
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&i2c4_pins_a>;
  213. i2c-scl-rising-time-ns = <185>;
  214. i2c-scl-falling-time-ns = <20>;
  215. status = "okay";
  216. /* spare dmas for other usage */
  217. /delete-property/dmas;
  218. /delete-property/dma-names;
  219. hwrtc: rtc@32 {
  220. compatible = "microcrystal,rv8803";
  221. reg = <0x32>;
  222. };
  223. pmic: stpmic@33 {
  224. compatible = "st,stpmic1";
  225. reg = <0x33>;
  226. interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
  227. interrupt-controller;
  228. #interrupt-cells = <2>;
  229. status = "okay";
  230. regulators {
  231. compatible = "st,stpmic1-regulators";
  232. ldo1-supply = <&v3v3>;
  233. ldo2-supply = <&v3v3>;
  234. ldo3-supply = <&vdd_ddr>;
  235. ldo5-supply = <&v3v3>;
  236. ldo6-supply = <&v3v3>;
  237. pwr_sw1-supply = <&bst_out>;
  238. pwr_sw2-supply = <&bst_out>;
  239. vddcore: buck1 {
  240. regulator-name = "vddcore";
  241. regulator-min-microvolt = <800000>;
  242. regulator-max-microvolt = <1350000>;
  243. regulator-always-on;
  244. regulator-initial-mode = <0>;
  245. regulator-over-current-protection;
  246. };
  247. vdd_ddr: buck2 {
  248. regulator-name = "vdd_ddr";
  249. regulator-min-microvolt = <1350000>;
  250. regulator-max-microvolt = <1350000>;
  251. regulator-always-on;
  252. regulator-initial-mode = <0>;
  253. regulator-over-current-protection;
  254. };
  255. vdd: buck3 {
  256. regulator-name = "vdd";
  257. regulator-min-microvolt = <3300000>;
  258. regulator-max-microvolt = <3300000>;
  259. regulator-always-on;
  260. st,mask-reset;
  261. regulator-initial-mode = <0>;
  262. regulator-over-current-protection;
  263. };
  264. v3v3: buck4 {
  265. regulator-name = "v3v3";
  266. regulator-min-microvolt = <3300000>;
  267. regulator-max-microvolt = <3300000>;
  268. regulator-always-on;
  269. regulator-over-current-protection;
  270. regulator-initial-mode = <0>;
  271. };
  272. vdda: ldo1 {
  273. regulator-name = "vdda";
  274. regulator-always-on;
  275. regulator-min-microvolt = <2900000>;
  276. regulator-max-microvolt = <2900000>;
  277. interrupts = <IT_CURLIM_LDO1 0>;
  278. };
  279. v2v8: ldo2 {
  280. regulator-name = "v2v8";
  281. regulator-min-microvolt = <2800000>;
  282. regulator-max-microvolt = <2800000>;
  283. interrupts = <IT_CURLIM_LDO2 0>;
  284. };
  285. vtt_ddr: ldo3 {
  286. regulator-name = "vtt_ddr";
  287. regulator-min-microvolt = <500000>;
  288. regulator-max-microvolt = <750000>;
  289. regulator-always-on;
  290. regulator-over-current-protection;
  291. };
  292. vdd_usb: ldo4 {
  293. regulator-name = "vdd_usb";
  294. interrupts = <IT_CURLIM_LDO4 0>;
  295. };
  296. vdd_sd: ldo5 {
  297. regulator-name = "vdd_sd";
  298. regulator-min-microvolt = <2900000>;
  299. regulator-max-microvolt = <2900000>;
  300. interrupts = <IT_CURLIM_LDO5 0>;
  301. regulator-boot-on;
  302. };
  303. v1v8: ldo6 {
  304. regulator-name = "v1v8";
  305. regulator-min-microvolt = <1800000>;
  306. regulator-max-microvolt = <1800000>;
  307. interrupts = <IT_CURLIM_LDO6 0>;
  308. };
  309. vref_ddr: vref_ddr {
  310. regulator-name = "vref_ddr";
  311. regulator-always-on;
  312. };
  313. bst_out: boost {
  314. regulator-name = "bst_out";
  315. interrupts = <IT_OCP_BOOST 0>;
  316. };
  317. vbus_otg: pwr_sw1 {
  318. regulator-name = "vbus_otg";
  319. interrupts = <IT_OCP_OTG 0>;
  320. };
  321. vbus_sw: pwr_sw2 {
  322. regulator-name = "vbus_sw";
  323. interrupts = <IT_OCP_SWOUT 0>;
  324. regulator-active-discharge = <1>;
  325. };
  326. };
  327. onkey {
  328. compatible = "st,stpmic1-onkey";
  329. interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
  330. interrupt-names = "onkey-falling", "onkey-rising";
  331. power-off-time-sec = <10>;
  332. status = "okay";
  333. };
  334. watchdog {
  335. compatible = "st,stpmic1-wdt";
  336. status = "disabled";
  337. };
  338. };
  339. touchscreen@49 {
  340. compatible = "ti,tsc2004";
  341. reg = <0x49>;
  342. vio-supply = <&v3v3>;
  343. interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
  344. };
  345. eeprom@50 {
  346. compatible = "atmel,24c02";
  347. reg = <0x50>;
  348. pagesize = <16>;
  349. };
  350. };
  351. &ipcc {
  352. status = "okay";
  353. };
  354. &iwdg2 {
  355. timeout-sec = <32>;
  356. status = "okay";
  357. };
  358. &m4_rproc {
  359. memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
  360. <&vdev0vring1>, <&vdev0buffer>;
  361. mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
  362. mbox-names = "vq0", "vq1", "shutdown", "detach";
  363. interrupt-parent = <&exti>;
  364. interrupts = <68 1>;
  365. status = "okay";
  366. };
  367. &pwr_regulators {
  368. vdd-supply = <&vdd>;
  369. vdd_3v3_usbfs-supply = <&vdd_usb>;
  370. };
  371. &qspi {
  372. pinctrl-names = "default", "sleep";
  373. pinctrl-0 = <&qspi_clk_pins_a
  374. &qspi_bk1_pins_a
  375. &qspi_cs1_pins_a>;
  376. pinctrl-1 = <&qspi_clk_sleep_pins_a
  377. &qspi_bk1_sleep_pins_a
  378. &qspi_cs1_sleep_pins_a>;
  379. reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
  380. #address-cells = <1>;
  381. #size-cells = <0>;
  382. status = "okay";
  383. flash0: flash@0 {
  384. compatible = "jedec,spi-nor";
  385. reg = <0>;
  386. spi-rx-bus-width = <4>;
  387. spi-max-frequency = <108000000>;
  388. #address-cells = <1>;
  389. #size-cells = <1>;
  390. };
  391. };
  392. &rcc {
  393. /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
  394. clocks = <&rcc CK_MCO2>;
  395. clock-names = "ETH_RX_CLK/ETH_REF_CLK";
  396. /*
  397. * Set PLL4P output to 100 MHz to supply SDMMC with faster clock,
  398. * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
  399. * so that MCO2 behaves as a divider for the ETHRX clock here.
  400. */
  401. assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
  402. assigned-clock-parents = <&rcc PLL4_P>;
  403. assigned-clock-rates = <50000000>, <100000000>;
  404. };
  405. &rng1 {
  406. status = "okay";
  407. };
  408. &rtc {
  409. status = "okay";
  410. };
  411. &sdmmc1 {
  412. pinctrl-names = "default", "opendrain", "sleep", "init";
  413. pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
  414. pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
  415. pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
  416. pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
  417. cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
  418. disable-wp;
  419. st,sig-dir;
  420. st,neg-edge;
  421. st,use-ckin;
  422. st,cmd-gpios = <&gpiod 2 0>;
  423. st,ck-gpios = <&gpioc 12 0>;
  424. st,ckin-gpios = <&gpioe 4 0>;
  425. bus-width = <4>;
  426. vmmc-supply = <&vdd_sd>;
  427. status = "okay";
  428. };
  429. &sdmmc1_b4_pins_a {
  430. /*
  431. * SD bus pull-up resistors:
  432. * - optional on SoMs with SD voltage translator
  433. * - mandatory on SoMs without SD voltage translator
  434. */
  435. pins1 {
  436. bias-pull-up;
  437. };
  438. pins2 {
  439. bias-pull-up;
  440. };
  441. };
  442. &sdmmc2 {
  443. pinctrl-names = "default", "opendrain", "sleep";
  444. pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
  445. pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
  446. pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
  447. non-removable;
  448. no-sd;
  449. no-sdio;
  450. st,neg-edge;
  451. bus-width = <8>;
  452. vmmc-supply = <&v3v3>;
  453. vqmmc-supply = <&v3v3>;
  454. mmc-ddr-3_3v;
  455. status = "okay";
  456. };
  457. &sdmmc3 {
  458. pinctrl-names = "default", "opendrain", "sleep";
  459. pinctrl-0 = <&sdmmc3_b4_pins_a>;
  460. pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
  461. pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
  462. broken-cd;
  463. st,neg-edge;
  464. bus-width = <4>;
  465. vmmc-supply = <&v3v3>;
  466. vqmmc-supply = <&v3v3>;
  467. mmc-ddr-3_3v;
  468. status = "okay";
  469. };
  470. &uart4 {
  471. pinctrl-names = "default";
  472. pinctrl-0 = <&uart4_pins_a>;
  473. /delete-property/dmas;
  474. /delete-property/dma-names;
  475. status = "okay";
  476. };