sama5d3_can.dtsi 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with
  4. * CAN support
  5. *
  6. * Copyright (C) 2013 Boris BREZILLON <[email protected]>
  7. */
  8. #include <dt-bindings/pinctrl/at91.h>
  9. #include <dt-bindings/interrupt-controller/irq.h>
  10. / {
  11. ahb {
  12. apb {
  13. pinctrl@fffff200 {
  14. can0 {
  15. pinctrl_can0_rx_tx: can0_rx_tx {
  16. atmel,pins =
  17. <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
  18. AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
  19. };
  20. };
  21. can1 {
  22. pinctrl_can1_rx_tx: can1_rx_tx {
  23. atmel,pins =
  24. <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
  25. AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
  26. };
  27. };
  28. };
  29. can0: can@f000c000 {
  30. compatible = "atmel,at91sam9x5-can";
  31. reg = <0xf000c000 0x300>;
  32. interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
  33. pinctrl-names = "default";
  34. pinctrl-0 = <&pinctrl_can0_rx_tx>;
  35. clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
  36. clock-names = "can_clk";
  37. status = "disabled";
  38. };
  39. can1: can@f8010000 {
  40. compatible = "atmel,at91sam9x5-can";
  41. reg = <0xf8010000 0x300>;
  42. interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pinctrl_can1_rx_tx>;
  45. clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
  46. clock-names = "can_clk";
  47. status = "disabled";
  48. };
  49. };
  50. };
  51. };