r8a7791-porter.dts 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the Porter board
  4. *
  5. * Copyright (C) 2015 Cogent Embedded, Inc.
  6. */
  7. /*
  8. * SSI-AK4642
  9. *
  10. * JP3: 2-1: AK4642
  11. * 2-3: ADV7511
  12. *
  13. * This command is required before playback/capture:
  14. *
  15. * amixer set "LINEOUT Mixer DACL" on
  16. */
  17. /dts-v1/;
  18. #include "r8a7791.dtsi"
  19. #include <dt-bindings/gpio/gpio.h>
  20. / {
  21. model = "Porter";
  22. compatible = "renesas,porter", "renesas,r8a7791";
  23. aliases {
  24. serial0 = &scif0;
  25. i2c9 = &gpioi2c2;
  26. i2c10 = &i2chdmi;
  27. mmc0 = &sdhi0;
  28. mmc1 = &sdhi2;
  29. };
  30. chosen {
  31. bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
  32. stdout-path = "serial0:115200n8";
  33. };
  34. memory@40000000 {
  35. device_type = "memory";
  36. reg = <0 0x40000000 0 0x40000000>;
  37. };
  38. memory@200000000 {
  39. device_type = "memory";
  40. reg = <2 0x00000000 0 0x40000000>;
  41. };
  42. vcc_sdhi0: regulator-vcc-sdhi0 {
  43. compatible = "regulator-fixed";
  44. regulator-name = "SDHI0 Vcc";
  45. regulator-min-microvolt = <3300000>;
  46. regulator-max-microvolt = <3300000>;
  47. regulator-always-on;
  48. };
  49. vccq_sdhi0: regulator-vccq-sdhi0 {
  50. compatible = "regulator-gpio";
  51. regulator-name = "SDHI0 VccQ";
  52. regulator-min-microvolt = <1800000>;
  53. regulator-max-microvolt = <3300000>;
  54. gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
  55. gpios-states = <1>;
  56. states = <3300000 1>, <1800000 0>;
  57. };
  58. vcc_sdhi2: regulator-vcc-sdhi2 {
  59. compatible = "regulator-fixed";
  60. regulator-name = "SDHI2 Vcc";
  61. regulator-min-microvolt = <3300000>;
  62. regulator-max-microvolt = <3300000>;
  63. regulator-always-on;
  64. };
  65. vccq_sdhi2: regulator-vccq-sdhi2 {
  66. compatible = "regulator-gpio";
  67. regulator-name = "SDHI2 VccQ";
  68. regulator-min-microvolt = <1800000>;
  69. regulator-max-microvolt = <3300000>;
  70. gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  71. gpios-states = <1>;
  72. states = <3300000 1>, <1800000 0>;
  73. };
  74. hdmi-out {
  75. compatible = "hdmi-connector";
  76. type = "a";
  77. port {
  78. hdmi_con: endpoint {
  79. remote-endpoint = <&adv7511_out>;
  80. };
  81. };
  82. };
  83. x3_clk: x3-clock {
  84. compatible = "fixed-clock";
  85. #clock-cells = <0>;
  86. clock-frequency = <148500000>;
  87. };
  88. x16_clk: x16-clock {
  89. compatible = "fixed-clock";
  90. #clock-cells = <0>;
  91. clock-frequency = <74250000>;
  92. };
  93. x14_clk: audio_clock {
  94. compatible = "fixed-clock";
  95. #clock-cells = <0>;
  96. clock-frequency = <11289600>;
  97. };
  98. sound {
  99. compatible = "simple-audio-card";
  100. simple-audio-card,format = "left_j";
  101. simple-audio-card,bitclock-master = <&soundcodec>;
  102. simple-audio-card,frame-master = <&soundcodec>;
  103. simple-audio-card,cpu {
  104. sound-dai = <&rcar_sound>;
  105. };
  106. soundcodec: simple-audio-card,codec {
  107. sound-dai = <&ak4642>;
  108. clocks = <&x14_clk>;
  109. };
  110. };
  111. gpioi2c2: i2c-9 {
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. compatible = "i2c-gpio";
  115. status = "disabled";
  116. scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  117. sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  118. i2c-gpio,delay-us = <5>;
  119. };
  120. /*
  121. * A fallback to GPIO is provided for I2C2.
  122. */
  123. i2chdmi: i2c-10 {
  124. compatible = "i2c-demux-pinctrl";
  125. i2c-parent = <&i2c2>, <&gpioi2c2>;
  126. i2c-bus-name = "i2c-hdmi";
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. ak4642: codec@12 {
  130. compatible = "asahi-kasei,ak4642";
  131. #sound-dai-cells = <0>;
  132. reg = <0x12>;
  133. };
  134. composite-in@20 {
  135. compatible = "adi,adv7180";
  136. reg = <0x20>;
  137. port {
  138. adv7180: endpoint {
  139. bus-width = <8>;
  140. remote-endpoint = <&vin0ep>;
  141. };
  142. };
  143. };
  144. hdmi@39 {
  145. compatible = "adi,adv7511w";
  146. reg = <0x39>;
  147. interrupt-parent = <&gpio3>;
  148. interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
  149. adi,input-depth = <8>;
  150. adi,input-colorspace = "rgb";
  151. adi,input-clock = "1x";
  152. ports {
  153. #address-cells = <1>;
  154. #size-cells = <0>;
  155. port@0 {
  156. reg = <0>;
  157. adv7511_in: endpoint {
  158. remote-endpoint = <&du_out_rgb>;
  159. };
  160. };
  161. port@1 {
  162. reg = <1>;
  163. adv7511_out: endpoint {
  164. remote-endpoint = <&hdmi_con>;
  165. };
  166. };
  167. };
  168. };
  169. };
  170. };
  171. &extal_clk {
  172. clock-frequency = <20000000>;
  173. };
  174. &pfc {
  175. scif0_pins: scif0 {
  176. groups = "scif0_data_d";
  177. function = "scif0";
  178. };
  179. ether_pins: ether {
  180. groups = "eth_link", "eth_mdio", "eth_rmii";
  181. function = "eth";
  182. };
  183. phy1_pins: phy1 {
  184. groups = "intc_irq0";
  185. function = "intc";
  186. };
  187. pmic_irq_pins: pmicirq {
  188. groups = "intc_irq2";
  189. function = "intc";
  190. };
  191. sdhi0_pins: sd0 {
  192. groups = "sdhi0_data4", "sdhi0_ctrl";
  193. function = "sdhi0";
  194. };
  195. sdhi2_pins: sd2 {
  196. groups = "sdhi2_data4", "sdhi2_ctrl";
  197. function = "sdhi2";
  198. };
  199. qspi_pins: qspi {
  200. groups = "qspi_ctrl", "qspi_data4";
  201. function = "qspi";
  202. };
  203. i2c2_pins: i2c2 {
  204. groups = "i2c2";
  205. function = "i2c2";
  206. };
  207. usb0_pins: usb0 {
  208. groups = "usb0";
  209. function = "usb0";
  210. };
  211. usb1_pins: usb1 {
  212. groups = "usb1";
  213. function = "usb1";
  214. };
  215. vin0_pins: vin0 {
  216. groups = "vin0_data8", "vin0_clk";
  217. function = "vin0";
  218. };
  219. can0_pins: can0 {
  220. groups = "can0_data";
  221. function = "can0";
  222. };
  223. du_pins: du {
  224. groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
  225. function = "du";
  226. };
  227. ssi_pins: sound {
  228. groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
  229. function = "ssi";
  230. };
  231. audio_clk_pins: audio_clk {
  232. groups = "audio_clk_a";
  233. function = "audio_clk";
  234. };
  235. };
  236. &scif0 {
  237. pinctrl-0 = <&scif0_pins>;
  238. pinctrl-names = "default";
  239. status = "okay";
  240. };
  241. &ether {
  242. pinctrl-0 = <&ether_pins>, <&phy1_pins>;
  243. pinctrl-names = "default";
  244. phy-handle = <&phy1>;
  245. renesas,ether-link-active-low;
  246. status = "okay";
  247. phy1: ethernet-phy@1 {
  248. compatible = "ethernet-phy-id0022.1537",
  249. "ethernet-phy-ieee802.3-c22";
  250. reg = <1>;
  251. interrupt-parent = <&irqc0>;
  252. interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
  253. micrel,led-mode = <1>;
  254. reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
  255. };
  256. };
  257. &sdhi0 {
  258. pinctrl-0 = <&sdhi0_pins>;
  259. pinctrl-names = "default";
  260. vmmc-supply = <&vcc_sdhi0>;
  261. vqmmc-supply = <&vccq_sdhi0>;
  262. cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
  263. wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  264. status = "okay";
  265. };
  266. &sdhi2 {
  267. pinctrl-0 = <&sdhi2_pins>;
  268. pinctrl-names = "default";
  269. vmmc-supply = <&vcc_sdhi2>;
  270. vqmmc-supply = <&vccq_sdhi2>;
  271. cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
  272. status = "okay";
  273. };
  274. &qspi {
  275. pinctrl-0 = <&qspi_pins>;
  276. pinctrl-names = "default";
  277. status = "okay";
  278. flash@0 {
  279. compatible = "spansion,s25fl512s", "jedec,spi-nor";
  280. reg = <0>;
  281. spi-max-frequency = <30000000>;
  282. spi-tx-bus-width = <4>;
  283. spi-rx-bus-width = <4>;
  284. m25p,fast-read;
  285. partitions {
  286. compatible = "fixed-partitions";
  287. #address-cells = <1>;
  288. #size-cells = <1>;
  289. partition@0 {
  290. label = "loader_prg";
  291. reg = <0x00000000 0x00040000>;
  292. read-only;
  293. };
  294. partition@40000 {
  295. label = "user_prg";
  296. reg = <0x00040000 0x00400000>;
  297. read-only;
  298. };
  299. partition@440000 {
  300. label = "flash_fs";
  301. reg = <0x00440000 0x03bc0000>;
  302. };
  303. };
  304. };
  305. };
  306. &i2c2 {
  307. pinctrl-0 = <&i2c2_pins>;
  308. pinctrl-names = "i2c-hdmi";
  309. clock-frequency = <400000>;
  310. };
  311. &i2c6 {
  312. pinctrl-names = "default";
  313. pinctrl-0 = <&pmic_irq_pins>;
  314. status = "okay";
  315. clock-frequency = <100000>;
  316. pmic@5a {
  317. compatible = "dlg,da9063l";
  318. reg = <0x5a>;
  319. interrupt-parent = <&irqc0>;
  320. interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  321. interrupt-controller;
  322. watchdog {
  323. compatible = "dlg,da9063-watchdog";
  324. };
  325. };
  326. vdd_dvfs: regulator@68 {
  327. compatible = "dlg,da9210";
  328. reg = <0x68>;
  329. interrupt-parent = <&irqc0>;
  330. interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  331. regulator-min-microvolt = <1000000>;
  332. regulator-max-microvolt = <1000000>;
  333. regulator-boot-on;
  334. regulator-always-on;
  335. };
  336. };
  337. &sata0 {
  338. status = "okay";
  339. };
  340. &cpu0 {
  341. cpu0-supply = <&vdd_dvfs>;
  342. };
  343. /* composite video input */
  344. &vin0 {
  345. status = "okay";
  346. pinctrl-0 = <&vin0_pins>;
  347. pinctrl-names = "default";
  348. port {
  349. vin0ep: endpoint {
  350. remote-endpoint = <&adv7180>;
  351. bus-width = <8>;
  352. };
  353. };
  354. };
  355. &pci0 {
  356. pinctrl-0 = <&usb0_pins>;
  357. pinctrl-names = "default";
  358. status = "okay";
  359. };
  360. &pci1 {
  361. pinctrl-0 = <&usb1_pins>;
  362. pinctrl-names = "default";
  363. status = "okay";
  364. };
  365. &hsusb {
  366. pinctrl-0 = <&usb0_pins>;
  367. pinctrl-names = "default";
  368. status = "okay";
  369. };
  370. &usbphy {
  371. status = "okay";
  372. };
  373. &pcie_bus_clk {
  374. clock-frequency = <100000000>;
  375. };
  376. &pciec {
  377. status = "okay";
  378. };
  379. &can0 {
  380. pinctrl-0 = <&can0_pins>;
  381. pinctrl-names = "default";
  382. status = "okay";
  383. };
  384. &du {
  385. pinctrl-0 = <&du_pins>;
  386. pinctrl-names = "default";
  387. status = "okay";
  388. clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
  389. <&x3_clk>, <&x16_clk>;
  390. clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
  391. ports {
  392. port@0 {
  393. endpoint {
  394. remote-endpoint = <&adv7511_in>;
  395. };
  396. };
  397. };
  398. };
  399. &lvds0 {
  400. ports {
  401. port@1 {
  402. lvds_connector: endpoint {
  403. };
  404. };
  405. };
  406. };
  407. &rcar_sound {
  408. pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
  409. pinctrl-names = "default";
  410. status = "okay";
  411. /* Single DAI */
  412. #sound-dai-cells = <0>;
  413. rcar_sound,dai {
  414. dai0 {
  415. playback = <&ssi0>;
  416. capture = <&ssi1>;
  417. };
  418. };
  419. };
  420. &rwdt {
  421. timeout-sec = <60>;
  422. status = "okay";
  423. };
  424. &ssi1 {
  425. shared-pin;
  426. };