r8a7742-iwg21d-q7.dts 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device Tree Source for the iWave-RZ/G1H Qseven board
  4. *
  5. * Copyright (C) 2020 Renesas Electronics Corp.
  6. */
  7. /*
  8. * SSI-SGTL5000
  9. *
  10. * This command is required when Playback/Capture
  11. *
  12. * amixer set "DVC Out" 100%
  13. * amixer set "DVC In" 100%
  14. *
  15. * You can use Mute
  16. *
  17. * amixer set "DVC Out Mute" on
  18. * amixer set "DVC In Mute" on
  19. *
  20. * You can use Volume Ramp
  21. *
  22. * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
  23. * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  24. * amixer set "DVC Out Ramp" on
  25. * aplay xxx.wav &
  26. * amixer set "DVC Out" 80% // Volume Down
  27. * amixer set "DVC Out" 100% // Volume Up
  28. */
  29. /dts-v1/;
  30. #include "r8a7742-iwg21m.dtsi"
  31. #include <dt-bindings/pwm/pwm.h>
  32. / {
  33. model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H";
  34. compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
  35. aliases {
  36. serial2 = &scifa2;
  37. serial4 = &scifb2;
  38. ethernet0 = &avb;
  39. };
  40. chosen {
  41. bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
  42. stdout-path = "serial2:115200n8";
  43. };
  44. audio_clock: audio_clock {
  45. compatible = "fixed-clock";
  46. #clock-cells = <0>;
  47. clock-frequency = <26000000>;
  48. };
  49. lcd_backlight: backlight {
  50. compatible = "pwm-backlight";
  51. pwms = <&tpu 2 5000000 0>;
  52. brightness-levels = <0 4 8 16 32 64 128 255>;
  53. pinctrl-0 = <&backlight_pins>;
  54. pinctrl-names = "default";
  55. default-brightness-level = <7>;
  56. enable-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
  57. };
  58. leds {
  59. compatible = "gpio-leds";
  60. sdhi2_led {
  61. label = "sdio-led";
  62. gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
  63. linux,default-trigger = "mmc1";
  64. };
  65. };
  66. lvds-receiver {
  67. compatible = "ti,ds90cf384a", "lvds-decoder";
  68. power-supply = <&vcc_3v3_tft1>;
  69. ports {
  70. #address-cells = <1>;
  71. #size-cells = <0>;
  72. port@0 {
  73. reg = <0>;
  74. lvds_receiver_in: endpoint {
  75. remote-endpoint = <&lvds0_out>;
  76. };
  77. };
  78. port@1 {
  79. reg = <1>;
  80. lvds_receiver_out: endpoint {
  81. remote-endpoint = <&panel_in>;
  82. };
  83. };
  84. };
  85. };
  86. panel {
  87. compatible = "edt,etm0700g0dh6";
  88. backlight = <&lcd_backlight>;
  89. power-supply = <&vcc_3v3_tft1>;
  90. port {
  91. panel_in: endpoint {
  92. remote-endpoint = <&lvds_receiver_out>;
  93. };
  94. };
  95. };
  96. reg_1p5v: 1p5v {
  97. compatible = "regulator-fixed";
  98. regulator-name = "1P5V";
  99. regulator-min-microvolt = <1500000>;
  100. regulator-max-microvolt = <1500000>;
  101. regulator-always-on;
  102. };
  103. rsnd_sgtl5000: sound {
  104. compatible = "simple-audio-card";
  105. simple-audio-card,format = "i2s";
  106. simple-audio-card,bitclock-master = <&sndcodec>;
  107. simple-audio-card,frame-master = <&sndcodec>;
  108. sndcpu: simple-audio-card,cpu {
  109. sound-dai = <&rcar_sound>;
  110. };
  111. sndcodec: simple-audio-card,codec {
  112. sound-dai = <&sgtl5000>;
  113. };
  114. };
  115. vcc_3v3_tft1: regulator-panel {
  116. compatible = "regulator-fixed";
  117. regulator-name = "vcc-3v3-tft1";
  118. regulator-min-microvolt = <3300000>;
  119. regulator-max-microvolt = <3300000>;
  120. enable-active-high;
  121. startup-delay-us = <500>;
  122. gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
  123. };
  124. vcc_sdhi2: regulator-vcc-sdhi2 {
  125. compatible = "regulator-fixed";
  126. regulator-name = "SDHI2 Vcc";
  127. regulator-min-microvolt = <3300000>;
  128. regulator-max-microvolt = <3300000>;
  129. gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
  130. };
  131. vccq_sdhi2: regulator-vccq-sdhi2 {
  132. compatible = "regulator-gpio";
  133. regulator-name = "SDHI2 VccQ";
  134. regulator-min-microvolt = <1800000>;
  135. regulator-max-microvolt = <3300000>;
  136. gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  137. gpios-states = <1>;
  138. states = <3300000 1>, <1800000 0>;
  139. };
  140. };
  141. &avb {
  142. pinctrl-0 = <&avb_pins>;
  143. pinctrl-names = "default";
  144. phy-handle = <&phy3>;
  145. phy-mode = "gmii";
  146. renesas,no-ether-link;
  147. status = "okay";
  148. phy3: ethernet-phy@3 {
  149. compatible = "ethernet-phy-id0022.1622",
  150. "ethernet-phy-ieee802.3-c22";
  151. reg = <3>;
  152. micrel,led-mode = <1>;
  153. };
  154. };
  155. &i2c2 {
  156. pinctrl-0 = <&i2c2_pins>;
  157. pinctrl-names = "default";
  158. status = "okay";
  159. clock-frequency = <400000>;
  160. sgtl5000: codec@a {
  161. compatible = "fsl,sgtl5000";
  162. #sound-dai-cells = <0>;
  163. reg = <0x0a>;
  164. clocks = <&audio_clock>;
  165. VDDA-supply = <&reg_3p3v>;
  166. VDDIO-supply = <&reg_3p3v>;
  167. VDDD-supply = <&reg_1p5v>;
  168. };
  169. touch: touchpanel@38 {
  170. compatible = "edt,edt-ft5406";
  171. reg = <0x38>;
  172. interrupt-parent = <&gpio0>;
  173. interrupts = <24 IRQ_TYPE_EDGE_FALLING>;
  174. /* GP1_29 is also shared with audio codec reset pin */
  175. reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
  176. vcc-supply = <&vcc_3v3_tft1>;
  177. };
  178. };
  179. &can1 {
  180. pinctrl-0 = <&can1_pins>;
  181. pinctrl-names = "default";
  182. status = "okay";
  183. };
  184. &cmt0 {
  185. status = "okay";
  186. };
  187. &du {
  188. status = "okay";
  189. };
  190. &gpio0 {
  191. touch-interrupt-hog {
  192. gpio-hog;
  193. gpios = <24 GPIO_ACTIVE_LOW>;
  194. input;
  195. };
  196. };
  197. &gpio1 {
  198. can-trx-en-hog {
  199. gpio-hog;
  200. gpios = <28 GPIO_ACTIVE_HIGH>;
  201. output-low;
  202. line-name = "can-trx-en-gpio";
  203. };
  204. };
  205. &hsusb {
  206. pinctrl-0 = <&usb0_pins>;
  207. pinctrl-names = "default";
  208. status = "okay";
  209. };
  210. &lvds0 {
  211. status = "okay";
  212. ports {
  213. port@1 {
  214. lvds0_out: endpoint {
  215. remote-endpoint = <&lvds_receiver_in>;
  216. };
  217. };
  218. };
  219. };
  220. &msiof0 {
  221. pinctrl-0 = <&msiof0_pins>;
  222. pinctrl-names = "default";
  223. cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
  224. status = "okay";
  225. flash1: flash@0 {
  226. compatible = "sst,sst25vf016b", "jedec,spi-nor";
  227. reg = <0>;
  228. spi-max-frequency = <50000000>;
  229. m25p,fast-read;
  230. partitions {
  231. compatible = "fixed-partitions";
  232. #address-cells = <1>;
  233. #size-cells = <1>;
  234. partition@0 {
  235. label = "user";
  236. reg = <0x00000000 0x00200000>;
  237. };
  238. };
  239. };
  240. };
  241. &pci0 {
  242. pinctrl-0 = <&usb0_pins>;
  243. pinctrl-names = "default";
  244. /* Disable hsusb to enable USB2.0 host mode support on J2 */
  245. /* status = "okay"; */
  246. };
  247. &pci1 {
  248. pinctrl-0 = <&usb1_pins>;
  249. pinctrl-names = "default";
  250. status = "okay";
  251. };
  252. &pci2 {
  253. /* Disable xhci to enable USB2.0 host mode support on J23 bottom port */
  254. /* status = "okay"; */
  255. };
  256. &pcie_bus_clk {
  257. clock-frequency = <100000000>;
  258. };
  259. &pciec {
  260. /* SW2[6] determines which connector is activated
  261. * ON = PCIe X4 (connector-J7)
  262. * OFF = mini-PCIe (connector-J26)
  263. */
  264. status = "okay";
  265. };
  266. &pfc {
  267. avb_pins: avb {
  268. groups = "avb_mdio", "avb_gmii";
  269. function = "avb";
  270. };
  271. backlight_pins: backlight {
  272. groups = "tpu0_to2";
  273. function = "tpu0";
  274. };
  275. can1_pins: can1 {
  276. groups = "can1_data_b";
  277. function = "can1";
  278. };
  279. i2c2_pins: i2c2 {
  280. groups = "i2c2_b";
  281. function = "i2c2";
  282. };
  283. msiof0_pins: msiof0 {
  284. groups = "msiof0_clk", "msiof0_sync", "msiof0_tx", "msiof0_rx";
  285. function = "msiof0";
  286. };
  287. scifa2_pins: scifa2 {
  288. groups = "scifa2_data_c";
  289. function = "scifa2";
  290. };
  291. scifb2_pins: scifb2 {
  292. groups = "scifb2_data", "scifb2_ctrl";
  293. function = "scifb2";
  294. };
  295. sdhi2_pins: sd2 {
  296. groups = "sdhi2_data4", "sdhi2_ctrl";
  297. function = "sdhi2";
  298. power-source = <3300>;
  299. };
  300. sdhi2_pins_uhs: sd2_uhs {
  301. groups = "sdhi2_data4", "sdhi2_ctrl";
  302. function = "sdhi2";
  303. power-source = <1800>;
  304. };
  305. sound_pins: sound {
  306. groups = "ssi34_ctrl", "ssi3_data", "ssi4_data";
  307. function = "ssi";
  308. };
  309. usb0_pins: usb0 {
  310. groups = "usb0";
  311. function = "usb0";
  312. };
  313. usb1_pins: usb1 {
  314. groups = "usb1_pwen";
  315. function = "usb1";
  316. };
  317. };
  318. &rcar_sound {
  319. pinctrl-0 = <&sound_pins>;
  320. pinctrl-names = "default";
  321. status = "okay";
  322. /* Single DAI */
  323. #sound-dai-cells = <0>;
  324. rcar_sound,dai {
  325. dai0 {
  326. playback = <&ssi4>, <&src4>, <&dvc1>;
  327. capture = <&ssi3>, <&src3>, <&dvc0>;
  328. };
  329. };
  330. };
  331. &rwdt {
  332. timeout-sec = <60>;
  333. status = "okay";
  334. };
  335. &scifa2 {
  336. pinctrl-0 = <&scifa2_pins>;
  337. pinctrl-names = "default";
  338. status = "okay";
  339. };
  340. &scifb2 {
  341. pinctrl-0 = <&scifb2_pins>;
  342. pinctrl-names = "default";
  343. uart-has-rtscts;
  344. status = "okay";
  345. };
  346. &sdhi2 {
  347. pinctrl-0 = <&sdhi2_pins>;
  348. pinctrl-1 = <&sdhi2_pins_uhs>;
  349. pinctrl-names = "default", "state_uhs";
  350. vmmc-supply = <&vcc_sdhi2>;
  351. vqmmc-supply = <&vccq_sdhi2>;
  352. cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
  353. wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
  354. sd-uhs-sdr50;
  355. status = "okay";
  356. };
  357. &ssi4 {
  358. shared-pin;
  359. };
  360. &tpu {
  361. status = "okay";
  362. };
  363. &usbphy {
  364. status = "okay";
  365. };
  366. &xhci {
  367. status = "okay";
  368. };