qcom-ipq4019-ap.dk04.1.dtsi 2.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111
  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. #include "qcom-ipq4019.dtsi"
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/gpio/gpio.h>
  6. / {
  7. model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
  8. aliases {
  9. serial0 = &blsp1_uart1;
  10. serial1 = &blsp1_uart2;
  11. };
  12. chosen {
  13. stdout-path = "serial0:115200n8";
  14. };
  15. memory {
  16. device_type = "memory";
  17. reg = <0x80000000 0x10000000>; /* 256MB */
  18. };
  19. soc {
  20. pinctrl@1000000 {
  21. serial_0_pins: serial0-pinmux {
  22. pins = "gpio16", "gpio17";
  23. function = "blsp_uart0";
  24. bias-disable;
  25. };
  26. serial_1_pins: serial1-pinmux {
  27. pins = "gpio8", "gpio9",
  28. "gpio10", "gpio11";
  29. function = "blsp_uart1";
  30. bias-disable;
  31. };
  32. spi_0_pins: spi-0-pinmux {
  33. pinmux {
  34. function = "blsp_spi0";
  35. pins = "gpio13", "gpio14", "gpio15";
  36. bias-disable;
  37. };
  38. pinmux_cs {
  39. function = "gpio";
  40. pins = "gpio12";
  41. bias-disable;
  42. output-high;
  43. };
  44. };
  45. i2c_0_pins: i2c-0-pinmux {
  46. pins = "gpio20", "gpio21";
  47. function = "blsp_i2c0";
  48. bias-disable;
  49. };
  50. nand_pins: nand-pins {
  51. pins = "gpio53", "gpio55", "gpio56",
  52. "gpio57", "gpio58", "gpio59",
  53. "gpio60", "gpio62", "gpio63",
  54. "gpio64", "gpio65", "gpio66",
  55. "gpio67", "gpio68", "gpio69";
  56. function = "qpic";
  57. };
  58. };
  59. serial@78af000 {
  60. pinctrl-0 = <&serial_0_pins>;
  61. pinctrl-names = "default";
  62. status = "okay";
  63. };
  64. serial@78b0000 {
  65. pinctrl-0 = <&serial_1_pins>;
  66. pinctrl-names = "default";
  67. status = "okay";
  68. };
  69. dma-controller@7884000 {
  70. status = "okay";
  71. };
  72. spi@78b5000 { /* BLSP1 QUP1 */
  73. pinctrl-0 = <&spi_0_pins>;
  74. pinctrl-names = "default";
  75. status = "okay";
  76. cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  77. flash@0 {
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. reg = <0>;
  81. compatible = "micron,n25q128a11", "jedec,spi-nor";
  82. spi-max-frequency = <24000000>;
  83. };
  84. };
  85. pci@40000000 {
  86. status = "okay";
  87. perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
  88. };
  89. };
  90. };
  91. &nand {
  92. pinctrl-0 = <&nand_pins>;
  93. pinctrl-names = "default";
  94. };