pm9g45.dts 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  4. *
  5. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
  6. */
  7. /dts-v1/;
  8. #include "at91sam9g45.dtsi"
  9. / {
  10. model = "Ronetix pm9g45";
  11. compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
  12. chosen {
  13. bootargs = "console=ttyS0,115200";
  14. };
  15. memory@70000000 {
  16. reg = <0x70000000 0x8000000>;
  17. };
  18. clocks {
  19. slow_xtal {
  20. clock-frequency = <32768>;
  21. };
  22. main_xtal {
  23. clock-frequency = <12000000>;
  24. };
  25. };
  26. ahb {
  27. apb {
  28. dbgu: serial@ffffee00 {
  29. status = "okay";
  30. };
  31. pinctrl@fffff200 {
  32. nand {
  33. pinctrl_nand_rb: nand-rb-0 {
  34. atmel,pins =
  35. <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
  36. };
  37. };
  38. mmc {
  39. pinctrl_board_mmc: mmc0-board {
  40. atmel,pins =
  41. <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
  42. };
  43. };
  44. };
  45. tcb0: timer@fff7c000 {
  46. timer@0 {
  47. compatible = "atmel,tcb-timer";
  48. reg = <0>, <1>;
  49. };
  50. timer@2 {
  51. compatible = "atmel,tcb-timer";
  52. reg = <2>;
  53. };
  54. };
  55. mmc0: mmc@fff80000 {
  56. pinctrl-0 = <
  57. &pinctrl_board_mmc
  58. &pinctrl_mmc0_slot0_clk_cmd_dat0
  59. &pinctrl_mmc0_slot0_dat1_3>;
  60. pinctrl-names = "default";
  61. status = "okay";
  62. slot@0 {
  63. reg = <0>;
  64. bus-width = <4>;
  65. cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
  66. };
  67. };
  68. macb0: ethernet@fffbc000 {
  69. phy-mode = "rmii";
  70. status = "okay";
  71. };
  72. };
  73. ebi: ebi@10000000 {
  74. status = "okay";
  75. nand_controller: nand-controller {
  76. status = "okay";
  77. pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
  78. pinctrl-names = "default";
  79. nand@3 {
  80. reg = <0x3 0x0 0x800000>;
  81. rb-gpios = <&pioD 3 GPIO_ACTIVE_HIGH>;
  82. cs-gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
  83. nand-bus-width = <8>;
  84. nand-ecc-mode = "soft";
  85. nand-on-flash-bbt;
  86. label = "atmel_nand";
  87. partitions {
  88. compatible = "fixed-partitions";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. at91bootstrap@0 {
  92. label = "at91bootstrap";
  93. reg = <0x0 0x20000>;
  94. };
  95. barebox@20000 {
  96. label = "barebox";
  97. reg = <0x20000 0x40000>;
  98. };
  99. bareboxenv@60000 {
  100. label = "bareboxenv";
  101. reg = <0x60000 0x1A0000>;
  102. };
  103. kernel@200000 {
  104. label = "bareboxenv2";
  105. reg = <0x200000 0x300000>;
  106. };
  107. kernel@500000 {
  108. label = "root";
  109. reg = <0x500000 0x400000>;
  110. };
  111. data@900000 {
  112. label = "data";
  113. reg = <0x900000 0x8340000>;
  114. };
  115. };
  116. };
  117. };
  118. };
  119. usb0: ohci@700000 {
  120. status = "okay";
  121. num-ports = <2>;
  122. };
  123. usb1: ehci@800000 {
  124. status = "okay";
  125. };
  126. };
  127. leds {
  128. compatible = "gpio-leds";
  129. led0 {
  130. label = "led0";
  131. gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
  132. linux,default-trigger = "nand-disk";
  133. };
  134. led1 {
  135. label = "led1";
  136. gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
  137. linux,default-trigger = "heartbeat";
  138. };
  139. };
  140. gpio_keys {
  141. compatible = "gpio-keys";
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. right {
  145. label = "SW4";
  146. gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
  147. linux,code = <106>;
  148. };
  149. up {
  150. label = "SW3";
  151. gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
  152. linux,code = <103>;
  153. };
  154. };
  155. };