orion5x-netgear-wnr854t.dts 4.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. // Copyright (C) 2016 Jamie Lentin <[email protected]>
  3. /dts-v1/;
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include "orion5x-mv88f5181.dtsi"
  7. / {
  8. model = "Netgear WNR854-t";
  9. compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
  10. "marvell,orion5x";
  11. aliases {
  12. serial0 = &uart0;
  13. };
  14. memory {
  15. device_type = "memory";
  16. reg = <0x00000000 0x2000000>; /* 32 MB */
  17. };
  18. chosen {
  19. stdout-path = "serial0:115200n8";
  20. };
  21. soc {
  22. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
  23. <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
  24. <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
  25. };
  26. gpio-keys {
  27. compatible = "gpio-keys";
  28. pinctrl-0 = <&pmx_reset_button>;
  29. pinctrl-names = "default";
  30. reset {
  31. label = "Reset Button";
  32. linux,code = <KEY_RESTART>;
  33. gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  34. };
  35. };
  36. gpio-leds {
  37. compatible = "gpio-leds";
  38. pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
  39. pinctrl-names = "default";
  40. led@0 {
  41. label = "wnr854t:green:power";
  42. gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
  43. };
  44. led@1 {
  45. label = "wnr854t:blink:power";
  46. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  47. };
  48. led@2 {
  49. label = "wnr854t:green:wan";
  50. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  51. };
  52. };
  53. };
  54. &devbus_bootcs {
  55. status = "okay";
  56. devbus,keep-config;
  57. flash@0 {
  58. compatible = "cfi-flash";
  59. reg = <0 0x800000>;
  60. bank-width = <2>;
  61. partitions {
  62. compatible = "fixed-partitions";
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. partition@0 {
  66. label = "kernel";
  67. reg = <0x0 0x100000>;
  68. };
  69. partition@100000 {
  70. label = "rootfs";
  71. reg = <0x100000 0x660000>;
  72. };
  73. partition@760000 {
  74. label = "uboot_env";
  75. reg = <0x760000 0x20000>;
  76. };
  77. partition@780000 {
  78. label = "uboot";
  79. reg = <0x780000 0x80000>;
  80. read-only;
  81. };
  82. };
  83. };
  84. };
  85. &mdio {
  86. status = "okay";
  87. switch: switch@0 {
  88. compatible = "marvell,mv88e6085";
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. reg = <0>;
  92. dsa,member = <0 0>;
  93. ports {
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. port@0 {
  97. reg = <0>;
  98. label = "lan3";
  99. phy-handle = <&lan3phy>;
  100. };
  101. port@1 {
  102. reg = <1>;
  103. label = "lan4";
  104. phy-handle = <&lan4phy>;
  105. };
  106. port@2 {
  107. reg = <2>;
  108. label = "wan";
  109. phy-handle = <&wanphy>;
  110. };
  111. port@3 {
  112. reg = <3>;
  113. label = "cpu";
  114. ethernet = <&ethport>;
  115. };
  116. port@5 {
  117. reg = <5>;
  118. label = "lan1";
  119. phy-handle = <&lan1phy>;
  120. };
  121. port@7 {
  122. reg = <7>;
  123. label = "lan2";
  124. phy-handle = <&lan2phy>;
  125. };
  126. };
  127. mdio {
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. lan3phy: ethernet-phy@0 {
  131. /* Marvell 88E1121R (port 1) */
  132. compatible = "ethernet-phy-id0141.0cb0",
  133. "ethernet-phy-ieee802.3-c22";
  134. reg = <0>;
  135. marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
  136. };
  137. lan4phy: ethernet-phy@1 {
  138. /* Marvell 88E1121R (port 2) */
  139. compatible = "ethernet-phy-id0141.0cb0",
  140. "ethernet-phy-ieee802.3-c22";
  141. reg = <1>;
  142. marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
  143. };
  144. wanphy: ethernet-phy@2 {
  145. /* Marvell 88E1121R (port 1) */
  146. compatible = "ethernet-phy-id0141.0cb0",
  147. "ethernet-phy-ieee802.3-c22";
  148. reg = <2>;
  149. marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
  150. };
  151. lan1phy: ethernet-phy@5 {
  152. /* Marvell 88E1112 */
  153. compatible = "ethernet-phy-id0141.0cb0",
  154. "ethernet-phy-ieee802.3-c22";
  155. reg = <5>;
  156. marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
  157. };
  158. lan2phy: ethernet-phy@7 {
  159. /* Marvell 88E1112 */
  160. compatible = "ethernet-phy-id0141.0cb0",
  161. "ethernet-phy-ieee802.3-c22";
  162. reg = <7>;
  163. marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
  164. };
  165. };
  166. };
  167. };
  168. &eth {
  169. status = "okay";
  170. ethernet-port@0 {
  171. /* Hardwired to DSA switch */
  172. speed = <1000>;
  173. duplex = <1>;
  174. };
  175. };
  176. &pinctrl {
  177. pinctrl-0 = <&pmx_pci_gpios>;
  178. pinctrl-names = "default";
  179. pmx_power_led: pmx-power-led {
  180. marvell,pins = "mpp0";
  181. marvell,function = "gpio";
  182. };
  183. pmx_reset_button: pmx-reset-button {
  184. marvell,pins = "mpp1";
  185. marvell,function = "gpio";
  186. };
  187. pmx_power_led_blink: pmx-power-led-blink {
  188. marvell,pins = "mpp2";
  189. marvell,function = "gpio";
  190. };
  191. pmx_wan_led: pmx-wan-led {
  192. marvell,pins = "mpp3";
  193. marvell,function = "gpio";
  194. };
  195. pmx_pci_gpios: pmx-pci-gpios {
  196. marvell,pins = "mpp4";
  197. marvell,function = "gpio";
  198. };
  199. };
  200. &uart0 {
  201. /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
  202. status = "okay";
  203. };