omap3-sniper.dts 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2015-2016 Paul Kocialkowski <[email protected]>
  4. */
  5. /dts-v1/;
  6. #include "omap36xx.dtsi"
  7. #include <dt-bindings/input/input.h>
  8. / {
  9. model = "LG Optimus Black";
  10. compatible = "lg,omap3-sniper", "ti,omap3630", "ti,omap36xx", "ti,omap3";
  11. cpus {
  12. cpu@0 {
  13. cpu0-supply = <&vcc>;
  14. };
  15. };
  16. memory@80000000 {
  17. device_type = "memory";
  18. reg = <0x80000000 0x20000000>; /* 512 MB */
  19. };
  20. };
  21. &omap3_pmx_core {
  22. pinctrl-names = "default";
  23. uart3_pins: pinmux_uart3_pins {
  24. pinctrl-single,pins = <
  25. OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx */
  26. OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx */
  27. >;
  28. };
  29. dp3t_sel_pins: pinmux_dp3t_sel_pins {
  30. pinctrl-single,pins = <
  31. OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE4) /* gpio_161 */
  32. OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* gpio_162 */
  33. >;
  34. };
  35. i2c1_pins: pinmux_i2c1_pins {
  36. pinctrl-single,pins = <
  37. OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */
  38. OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */
  39. >;
  40. };
  41. i2c2_pins: pinmux_i2c2_pins {
  42. pinctrl-single,pins = <
  43. OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
  44. OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
  45. >;
  46. };
  47. i2c3_pins: pinmux_i2c3_pins {
  48. pinctrl-single,pins = <
  49. OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
  50. OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
  51. >;
  52. };
  53. lp8720_en_pin: pinmux_lp8720_en_pin {
  54. pinctrl-single,pins = <
  55. OMAP3_CORE1_IOPAD(0x2080, PIN_OUTPUT | MUX_MODE4) /* gpio_37 */
  56. >;
  57. };
  58. mmc1_pins: pinmux_mmc1_pins {
  59. pinctrl-single,pins = <
  60. OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT | MUX_MODE0) /* sdmmc1_clk */
  61. OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0) /* sdmmc1_cmd */
  62. OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat0 */
  63. OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1 */
  64. OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2 */
  65. OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3 */
  66. >;
  67. };
  68. mmc2_pins: pinmux_mmc2_pins {
  69. pinctrl-single,pins = <
  70. OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT | MUX_MODE0) /* sdmmc2_clk */
  71. OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT | MUX_MODE0) /* sdmmc2_cmd */
  72. OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat0 */
  73. OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat1 */
  74. OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat2 */
  75. OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat3 */
  76. OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat4 */
  77. OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat5 */
  78. OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat6 */
  79. OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0) /* sdmmc2_dat7 */
  80. >;
  81. };
  82. usb_otg_hs_pins: pinmux_usb_otg_hs_pins {
  83. pinctrl-single,pins = <
  84. OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk */
  85. OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp */
  86. OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir */
  87. OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt */
  88. OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0 */
  89. OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1 */
  90. OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2 */
  91. OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3 */
  92. OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4 */
  93. OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5 */
  94. OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6 */
  95. OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7 */
  96. >;
  97. };
  98. };
  99. &omap3_pmx_wkup {
  100. pinctrl-names = "default";
  101. mmc1_cd_pin: pinmux_mmc1_cd_pin {
  102. pinctrl-single,pins = <
  103. OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | MUX_MODE4) /* gpio_10 */
  104. >;
  105. };
  106. };
  107. &gpio2 {
  108. ti,no-reset-on-init;
  109. };
  110. &gpio5 {
  111. ti,no-reset-on-init;
  112. };
  113. &gpio6 {
  114. ti,no-reset-on-init;
  115. };
  116. &uart3 {
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&uart3_pins &dp3t_sel_pins>;
  119. interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
  120. };
  121. &i2c1 {
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&i2c1_pins>;
  124. clock-frequency = <2600000>;
  125. twl: twl@48 {
  126. reg = <0x48>;
  127. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  128. interrupt-parent = <&intc>;
  129. power {
  130. compatible = "ti,twl4030-power";
  131. ti,use_poweroff;
  132. };
  133. };
  134. };
  135. &i2c2 {
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&i2c2_pins>;
  138. clock-frequency = <400000>;
  139. };
  140. &i2c3 {
  141. pinctrl-names = "default";
  142. pinctrl-0 = <&i2c3_pins>;
  143. clock-frequency = <400000>;
  144. lp8720@7d {
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&lp8720_en_pin>;
  147. compatible = "ti,lp8720";
  148. reg = <0x7d>;
  149. enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* gpio_37 */
  150. lp8720_ldo1: ldo1 {
  151. regulator-min-microvolt = <3000000>;
  152. regulator-max-microvolt = <3000000>;
  153. };
  154. };
  155. };
  156. &mmc1 {
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&mmc1_pins &mmc1_cd_pin>;
  159. vmmc-supply = <&lp8720_ldo1>;
  160. cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* gpio 10 */
  161. bus-width = <4>;
  162. };
  163. &mmc2 {
  164. pinctrl-names = "default";
  165. pinctrl-0 = <&mmc2_pins>;
  166. vmmc-supply = <&vmmc2>;
  167. ti,non-removable;
  168. bus-width = <8>;
  169. };
  170. &mmc3 {
  171. status = "disabled";
  172. };
  173. &usb_otg_hs {
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&usb_otg_hs_pins>;
  176. interface-type = <0>;
  177. usb-phy = <&usb2_phy>;
  178. phys = <&usb2_phy>;
  179. phy-names = "usb2-phy";
  180. mode = <3>;
  181. power = <50>;
  182. };
  183. #include "twl4030.dtsi"
  184. #include "twl4030_omap3.dtsi"
  185. &twl_keypad {
  186. linux,keymap = <
  187. MATRIX_KEY(0x00, 0x00, KEY_VOLUMEUP)
  188. MATRIX_KEY(0x01, 0x00, KEY_VOLUMEDOWN)
  189. MATRIX_KEY(0x02, 0x00, KEY_SELECT)
  190. >;
  191. };
  192. /*
  193. * The TWL4030 VAUX2 and VDAC regulators power sensors that are slaves on I2C3.
  194. * When not powered, these sensors cause the I2C3 clock to stay low at all times,
  195. * making it impossible to reach other devices on I2C3.
  196. */
  197. &vaux2 {
  198. regulator-min-microvolt = <2800000>;
  199. regulator-max-microvolt = <2800000>;
  200. regulator-always-on;
  201. };
  202. &vdac {
  203. regulator-min-microvolt = <1800000>;
  204. regulator-max-microvolt = <1800000>;
  205. regulator-always-on;
  206. };