omap3-gta04.dtsi 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2013 Marek Belisko <[email protected]>
  4. *
  5. * Based on omap3-beagle-xm.dts
  6. */
  7. /dts-v1/;
  8. #include "omap36xx.dtsi"
  9. #include <dt-bindings/input/input.h>
  10. / {
  11. model = "OMAP3 GTA04";
  12. compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vcc>;
  16. };
  17. };
  18. memory@80000000 {
  19. device_type = "memory";
  20. reg = <0x80000000 0x20000000>; /* 512 MB */
  21. };
  22. chosen {
  23. stdout-path = &uart3;
  24. };
  25. aliases {
  26. display0 = &lcd;
  27. display1 = &tv0;
  28. /delete-property/ mmc2;
  29. /delete-property/ mmc3;
  30. };
  31. ldo_3v3: fixedregulator {
  32. compatible = "regulator-fixed";
  33. regulator-name = "ldo_3v3";
  34. regulator-min-microvolt = <3300000>;
  35. regulator-max-microvolt = <3300000>;
  36. regulator-always-on;
  37. };
  38. /* fixed 26MHz oscillator */
  39. hfclk_26m: oscillator {
  40. #clock-cells = <0>;
  41. compatible = "fixed-clock";
  42. clock-frequency = <26000000>;
  43. };
  44. gpio-keys {
  45. compatible = "gpio-keys";
  46. aux-button {
  47. label = "aux";
  48. linux,code = <KEY_PHONE>;
  49. gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  50. wakeup-source;
  51. };
  52. };
  53. antenna-detect {
  54. compatible = "gpio-keys";
  55. gps_antenna_button: gps-antenna-button {
  56. label = "GPS_EXT_ANT";
  57. linux,input-type = <EV_SW>;
  58. linux,code = <SW_LINEIN_INSERT>;
  59. gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */
  60. interrupt-parent = <&gpio5>;
  61. interrupts = <16 IRQ_TYPE_EDGE_BOTH>;
  62. debounce-interval = <10>;
  63. wakeup-source;
  64. };
  65. };
  66. sound {
  67. compatible = "ti,omap-twl4030";
  68. ti,model = "gta04";
  69. ti,mcbsp = <&mcbsp2>;
  70. };
  71. /* GSM audio */
  72. sound_telephony {
  73. compatible = "simple-audio-card";
  74. simple-audio-card,name = "GTA04 voice";
  75. simple-audio-card,bitclock-master = <&telephony_link_master>;
  76. simple-audio-card,frame-master = <&telephony_link_master>;
  77. simple-audio-card,format = "i2s";
  78. simple-audio-card,bitclock-inversion;
  79. simple-audio-card,frame-inversion;
  80. simple-audio-card,cpu {
  81. sound-dai = <&mcbsp4>;
  82. };
  83. telephony_link_master: simple-audio-card,codec {
  84. sound-dai = <&gtm601_codec>;
  85. };
  86. };
  87. gtm601_codec: gsm_codec {
  88. compatible = "option,gtm601";
  89. #sound-dai-cells = <0>;
  90. };
  91. spi_lcd: spi {
  92. compatible = "spi-gpio";
  93. #address-cells = <0x1>;
  94. #size-cells = <0x0>;
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&spi_gpio_pins>;
  97. sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  98. miso-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
  99. mosi-gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
  100. cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  101. num-chipselects = <1>;
  102. /* lcd panel */
  103. lcd: td028ttec1@0 {
  104. compatible = "tpo,td028ttec1";
  105. reg = <0>;
  106. spi-max-frequency = <100000>;
  107. spi-cpol;
  108. spi-cpha;
  109. backlight = <&backlight>;
  110. label = "lcd";
  111. port {
  112. lcd_in: endpoint {
  113. remote-endpoint = <&dpi_out>;
  114. };
  115. };
  116. };
  117. };
  118. backlight: backlight {
  119. compatible = "pwm-backlight";
  120. pwms = <&pwm11 0 12000000 0>;
  121. pwm-names = "backlight";
  122. brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
  123. default-brightness-level = <9>; /* => 90 */
  124. pinctrl-names = "default";
  125. pinctrl-0 = <&backlight_pins>;
  126. };
  127. pwm11: pwm-11 {
  128. compatible = "ti,omap-dmtimer-pwm";
  129. ti,timers = <&timer11>;
  130. #pwm-cells = <3>;
  131. ti,clock-source = <0x01>;
  132. };
  133. hsusb2_phy: hsusb2_phy {
  134. compatible = "usb-nop-xceiv";
  135. reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
  136. #phy-cells = <0>;
  137. };
  138. tv0: connector {
  139. compatible = "composite-video-connector";
  140. label = "tv";
  141. port {
  142. tv_connector_in: endpoint {
  143. remote-endpoint = <&opa_out>;
  144. };
  145. };
  146. };
  147. tv_amp: opa362 {
  148. compatible = "ti,opa362";
  149. enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; /* GPIO_23 to enable video out amplifier */
  150. ports {
  151. #address-cells = <1>;
  152. #size-cells = <0>;
  153. port@0 {
  154. reg = <0>;
  155. opa_in: endpoint {
  156. remote-endpoint = <&venc_out>;
  157. };
  158. };
  159. port@1 {
  160. reg = <1>;
  161. opa_out: endpoint {
  162. remote-endpoint = <&tv_connector_in>;
  163. };
  164. };
  165. };
  166. };
  167. wifi_pwrseq: wifi_pwrseq {
  168. compatible = "mmc-pwrseq-simple";
  169. reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>; /* W2CBW003 reset through tca6507 */
  170. };
  171. /* devconf0 setup for mcbsp1 clock pins */
  172. pinmux_mcbsp1@48002274 {
  173. compatible = "pinctrl-single";
  174. reg = <0x48002274 4>; /* CONTROL_DEVCONF0 */
  175. #address-cells = <1>;
  176. #size-cells = <0>;
  177. pinctrl-single,bit-per-mux;
  178. pinctrl-single,register-width = <32>;
  179. pinctrl-single,function-mask = <0x7>; /* MCBSP1 CLK pinmux */
  180. #pinctrl-cells = <2>;
  181. pinctrl-names = "default";
  182. pinctrl-0 = <&mcbsp1_devconf0_pins>;
  183. mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins {
  184. /* offset bits mask */
  185. pinctrl-single,bits = <0x00 0x08 0x1c>; /* set MCBSP1_CLKR */
  186. };
  187. };
  188. /* devconf1 setup for tvout pins */
  189. pinmux_tv_out@480022d8 {
  190. compatible = "pinctrl-single";
  191. reg = <0x480022d8 4>; /* CONTROL_DEVCONF1 */
  192. #address-cells = <1>;
  193. #size-cells = <0>;
  194. pinctrl-single,bit-per-mux;
  195. pinctrl-single,register-width = <32>;
  196. pinctrl-single,function-mask = <0x81>; /* TV out pin control */
  197. #pinctrl-cells = <2>;
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&tv_acbias_devconf1_pins>;
  200. tv_acbias_devconf1_pins: pinmux_tv_acbias_devconf1_pins {
  201. /* offset bits mask */
  202. pinctrl-single,bits = <0x00 0x40800 0x40800>; /* set TVOUTBYPASS and TVOUTACEN */
  203. };
  204. };
  205. };
  206. &omap3_pmx_wkup {
  207. gpio1_pins: pinmux_gpio1_pins {
  208. pinctrl-single,pins = <
  209. OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
  210. OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */
  211. >;
  212. };
  213. };
  214. &omap3_pmx_core {
  215. pinctrl-names = "default";
  216. pinctrl-0 = <
  217. &hsusb2_pins
  218. >;
  219. hsusb2_pins: pinmux_hsusb2_pins {
  220. pinctrl-single,pins = <
  221. OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
  222. OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
  223. OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
  224. OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
  225. OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
  226. OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
  227. >;
  228. };
  229. uart1_pins: pinmux_uart1_pins {
  230. pinctrl-single,pins = <
  231. OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
  232. OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
  233. >;
  234. };
  235. uart2_pins: pinmux_uart2_pins {
  236. pinctrl-single,pins = <
  237. OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
  238. OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
  239. >;
  240. };
  241. uart3_pins: pinmux_uart3_pins {
  242. pinctrl-single,pins = <
  243. OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
  244. OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
  245. >;
  246. };
  247. mmc1_pins: pinmux_mmc1_pins {
  248. pinctrl-single,pins = <
  249. OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
  250. OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
  251. OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
  252. OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
  253. OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
  254. OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
  255. >;
  256. };
  257. backlight_pins: backlight_pins_pinmux {
  258. pinctrl-single,pins = <
  259. OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3) /* gpt11/gpio57 */
  260. >;
  261. };
  262. dss_dpi_pins: pinmux_dss_dpi_pins {
  263. pinctrl-single,pins = <
  264. OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
  265. OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
  266. OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
  267. OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
  268. OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
  269. OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
  270. OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
  271. OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
  272. OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
  273. OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
  274. OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
  275. OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
  276. OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
  277. OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
  278. OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
  279. OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
  280. OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
  281. OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
  282. OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
  283. OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
  284. OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
  285. OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
  286. OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
  287. OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
  288. OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
  289. OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
  290. OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
  291. OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
  292. >;
  293. };
  294. gps_pins: pinmux_gps_pins {
  295. pinctrl-single,pins = <
  296. OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */
  297. >;
  298. };
  299. hdq_pins: hdq_pins {
  300. pinctrl-single,pins = <
  301. OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */
  302. >;
  303. };
  304. bmp085_pins: pinmux_bmp085_pins {
  305. pinctrl-single,pins = <
  306. OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */
  307. >;
  308. };
  309. bma180_pins: pinmux_bma180_pins {
  310. pinctrl-single,pins = <
  311. OMAP3_CORE1_IOPAD(0x213a, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio115 */
  312. >;
  313. };
  314. itg3200_pins: pinmux_itg3200_pins {
  315. pinctrl-single,pins = <
  316. OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio56 */
  317. >;
  318. };
  319. hmc5843_pins: pinmux_hmc5843_pins {
  320. pinctrl-single,pins = <
  321. OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
  322. >;
  323. };
  324. penirq_pins: pinmux_penirq_pins {
  325. pinctrl-single,pins = <
  326. /* here we could enable to wakeup the cpu from suspend by a pen touch */
  327. OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */
  328. >;
  329. };
  330. camera_pins: pinmux_camera_pins {
  331. pinctrl-single,pins = <
  332. /* set up parallel camera interface */
  333. OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */
  334. OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */
  335. OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
  336. OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */
  337. OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */
  338. OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */
  339. OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */
  340. OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */
  341. OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */
  342. OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */
  343. OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */
  344. OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */
  345. OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */
  346. OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */
  347. OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */
  348. OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
  349. OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
  350. OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */
  351. OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */
  352. OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */
  353. >;
  354. };
  355. mcbsp1_pins: pinmux_mcbsp1_pins {
  356. pinctrl-single,pins = <
  357. OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4) /* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */
  358. OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_clkr.mcbsp1_fsr */
  359. OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dx */
  360. OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0) /* mcbsp1_dx.mcbsp1_dr */
  361. /* mcbsp_clks is used as PENIRQ */
  362. /* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0) mcbsp_clks.mcbsp_clks */
  363. OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0) /* mcbsp_clks.mcbsp1_fsx */
  364. OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0) /* mcbsp1_clkx.mcbsp1_clkx */
  365. >;
  366. };
  367. mcbsp2_pins: pinmux_mcbsp2_pins {
  368. pinctrl-single,pins = <
  369. OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
  370. OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_clkx */
  371. OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dr */
  372. OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2_dx */
  373. >;
  374. };
  375. mcbsp3_pins: pinmux_mcbsp3_pins {
  376. pinctrl-single,pins = <
  377. OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dx */
  378. OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dx.mcbsp3_dr */
  379. OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_clkx */
  380. OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_clkx.mcbsp3_fsx */
  381. >;
  382. };
  383. mcbsp4_pins: pinmux_mcbsp4_pins {
  384. pinctrl-single,pins = <
  385. OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_clkx */
  386. OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_clkx.mcbsp4_dr */
  387. OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcbsp4_dx.mcbsp4_fsx */
  388. >;
  389. };
  390. };
  391. &omap3_pmx_core2 {
  392. pinctrl-names = "default";
  393. pinctrl-0 = <
  394. &hsusb2_2_pins
  395. >;
  396. hsusb2_2_pins: pinmux_hsusb2_2_pins {
  397. pinctrl-single,pins = <
  398. OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
  399. OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
  400. OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
  401. OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
  402. OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
  403. OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
  404. >;
  405. };
  406. spi_gpio_pins: spi_gpio_pinmux {
  407. pinctrl-single,pins = <
  408. OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */
  409. OMAP3630_CORE2_IOPAD(0x25e6, PIN_OUTPUT | MUX_MODE4) /* cs */
  410. OMAP3630_CORE2_IOPAD(0x25e8, PIN_OUTPUT | MUX_MODE4) /* tx */
  411. OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE4) /* rx */
  412. >;
  413. };
  414. };
  415. &i2c1 {
  416. clock-frequency = <2600000>;
  417. twl: twl@48 {
  418. reg = <0x48>;
  419. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  420. interrupt-parent = <&intc>;
  421. clocks = <&hfclk_26m>;
  422. clock-names = "fck";
  423. twl_audio: audio {
  424. compatible = "ti,twl4030-audio";
  425. ti,enable-vibra = <1>;
  426. codec {
  427. ti,ramp_delay_value = <3>;
  428. };
  429. };
  430. twl_power: power {
  431. compatible = "ti,twl4030-power-idle";
  432. ti,system-power-controller;
  433. };
  434. };
  435. };
  436. #include "twl4030.dtsi"
  437. #include "twl4030_omap3.dtsi"
  438. &i2c2 {
  439. clock-frequency = <400000>;
  440. /* pressure sensor */
  441. bmp085@77 {
  442. compatible = "bosch,bmp085";
  443. reg = <0x77>;
  444. pinctrl-names = "default";
  445. pinctrl-0 = <&bmp085_pins>;
  446. interrupt-parent = <&gpio4>;
  447. interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */
  448. vdda-supply = <&vio>;
  449. vddd-supply = <&vio>;
  450. };
  451. /* accelerometer */
  452. bma180@41 {
  453. compatible = "bosch,bma180";
  454. reg = <0x41>;
  455. pinctrl-names = "default";
  456. pinctrl-0 = <&bma180_pins>;
  457. interrupt-parent = <&gpio4>;
  458. interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */
  459. };
  460. /* gyroscope */
  461. itg3200@68 {
  462. compatible = "invensense,itg3200";
  463. reg = <0x68>;
  464. pinctrl-names = "default";
  465. pinctrl-0 = <&itg3200_pins>;
  466. interrupt-parent = <&gpio2>;
  467. interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* GPIO_56 */
  468. };
  469. /* leds + gpios */
  470. tca6507: tca6507@45 {
  471. compatible = "ti,tca6507";
  472. #address-cells = <1>;
  473. #size-cells = <0>;
  474. reg = <0x45>;
  475. gpio-controller;
  476. #gpio-cells = <2>;
  477. gta04_led0: led@0 {
  478. label = "gta04:red:aux";
  479. reg = <0x0>;
  480. };
  481. gta04_led1: led@1 {
  482. label = "gta04:green:aux";
  483. reg = <0x1>;
  484. };
  485. gta04_led3: led@3 {
  486. label = "gta04:red:power";
  487. reg = <0x3>;
  488. linux,default-trigger = "default-on";
  489. };
  490. gta04_led4: led@4 {
  491. label = "gta04:green:power";
  492. reg = <0x4>;
  493. };
  494. wifi_reset: led@6 {
  495. /* reference as <&tca_gpios 0 0> since it is currently the only GPIO */
  496. reg = <0x6>;
  497. compatible = "gpio";
  498. };
  499. };
  500. /* compass aka magnetometer */
  501. hmc5843@1e {
  502. compatible = "honeywell,hmc5883l";
  503. reg = <0x1e>;
  504. pinctrl-names = "default";
  505. pinctrl-0 = <&hmc5843_pins>;
  506. interrupt-parent = <&gpio4>;
  507. interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* gpio112 */
  508. };
  509. /* touchscreen */
  510. tsc2007@48 {
  511. compatible = "ti,tsc2007";
  512. reg = <0x48>;
  513. pinctrl-names = "default";
  514. pinctrl-0 = <&penirq_pins>;
  515. interrupt-parent = <&gpio6>;
  516. interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
  517. gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* GPIO_160 */
  518. ti,x-plate-ohms = <600>;
  519. touchscreen-size-x = <480>;
  520. touchscreen-size-y = <640>;
  521. touchscreen-max-pressure = <1000>;
  522. touchscreen-fuzz-x = <3>;
  523. touchscreen-fuzz-y = <8>;
  524. touchscreen-fuzz-pressure = <10>;
  525. touchscreen-inverted-y;
  526. };
  527. /* RFID EEPROM */
  528. m24lr64@50 {
  529. compatible = "atmel,24c64";
  530. reg = <0x50>;
  531. };
  532. };
  533. &i2c3 {
  534. clock-frequency = <100000>;
  535. };
  536. &mcspi1 {
  537. status = "disabled";
  538. };
  539. &mcspi2 {
  540. status = "disabled";
  541. };
  542. &mcspi3 {
  543. status = "disabled";
  544. };
  545. &mcspi4 {
  546. status = "disabled";
  547. };
  548. &usb_otg_hs {
  549. interface-type = <0>;
  550. usb-phy = <&usb2_phy>;
  551. phys = <&usb2_phy>;
  552. phy-names = "usb2-phy";
  553. mode = <3>;
  554. power = <50>;
  555. };
  556. &usbhshost {
  557. port2-mode = "ehci-phy";
  558. };
  559. &usbhsehci {
  560. phys = <0 &hsusb2_phy>;
  561. };
  562. &mmc1 {
  563. pinctrl-names = "default";
  564. pinctrl-0 = <&mmc1_pins>;
  565. vmmc-supply = <&vmmc1>;
  566. bus-width = <4>;
  567. ti,non-removable;
  568. broken-cd; /* hardware has no CD */
  569. };
  570. &mmc2 {
  571. vmmc-supply = <&vaux4>;
  572. bus-width = <4>;
  573. ti,non-removable;
  574. cap-power-off-card;
  575. mmc-pwrseq = <&wifi_pwrseq>;
  576. };
  577. &mmc3 {
  578. status = "disabled";
  579. };
  580. #define BIT(x) (1 << (x))
  581. &twl_gpio {
  582. /* pullups: BIT(2) */
  583. ti,pullups = <BIT(2)>;
  584. /*
  585. * pulldowns:
  586. * BIT(0), BIT(1), BIT(6), BIT(7), BIT(8), BIT(13)
  587. * BIT(15), BIT(16), BIT(17)
  588. */
  589. ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) |
  590. BIT(13) | BIT(15) | BIT(16) | BIT(17))>;
  591. };
  592. &twl_keypad {
  593. status = "disabled";
  594. };
  595. &gpio1 {
  596. pinctrl-names = "default";
  597. pinctrl-0 = <&gpio1_pins>;
  598. };
  599. &uart1 {
  600. pinctrl-names = "default";
  601. pinctrl-0 = <&uart1_pins>;
  602. };
  603. &uart2 {
  604. pinctrl-names = "default";
  605. pinctrl-0 = <&uart2_pins>;
  606. gnss: gnss {
  607. compatible = "wi2wi,w2sg0004";
  608. pinctrl-names = "default";
  609. pinctrl-0 = <&gps_pins>;
  610. sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
  611. lna-supply = <&vsim>;
  612. vcc-supply = <&ldo_3v3>;
  613. };
  614. };
  615. &uart3 {
  616. pinctrl-names = "default";
  617. pinctrl-0 = <&uart3_pins>;
  618. interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
  619. };
  620. &charger {
  621. ti,bb-uvolt = <3200000>;
  622. ti,bb-uamp = <150>;
  623. };
  624. /* spare */
  625. &vaux1 {
  626. regulator-min-microvolt = <2500000>;
  627. regulator-max-microvolt = <3000000>;
  628. };
  629. /* sensors */
  630. &vaux2 {
  631. regulator-min-microvolt = <2800000>;
  632. regulator-max-microvolt = <2800000>;
  633. regulator-always-on; /* we should never switch off while vio is on! */
  634. };
  635. /* camera */
  636. &vaux3 {
  637. regulator-min-microvolt = <2500000>;
  638. regulator-max-microvolt = <2500000>;
  639. };
  640. /* WLAN/BT */
  641. &vaux4 {
  642. regulator-min-microvolt = <2800000>;
  643. regulator-max-microvolt = <3150000>;
  644. };
  645. /* GPS LNA */
  646. &vsim {
  647. regulator-min-microvolt = <2800000>;
  648. regulator-max-microvolt = <3150000>;
  649. };
  650. /* Needed to power the DPI pins */
  651. &vpll2 {
  652. regulator-always-on;
  653. };
  654. &dss {
  655. pinctrl-names = "default";
  656. pinctrl-0 = < &dss_dpi_pins >;
  657. status = "okay";
  658. vdds_dsi-supply = <&vpll2>;
  659. port {
  660. dpi_out: endpoint {
  661. remote-endpoint = <&lcd_in>;
  662. data-lines = <24>;
  663. };
  664. };
  665. };
  666. &venc {
  667. status = "okay";
  668. vdda-supply = <&vdac>;
  669. port {
  670. venc_out: endpoint {
  671. remote-endpoint = <&opa_in>;
  672. ti,channels = <1>;
  673. ti,invert-polarity;
  674. };
  675. };
  676. };
  677. &gpmc {
  678. ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
  679. nand@0,0 {
  680. compatible = "ti,omap2-nand";
  681. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  682. interrupt-parent = <&gpmc>;
  683. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  684. <1 IRQ_TYPE_NONE>; /* termcount */
  685. ti,nand-ecc-opt = "ham1";
  686. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  687. nand-bus-width = <16>;
  688. #address-cells = <1>;
  689. #size-cells = <1>;
  690. gpmc,device-width = <2>;
  691. gpmc,cs-on-ns = <0>;
  692. gpmc,cs-rd-off-ns = <44>;
  693. gpmc,cs-wr-off-ns = <44>;
  694. gpmc,adv-on-ns = <6>;
  695. gpmc,adv-rd-off-ns = <34>;
  696. gpmc,adv-wr-off-ns = <44>;
  697. gpmc,oe-off-ns = <54>;
  698. gpmc,we-off-ns = <40>;
  699. gpmc,access-ns = <64>;
  700. gpmc,rd-cycle-ns = <82>;
  701. gpmc,wr-cycle-ns = <82>;
  702. gpmc,wr-access-ns = <40>;
  703. gpmc,wr-data-mux-bus-ns = <0>;
  704. gpmc,sync-clk-ps = <0>;
  705. x-loader@0 {
  706. label = "X-Loader";
  707. reg = <0 0x80000>;
  708. };
  709. bootloaders@80000 {
  710. label = "U-Boot";
  711. reg = <0x80000 0x1c0000>;
  712. };
  713. bootloaders_env@240000 {
  714. label = "U-Boot Env";
  715. reg = <0x240000 0x40000>;
  716. };
  717. kernel@280000 {
  718. label = "Kernel";
  719. reg = <0x280000 0x600000>;
  720. };
  721. filesystem@880000 {
  722. label = "File System";
  723. reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */
  724. };
  725. };
  726. };
  727. &mcbsp1 { /* FM Transceiver PCM */
  728. status = "okay";
  729. #sound-dai-cells = <0>;
  730. pinctrl-names = "default";
  731. pinctrl-0 = <&mcbsp1_pins>;
  732. };
  733. &mcbsp2 { /* TPS65950 I2S */
  734. status = "okay";
  735. pinctrl-names = "default";
  736. pinctrl-0 = <&mcbsp2_pins>;
  737. };
  738. &mcbsp3 { /* Bluetooth PCM */
  739. status = "okay";
  740. #sound-dai-cells = <0>;
  741. pinctrl-names = "default";
  742. pinctrl-0 = <&mcbsp3_pins>;
  743. };
  744. &mcbsp4 { /* GSM voice PCM */
  745. status = "okay";
  746. #sound-dai-cells = <0>;
  747. pinctrl-names = "default";
  748. pinctrl-0 = <&mcbsp4_pins>;
  749. };
  750. &hdqw1w {
  751. pinctrl-names = "default";
  752. pinctrl-0 = <&hdq_pins>;
  753. };
  754. /* image signal processor within OMAP3 SoC */
  755. &isp {
  756. ports {
  757. port@0 {
  758. reg = <0>;
  759. parallel_ep: endpoint {
  760. ti,isp-clock-divisor = <1>;
  761. ti,strobe-mode;
  762. bus-width = <8>;/* Used data lines */
  763. data-shift = <2>; /* Lines 9:2 are used */
  764. hsync-active = <0>; /* Active low */
  765. vsync-active = <1>; /* Active high */
  766. data-active = <1>;/* Active high */
  767. pclk-sample = <1>;/* Falling */
  768. };
  769. };
  770. /* port@1 and port@2 are not used by GTA04 */
  771. };
  772. };