omap3-devkit8000-common.dtsi 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Author: Anil Kumar <[email protected]>
  4. */
  5. #include <dt-bindings/input/input.h>
  6. #include "omap34xx.dtsi"
  7. / {
  8. memory@80000000 {
  9. device_type = "memory";
  10. reg = <0x80000000 0x10000000>; /* 256 MB */
  11. };
  12. leds {
  13. compatible = "gpio-leds";
  14. heartbeat {
  15. label = "devkit8000::led1";
  16. gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
  17. default-state = "on";
  18. linux,default-trigger = "heartbeat";
  19. };
  20. mmc {
  21. label = "devkit8000::led2";
  22. gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
  23. default-state = "on";
  24. linux,default-trigger = "none";
  25. };
  26. usr {
  27. label = "devkit8000::led3";
  28. gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
  29. default-state = "on";
  30. linux,default-trigger = "usr";
  31. };
  32. pmu_stat {
  33. label = "devkit8000::pmu_stat";
  34. gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
  35. };
  36. };
  37. sound {
  38. compatible = "ti,omap-twl4030";
  39. ti,model = "devkit8000";
  40. ti,mcbsp = <&mcbsp2>;
  41. ti,audio-routing =
  42. "Ext Spk", "PREDRIVEL",
  43. "Ext Spk", "PREDRIVER",
  44. "MAINMIC", "Main Mic",
  45. "Main Mic", "Mic Bias 1";
  46. };
  47. gpio_keys {
  48. compatible = "gpio-keys";
  49. user {
  50. label = "user";
  51. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  52. linux,code = <BTN_EXTRA>;
  53. wakeup-source;
  54. };
  55. };
  56. tfp410: encoder0 {
  57. compatible = "ti,tfp410";
  58. powerdown-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
  59. ports {
  60. #address-cells = <1>;
  61. #size-cells = <0>;
  62. port@0 {
  63. reg = <0>;
  64. tfp410_in: endpoint {
  65. remote-endpoint = <&dpi_dvi_out>;
  66. };
  67. };
  68. port@1 {
  69. reg = <1>;
  70. tfp410_out: endpoint {
  71. remote-endpoint = <&dvi_connector_in>;
  72. };
  73. };
  74. };
  75. };
  76. dvi0: connector0 {
  77. compatible = "dvi-connector";
  78. label = "dvi";
  79. digital;
  80. ddc-i2c-bus = <&i2c2>;
  81. port {
  82. dvi_connector_in: endpoint {
  83. remote-endpoint = <&tfp410_out>;
  84. };
  85. };
  86. };
  87. tv0: connector1 {
  88. compatible = "svideo-connector";
  89. label = "tv";
  90. port {
  91. tv_connector_in: endpoint {
  92. remote-endpoint = <&venc_out>;
  93. };
  94. };
  95. };
  96. };
  97. &i2c1 {
  98. clock-frequency = <2600000>;
  99. twl: twl@48 {
  100. reg = <0x48>;
  101. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  102. twl_audio: audio {
  103. compatible = "ti,twl4030-audio";
  104. codec {
  105. };
  106. };
  107. };
  108. };
  109. &i2c2 {
  110. clock-frequency = <400000>;
  111. };
  112. &i2c3 {
  113. status = "disabled";
  114. };
  115. #include "twl4030.dtsi"
  116. #include "twl4030_omap3.dtsi"
  117. &mmc1 {
  118. vmmc-supply = <&vmmc1>;
  119. vqmmc-supply = <&vsim>;
  120. bus-width = <8>;
  121. };
  122. &mmc2 {
  123. status = "disabled";
  124. };
  125. &mmc3 {
  126. status = "disabled";
  127. };
  128. /* Unusable as clockevent because if unreliable oscillator, allow to idle */
  129. &timer1_target {
  130. /delete-property/ti,no-reset-on-init;
  131. /delete-property/ti,no-idle;
  132. timer@0 {
  133. /delete-property/ti,timer-alwon;
  134. };
  135. };
  136. /* Preferred timer for clockevent */
  137. &timer12_target {
  138. ti,no-reset-on-init;
  139. ti,no-idle;
  140. timer@0 {
  141. /* Always clocked by secure_32k_fck */
  142. };
  143. };
  144. &twl_gpio {
  145. ti,use-leds;
  146. /*
  147. * pulldowns:
  148. * BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
  149. * BIT(15), BIT(16), BIT(17)
  150. */
  151. ti,pulldowns = <0x03a1c6>;
  152. };
  153. &twl_keypad {
  154. linux,keymap = <MATRIX_KEY(0, 0, KEY_1)
  155. MATRIX_KEY(1, 0, KEY_2)
  156. MATRIX_KEY(2, 0, KEY_3)
  157. MATRIX_KEY(0, 1, KEY_4)
  158. MATRIX_KEY(1, 1, KEY_5)
  159. MATRIX_KEY(2, 1, KEY_6)
  160. MATRIX_KEY(3, 1, KEY_F5)
  161. MATRIX_KEY(0, 2, KEY_7)
  162. MATRIX_KEY(1, 2, KEY_8)
  163. MATRIX_KEY(2, 2, KEY_9)
  164. MATRIX_KEY(3, 2, KEY_F6)
  165. MATRIX_KEY(0, 3, KEY_F7)
  166. MATRIX_KEY(1, 3, KEY_0)
  167. MATRIX_KEY(2, 3, KEY_F8)
  168. MATRIX_KEY(4, 5, KEY_RESERVED)
  169. MATRIX_KEY(4, 4, KEY_VOLUMEUP)
  170. MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
  171. >;
  172. };
  173. &wdt2 {
  174. status = "disabled";
  175. };
  176. &mcbsp2 {
  177. status = "okay";
  178. };
  179. &gpmc {
  180. ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
  181. 6 0 0x2c000000 0x1000000>; /* CS6: 16MB for DM9000 */
  182. nand@0,0 {
  183. compatible = "ti,omap2-nand";
  184. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  185. interrupt-parent = <&gpmc>;
  186. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  187. <1 IRQ_TYPE_NONE>; /* termcount */
  188. nand-bus-width = <16>;
  189. gpmc,device-width = <2>;
  190. ti,nand-ecc-opt = "sw";
  191. gpmc,sync-clk-ps = <0>;
  192. gpmc,cs-on-ns = <0>;
  193. gpmc,cs-rd-off-ns = <44>;
  194. gpmc,cs-wr-off-ns = <44>;
  195. gpmc,adv-on-ns = <6>;
  196. gpmc,adv-rd-off-ns = <34>;
  197. gpmc,adv-wr-off-ns = <44>;
  198. gpmc,we-off-ns = <40>;
  199. gpmc,oe-off-ns = <54>;
  200. gpmc,access-ns = <64>;
  201. gpmc,rd-cycle-ns = <82>;
  202. gpmc,wr-cycle-ns = <82>;
  203. gpmc,wr-access-ns = <40>;
  204. gpmc,wr-data-mux-bus-ns = <0>;
  205. #address-cells = <1>;
  206. #size-cells = <1>;
  207. x-loader@0 {
  208. label = "X-Loader";
  209. reg = <0 0x80000>;
  210. };
  211. bootloaders@80000 {
  212. label = "U-Boot";
  213. reg = <0x80000 0x1e0000>;
  214. };
  215. bootloaders_env@260000 {
  216. label = "U-Boot Env";
  217. reg = <0x260000 0x20000>;
  218. };
  219. kernel@280000 {
  220. label = "Kernel";
  221. reg = <0x280000 0x400000>;
  222. };
  223. filesystem@680000 {
  224. label = "File System";
  225. reg = <0x680000 0xf980000>;
  226. };
  227. };
  228. ethernet@6,0 {
  229. compatible = "davicom,dm9000";
  230. reg = <6 0x000 2
  231. 6 0x400 2>; /* CS6, offset 0 and 0x400, IO size 2 */
  232. bank-width = <2>;
  233. interrupt-parent = <&gpio1>;
  234. interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
  235. davicom,no-eeprom;
  236. gpmc,mux-add-data = <0>;
  237. gpmc,device-width = <1>;
  238. gpmc,wait-pin = <0>;
  239. gpmc,cycle2cycle-samecsen;
  240. gpmc,cycle2cycle-diffcsen;
  241. gpmc,cs-on-ns = <6>;
  242. gpmc,cs-rd-off-ns = <180>;
  243. gpmc,cs-wr-off-ns = <180>;
  244. gpmc,adv-on-ns = <0>;
  245. gpmc,adv-rd-off-ns = <18>;
  246. gpmc,adv-wr-off-ns = <48>;
  247. gpmc,oe-on-ns = <54>;
  248. gpmc,oe-off-ns = <168>;
  249. gpmc,we-on-ns = <54>;
  250. gpmc,we-off-ns = <168>;
  251. gpmc,rd-cycle-ns = <186>;
  252. gpmc,wr-cycle-ns = <186>;
  253. gpmc,access-ns = <144>;
  254. gpmc,page-burst-access-ns = <24>;
  255. gpmc,bus-turnaround-ns = <90>;
  256. gpmc,cycle2cycle-delay-ns = <90>;
  257. gpmc,wait-monitoring-ns = <0>;
  258. gpmc,clk-activation-ns = <0>;
  259. gpmc,wr-data-mux-bus-ns = <0>;
  260. gpmc,wr-access-ns = <0>;
  261. };
  262. };
  263. &omap3_pmx_core {
  264. dss_dpi_pins: pinmux_dss_dpi_pins {
  265. pinctrl-single,pins = <
  266. OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
  267. OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
  268. OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
  269. OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
  270. OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
  271. OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
  272. OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
  273. OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
  274. OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
  275. OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
  276. OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
  277. OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
  278. OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
  279. OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
  280. OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
  281. OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
  282. OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
  283. OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
  284. OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
  285. OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
  286. OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
  287. OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
  288. OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
  289. OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
  290. OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
  291. OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
  292. OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
  293. OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
  294. >;
  295. };
  296. };
  297. &vpll1 {
  298. /* Needed for DSS */
  299. regulator-name = "vdds_dsi";
  300. regulator-min-microvolt = <1800000>;
  301. regulator-max-microvolt = <1800000>;
  302. };
  303. &dss {
  304. status = "okay";
  305. pinctrl-names = "default";
  306. pinctrl-0 = <&dss_dpi_pins>;
  307. vdds_dsi-supply = <&vpll1>;
  308. vdda_dac-supply = <&vdac>;
  309. port {
  310. #address-cells = <1>;
  311. #size-cells = <0>;
  312. dpi_dvi_out: endpoint@0 {
  313. reg = <0>;
  314. remote-endpoint = <&tfp410_in>;
  315. data-lines = <24>;
  316. };
  317. endpoint@1 {
  318. reg = <1>;
  319. };
  320. };
  321. };
  322. &venc {
  323. status = "okay";
  324. vdda-supply = <&vdac>;
  325. port {
  326. venc_out: endpoint {
  327. remote-endpoint = <&tv_connector_in>;
  328. ti,channels = <2>;
  329. };
  330. };
  331. };