omap3-cm-t3517.dts 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Support for CompuLab CM-T3517
  4. */
  5. /dts-v1/;
  6. #include "am3517.dtsi"
  7. #include "omap3-cm-t3x.dtsi"
  8. / {
  9. model = "CompuLab CM-T3517";
  10. compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
  11. vmmc: regulator-vmmc {
  12. compatible = "regulator-fixed";
  13. regulator-name = "vmmc";
  14. regulator-min-microvolt = <3300000>;
  15. regulator-max-microvolt = <3300000>;
  16. };
  17. wl12xx_vmmc2: wl12xx_vmmc2 {
  18. compatible = "regulator-fixed";
  19. regulator-name = "vw1271";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <
  22. &wl12xx_wkup_pins
  23. &wl12xx_core_pins
  24. >;
  25. regulator-min-microvolt = <1800000>;
  26. regulator-max-microvolt = <1800000>;
  27. gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
  28. startup-delay-us = <20000>;
  29. enable-active-high;
  30. };
  31. wl12xx_vaux2: wl12xx_vaux2 {
  32. compatible = "regulator-fixed";
  33. regulator-name = "vwl1271_vaux2";
  34. regulator-min-microvolt = <1800000>;
  35. regulator-max-microvolt = <1800000>;
  36. };
  37. };
  38. &omap3_pmx_wkup {
  39. wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
  40. pinctrl-single,pins = <
  41. OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
  42. OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
  43. >;
  44. };
  45. };
  46. &omap3_pmx_core {
  47. phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
  48. pinctrl-single,pins = <
  49. OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
  50. >;
  51. };
  52. phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
  53. pinctrl-single,pins = <
  54. OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
  55. >;
  56. };
  57. otg_drv_vbus: pinmux_otg_drv_vbus {
  58. pinctrl-single,pins = <
  59. OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
  60. >;
  61. };
  62. mmc2_pins: pinmux_mmc2_pins {
  63. pinctrl-single,pins = <
  64. OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
  65. OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
  66. OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
  67. OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
  68. OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
  69. OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
  70. >;
  71. };
  72. wl12xx_core_pins: pinmux_wl12xx_core_pins {
  73. pinctrl-single,pins = <
  74. OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
  75. OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
  76. >;
  77. };
  78. usb_hub_pins: pinmux_usb_hub_pins {
  79. pinctrl-single,pins = <
  80. OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
  81. >;
  82. };
  83. };
  84. &hsusb1_phy {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&phy1_reset_pins>;
  87. reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
  88. };
  89. &hsusb2_phy {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&phy2_reset_pins>;
  92. reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
  93. };
  94. &davinci_emac {
  95. status = "okay";
  96. };
  97. &davinci_mdio {
  98. status = "okay";
  99. };
  100. &am35x_otg_hs {
  101. status = "okay";
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&otg_drv_vbus>;
  104. };
  105. &mmc1 {
  106. vmmc-supply = <&vmmc>;
  107. };
  108. &mmc2 {
  109. pinctrl-names = "default";
  110. pinctrl-0 = <&mmc2_pins>;
  111. vmmc-supply = <&wl12xx_vmmc2>;
  112. vqmmc-supply = <&wl12xx_vaux2>;
  113. non-removable;
  114. bus-width = <4>;
  115. cap-power-off-card;
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. wlcore: wlcore@2 {
  119. compatible = "ti,wl1271";
  120. reg = <2>;
  121. interrupt-parent = <&gpio5>;
  122. interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */
  123. ref-clock-frequency = <38400000>;
  124. };
  125. };
  126. &dss {
  127. status = "okay";
  128. pinctrl-names = "default";
  129. pinctrl-0 = <
  130. &dss_dpi_pins_common
  131. &dss_dpi_pins_cm_t35x
  132. >;
  133. };