omap-zoom-common.dtsi 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Common features on the Zoom debug board
  4. */
  5. #include "omap-gpmc-smsc911x.dtsi"
  6. &gpmc {
  7. ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */
  8. <7 0 0x2c000000 0x01000000>;
  9. /*
  10. * Four port TL16CP754C serial port on GPMC,
  11. * they probably share the same GPIO IRQ
  12. * REVISIT: Add timing support from slls644g.pdf
  13. */
  14. uart@3,0 {
  15. compatible = "ns16550a";
  16. reg = <3 0 8>; /* CS3, offset 0, IO size 8 */
  17. bank-width = <2>;
  18. reg-shift = <1>;
  19. reg-io-width = <1>;
  20. interrupt-parent = <&gpio4>;
  21. interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
  22. clock-frequency = <1843200>;
  23. current-speed = <115200>;
  24. gpmc,mux-add-data = <0>;
  25. gpmc,device-width = <1>;
  26. gpmc,wait-pin = <1>;
  27. gpmc,cycle2cycle-samecsen;
  28. gpmc,cycle2cycle-diffcsen;
  29. gpmc,cs-on-ns = <5>;
  30. gpmc,cs-rd-off-ns = <155>;
  31. gpmc,cs-wr-off-ns = <155>;
  32. gpmc,adv-on-ns = <15>;
  33. gpmc,adv-rd-off-ns = <40>;
  34. gpmc,adv-wr-off-ns = <40>;
  35. gpmc,oe-on-ns = <45>;
  36. gpmc,oe-off-ns = <145>;
  37. gpmc,we-on-ns = <45>;
  38. gpmc,we-off-ns = <145>;
  39. gpmc,rd-cycle-ns = <155>;
  40. gpmc,wr-cycle-ns = <155>;
  41. gpmc,access-ns = <145>;
  42. gpmc,page-burst-access-ns = <20>;
  43. gpmc,bus-turnaround-ns = <20>;
  44. gpmc,cycle2cycle-delay-ns = <20>;
  45. gpmc,wait-monitoring-ns = <0>;
  46. gpmc,clk-activation-ns = <0>;
  47. gpmc,wr-data-mux-bus-ns = <45>;
  48. gpmc,wr-access-ns = <145>;
  49. };
  50. uart@3,1 {
  51. compatible = "ns16550a";
  52. reg = <3 0x100 8>; /* CS3, offset 0x100, IO size 8 */
  53. bank-width = <2>;
  54. reg-shift = <1>;
  55. reg-io-width = <1>;
  56. interrupt-parent = <&gpio4>;
  57. interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
  58. clock-frequency = <1843200>;
  59. current-speed = <115200>;
  60. };
  61. uart@3,2 {
  62. compatible = "ns16550a";
  63. reg = <3 0x200 8>; /* CS3, offset 0x200, IO size 8 */
  64. bank-width = <2>;
  65. reg-shift = <1>;
  66. reg-io-width = <1>;
  67. interrupt-parent = <&gpio4>;
  68. interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
  69. clock-frequency = <1843200>;
  70. current-speed = <115200>;
  71. };
  72. uart@3,3 {
  73. compatible = "ns16550a";
  74. reg = <3 0x300 8>; /* CS3, offset 0x300, IO size 8 */
  75. bank-width = <2>;
  76. reg-shift = <1>;
  77. reg-io-width = <1>;
  78. interrupt-parent = <&gpio4>;
  79. interrupts = <6 IRQ_TYPE_EDGE_RISING>; /* gpio102 */
  80. clock-frequency = <1843200>;
  81. current-speed = <115200>;
  82. };
  83. ethernet@gpmc {
  84. reg = <7 0 0xff>;
  85. interrupt-parent = <&gpio5>;
  86. interrupts = <30 IRQ_TYPE_LEVEL_LOW>; /* gpio158 */
  87. };
  88. };