mt7623n-rfb-emmc.dts 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2017-2018 MediaTek Inc.
  4. * Author: Sean Wang <[email protected]>
  5. *
  6. */
  7. /dts-v1/;
  8. #include <dt-bindings/input/input.h>
  9. #include "mt7623n.dtsi"
  10. #include "mt6323.dtsi"
  11. / {
  12. model = "MediaTek MT7623N with eMMC reference board";
  13. compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
  14. aliases {
  15. serial0 = &uart0;
  16. serial1 = &uart1;
  17. serial2 = &uart2;
  18. };
  19. chosen {
  20. stdout-path = "serial2:115200n8";
  21. };
  22. connector {
  23. compatible = "hdmi-connector";
  24. label = "hdmi";
  25. type = "d";
  26. ddc-i2c-bus = <&hdmiddc0>;
  27. port {
  28. hdmi_connector_in: endpoint {
  29. remote-endpoint = <&hdmi0_out>;
  30. };
  31. };
  32. };
  33. cpus {
  34. cpu@0 {
  35. proc-supply = <&mt6323_vproc_reg>;
  36. };
  37. cpu@1 {
  38. proc-supply = <&mt6323_vproc_reg>;
  39. };
  40. cpu@2 {
  41. proc-supply = <&mt6323_vproc_reg>;
  42. };
  43. cpu@3 {
  44. proc-supply = <&mt6323_vproc_reg>;
  45. };
  46. };
  47. gpio-keys {
  48. compatible = "gpio-keys";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&key_pins_a>;
  51. button-factory {
  52. label = "factory";
  53. linux,code = <BTN_0>;
  54. gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  55. };
  56. button-wps {
  57. label = "wps";
  58. linux,code = <KEY_WPS_BUTTON>;
  59. gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
  60. };
  61. };
  62. memory@80000000 {
  63. device_type = "memory";
  64. reg = <0 0x80000000 0 0x40000000>;
  65. };
  66. reg_1p8v: regulator-1p8v {
  67. compatible = "regulator-fixed";
  68. regulator-name = "fixed-1.8V";
  69. regulator-min-microvolt = <1800000>;
  70. regulator-max-microvolt = <1800000>;
  71. regulator-boot-on;
  72. regulator-always-on;
  73. };
  74. reg_3p3v: regulator-3p3v {
  75. compatible = "regulator-fixed";
  76. regulator-name = "fixed-3.3V";
  77. regulator-min-microvolt = <3300000>;
  78. regulator-max-microvolt = <3300000>;
  79. regulator-boot-on;
  80. regulator-always-on;
  81. };
  82. reg_5v: regulator-5v {
  83. compatible = "regulator-fixed";
  84. regulator-name = "fixed-5V";
  85. regulator-min-microvolt = <5000000>;
  86. regulator-max-microvolt = <5000000>;
  87. regulator-boot-on;
  88. regulator-always-on;
  89. };
  90. sound {
  91. compatible = "mediatek,mt2701-wm8960-machine";
  92. mediatek,platform = <&afe>;
  93. audio-routing =
  94. "Headphone", "HP_L",
  95. "Headphone", "HP_R",
  96. "LINPUT1", "AMIC",
  97. "RINPUT1", "AMIC";
  98. mediatek,audio-codec = <&wm8960>;
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&i2s0_pins_a>;
  101. };
  102. };
  103. &bls {
  104. status = "okay";
  105. };
  106. &btif {
  107. status = "okay";
  108. };
  109. &cec {
  110. status = "okay";
  111. };
  112. &cir {
  113. pinctrl-names = "default";
  114. pinctrl-0 = <&cir_pins_a>;
  115. status = "okay";
  116. };
  117. &crypto {
  118. status = "okay";
  119. };
  120. &dpi0 {
  121. status = "okay";
  122. ports {
  123. #address-cells = <1>;
  124. #size-cells = <0>;
  125. port@0 {
  126. reg = <0>;
  127. dpi0_out: endpoint {
  128. remote-endpoint = <&hdmi0_in>;
  129. };
  130. };
  131. };
  132. };
  133. &eth {
  134. status = "okay";
  135. gmac0: mac@0 {
  136. compatible = "mediatek,eth-mac";
  137. reg = <0>;
  138. phy-mode = "trgmii";
  139. fixed-link {
  140. speed = <1000>;
  141. full-duplex;
  142. pause;
  143. };
  144. };
  145. mac@1 {
  146. compatible = "mediatek,eth-mac";
  147. reg = <1>;
  148. phy-mode = "rgmii";
  149. phy-handle = <&phy5>;
  150. };
  151. mdio-bus {
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. phy5: ethernet-phy@5 {
  155. reg = <5>;
  156. phy-mode = "rgmii-rxid";
  157. };
  158. switch@0 {
  159. compatible = "mediatek,mt7530";
  160. reg = <0>;
  161. reset-gpios = <&pio 33 0>;
  162. core-supply = <&mt6323_vpa_reg>;
  163. io-supply = <&mt6323_vemc3v3_reg>;
  164. ports {
  165. #address-cells = <1>;
  166. #size-cells = <0>;
  167. port@0 {
  168. reg = <0>;
  169. label = "lan0";
  170. };
  171. port@1 {
  172. reg = <1>;
  173. label = "lan1";
  174. };
  175. port@2 {
  176. reg = <2>;
  177. label = "lan2";
  178. };
  179. port@3 {
  180. reg = <3>;
  181. label = "lan3";
  182. };
  183. port@4 {
  184. reg = <4>;
  185. label = "wan";
  186. };
  187. port@6 {
  188. reg = <6>;
  189. label = "cpu";
  190. ethernet = <&gmac0>;
  191. phy-mode = "trgmii";
  192. fixed-link {
  193. speed = <1000>;
  194. full-duplex;
  195. };
  196. };
  197. };
  198. };
  199. };
  200. };
  201. &hdmi0 {
  202. pinctrl-names = "default";
  203. pinctrl-0 = <&hdmi_pins_a>;
  204. status = "okay";
  205. ports {
  206. #address-cells = <1>;
  207. #size-cells = <0>;
  208. port@0 {
  209. reg = <0>;
  210. hdmi0_in: endpoint {
  211. remote-endpoint = <&dpi0_out>;
  212. };
  213. };
  214. port@1 {
  215. reg = <1>;
  216. hdmi0_out: endpoint {
  217. remote-endpoint = <&hdmi_connector_in>;
  218. };
  219. };
  220. };
  221. };
  222. &hdmiddc0 {
  223. pinctrl-names = "default";
  224. pinctrl-0 = <&hdmi_ddc_pins_a>;
  225. status = "okay";
  226. };
  227. &hdmi_phy {
  228. mediatek,ibias = <0xa>;
  229. mediatek,ibias_up = <0x1c>;
  230. status = "okay";
  231. };
  232. &i2c0 {
  233. pinctrl-names = "default";
  234. pinctrl-0 = <&i2c0_pins_a>;
  235. status = "okay";
  236. };
  237. &i2c1 {
  238. pinctrl-names = "default";
  239. pinctrl-0 = <&i2c1_pins_b>;
  240. status = "okay";
  241. wm8960: wm8960@1a {
  242. compatible = "wlf,wm8960";
  243. reg = <0x1a>;
  244. };
  245. };
  246. &i2c2 {
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&i2c2_pins_a>;
  249. status = "okay";
  250. };
  251. &mmc0 {
  252. pinctrl-names = "default", "state_uhs";
  253. pinctrl-0 = <&mmc0_pins_default>;
  254. pinctrl-1 = <&mmc0_pins_uhs>;
  255. status = "okay";
  256. bus-width = <8>;
  257. max-frequency = <50000000>;
  258. cap-mmc-highspeed;
  259. vmmc-supply = <&reg_3p3v>;
  260. vqmmc-supply = <&reg_1p8v>;
  261. non-removable;
  262. };
  263. &mmc1 {
  264. pinctrl-names = "default", "state_uhs";
  265. pinctrl-0 = <&mmc1_pins_default>;
  266. pinctrl-1 = <&mmc1_pins_uhs>;
  267. status = "okay";
  268. bus-width = <4>;
  269. max-frequency = <50000000>;
  270. cap-sd-highspeed;
  271. cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
  272. vmmc-supply = <&reg_3p3v>;
  273. vqmmc-supply = <&reg_3p3v>;
  274. };
  275. &pcie {
  276. pinctrl-names = "default";
  277. pinctrl-0 = <&pcie_default>;
  278. status = "okay";
  279. pcie@0,0 {
  280. status = "okay";
  281. };
  282. pcie@1,0 {
  283. status = "okay";
  284. };
  285. };
  286. &pcie0_phy {
  287. status = "okay";
  288. };
  289. &pcie1_phy {
  290. status = "okay";
  291. };
  292. &pwm {
  293. pinctrl-names = "default";
  294. pinctrl-0 = <&pwm_pins_a>;
  295. status = "okay";
  296. };
  297. &spi0 {
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&spi0_pins_a>;
  300. status = "okay";
  301. };
  302. &spi1 {
  303. pinctrl-names = "default";
  304. pinctrl-0 = <&spi1_pins_a>;
  305. status = "okay";
  306. };
  307. &spi2 {
  308. pinctrl-names = "default";
  309. pinctrl-0 = <&spi2_pins_a>;
  310. status = "okay";
  311. };
  312. &uart0 {
  313. pinctrl-names = "default";
  314. pinctrl-0 = <&uart0_pins_a>;
  315. status = "okay";
  316. };
  317. &uart1 {
  318. pinctrl-names = "default";
  319. pinctrl-0 = <&uart1_pins_a>;
  320. status = "okay";
  321. };
  322. &uart2 {
  323. pinctrl-names = "default";
  324. pinctrl-0 = <&uart2_pins_a>;
  325. status = "okay";
  326. };
  327. &usb1 {
  328. vusb33-supply = <&reg_3p3v>;
  329. vbus-supply = <&reg_5v>;
  330. status = "okay";
  331. };
  332. &u3phy1 {
  333. status = "okay";
  334. };