mt7623a-rfb-emmc.dts 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2017-2018 MediaTek Inc.
  4. * Author: Sean Wang <[email protected]>
  5. *
  6. */
  7. /dts-v1/;
  8. #include <dt-bindings/input/input.h>
  9. #include "mt7623a.dtsi"
  10. #include "mt6323.dtsi"
  11. / {
  12. model = "MediaTek MT7623A with eMMC reference board";
  13. compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
  14. aliases {
  15. serial2 = &uart2;
  16. };
  17. chosen {
  18. stdout-path = "serial2:115200n8";
  19. };
  20. cpus {
  21. cpu@0 {
  22. proc-supply = <&mt6323_vproc_reg>;
  23. };
  24. cpu@1 {
  25. proc-supply = <&mt6323_vproc_reg>;
  26. };
  27. cpu@2 {
  28. proc-supply = <&mt6323_vproc_reg>;
  29. };
  30. cpu@3 {
  31. proc-supply = <&mt6323_vproc_reg>;
  32. };
  33. };
  34. gpio-keys {
  35. compatible = "gpio-keys";
  36. pinctrl-names = "default";
  37. pinctrl-0 = <&key_pins_a>;
  38. button-factory {
  39. label = "factory";
  40. linux,code = <BTN_0>;
  41. gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  42. };
  43. button-wps {
  44. label = "wps";
  45. linux,code = <KEY_WPS_BUTTON>;
  46. gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
  47. };
  48. };
  49. memory@80000000 {
  50. device_type = "memory";
  51. reg = <0 0x80000000 0 0x20000000>;
  52. };
  53. reg_1p8v: regulator-1p8v {
  54. compatible = "regulator-fixed";
  55. regulator-name = "fixed-1.8V";
  56. regulator-min-microvolt = <1800000>;
  57. regulator-max-microvolt = <1800000>;
  58. regulator-boot-on;
  59. regulator-always-on;
  60. };
  61. reg_3p3v: regulator-3p3v {
  62. compatible = "regulator-fixed";
  63. regulator-name = "fixed-3.3V";
  64. regulator-min-microvolt = <3300000>;
  65. regulator-max-microvolt = <3300000>;
  66. regulator-boot-on;
  67. regulator-always-on;
  68. };
  69. reg_5v: regulator-5v {
  70. compatible = "regulator-fixed";
  71. regulator-name = "fixed-5V";
  72. regulator-min-microvolt = <5000000>;
  73. regulator-max-microvolt = <5000000>;
  74. regulator-boot-on;
  75. regulator-always-on;
  76. };
  77. sound {
  78. compatible = "mediatek,mt2701-wm8960-machine";
  79. mediatek,platform = <&afe>;
  80. audio-routing =
  81. "Headphone", "HP_L",
  82. "Headphone", "HP_R",
  83. "LINPUT1", "AMIC",
  84. "RINPUT1", "AMIC";
  85. mediatek,audio-codec = <&wm8960>;
  86. pinctrl-names = "default";
  87. pinctrl-0 = <&i2s0_pins_a>;
  88. };
  89. };
  90. &btif {
  91. status = "okay";
  92. };
  93. &crypto {
  94. status = "okay";
  95. };
  96. &eth {
  97. status = "okay";
  98. gmac0: mac@0 {
  99. compatible = "mediatek,eth-mac";
  100. reg = <0>;
  101. phy-mode = "trgmii";
  102. fixed-link {
  103. speed = <1000>;
  104. full-duplex;
  105. pause;
  106. };
  107. };
  108. mdio-bus {
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. switch@0 {
  112. compatible = "mediatek,mt7530";
  113. reg = <0>;
  114. mediatek,mcm;
  115. resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
  116. reset-names = "mcm";
  117. core-supply = <&mt6323_vpa_reg>;
  118. io-supply = <&mt6323_vemc3v3_reg>;
  119. ports {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. port@0 {
  123. reg = <0>;
  124. label = "lan0";
  125. };
  126. port@1 {
  127. reg = <1>;
  128. label = "lan1";
  129. };
  130. port@2 {
  131. reg = <2>;
  132. label = "lan2";
  133. };
  134. port@3 {
  135. reg = <3>;
  136. label = "lan3";
  137. };
  138. port@4 {
  139. reg = <4>;
  140. label = "wan";
  141. };
  142. port@6 {
  143. reg = <6>;
  144. label = "cpu";
  145. ethernet = <&gmac0>;
  146. phy-mode = "trgmii";
  147. fixed-link {
  148. speed = <1000>;
  149. full-duplex;
  150. };
  151. };
  152. };
  153. };
  154. };
  155. };
  156. &i2c0 {
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&i2c0_pins_a>;
  159. status = "okay";
  160. };
  161. &i2c1 {
  162. pinctrl-names = "default";
  163. pinctrl-0 = <&i2c1_pins_b>;
  164. status = "okay";
  165. wm8960: wm8960@1a {
  166. compatible = "wlf,wm8960";
  167. reg = <0x1a>;
  168. };
  169. };
  170. &i2c2 {
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&i2c2_pins_b>;
  173. status = "okay";
  174. };
  175. &mmc0 {
  176. pinctrl-names = "default", "state_uhs";
  177. pinctrl-0 = <&mmc0_pins_default>;
  178. pinctrl-1 = <&mmc0_pins_uhs>;
  179. status = "okay";
  180. bus-width = <8>;
  181. max-frequency = <50000000>;
  182. cap-mmc-highspeed;
  183. vmmc-supply = <&reg_3p3v>;
  184. vqmmc-supply = <&reg_1p8v>;
  185. non-removable;
  186. };
  187. &mmc1 {
  188. pinctrl-names = "default", "state_uhs";
  189. pinctrl-0 = <&mmc1_pins_default>;
  190. pinctrl-1 = <&mmc1_pins_uhs>;
  191. status = "okay";
  192. bus-width = <4>;
  193. max-frequency = <50000000>;
  194. cap-sd-highspeed;
  195. cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
  196. vmmc-supply = <&reg_3p3v>;
  197. vqmmc-supply = <&reg_3p3v>;
  198. };
  199. &pcie {
  200. pinctrl-names = "default";
  201. pinctrl-0 = <&pcie_default>;
  202. status = "okay";
  203. pcie@0,0 {
  204. status = "okay";
  205. };
  206. pcie@1,0 {
  207. status = "okay";
  208. };
  209. };
  210. &pcie0_phy {
  211. status = "okay";
  212. };
  213. &pcie1_phy {
  214. status = "okay";
  215. };
  216. &pwm {
  217. pinctrl-names = "default";
  218. pinctrl-0 = <&pwm_pins_a>;
  219. status = "okay";
  220. };
  221. &spi0 {
  222. pinctrl-names = "default";
  223. pinctrl-0 = <&spi0_pins_a>;
  224. status = "okay";
  225. };
  226. &spi1 {
  227. pinctrl-names = "default";
  228. pinctrl-0 = <&spi1_pins_a>;
  229. status = "okay";
  230. };
  231. &uart2 {
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&uart2_pins_b>;
  234. status = "okay";
  235. };
  236. &usb1 {
  237. vusb33-supply = <&reg_3p3v>;
  238. vbus-supply = <&reg_5v>;
  239. status = "okay";
  240. };
  241. &u3phy1 {
  242. status = "okay";
  243. };