lan966x-kontron-kswitch-d10-mmt.dtsi 3.4 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Common part of the device tree for the Kontron KSwitch D10 MMT
  4. */
  5. /dts-v1/;
  6. #include "lan966x.dtsi"
  7. #include "dt-bindings/phy/phy-lan966x-serdes.h"
  8. / {
  9. aliases {
  10. serial0 = &usart0;
  11. };
  12. chosen {
  13. stdout-path = "serial0:115200n8";
  14. };
  15. gpio-restart {
  16. compatible = "gpio-restart";
  17. pinctrl-0 = <&reset_pins>;
  18. pinctrl-names = "default";
  19. gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
  20. priority = <200>;
  21. };
  22. };
  23. &flx0 {
  24. atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
  25. status = "okay";
  26. usart0: serial@200 {
  27. pinctrl-0 = <&usart0_pins>;
  28. pinctrl-names = "default";
  29. status = "okay";
  30. };
  31. };
  32. &flx3 {
  33. atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
  34. status = "okay";
  35. spi3: spi@400 {
  36. pinctrl-0 = <&fc3_b_pins>, <&spi3_cs_pins>;
  37. pinctrl-names = "default";
  38. status = "okay";
  39. cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
  40. };
  41. };
  42. &gpio {
  43. fc3_b_pins: fc3-b-pins {
  44. /* SCK, MISO, MOSI */
  45. pins = "GPIO_51", "GPIO_52", "GPIO_53";
  46. function = "fc3_b";
  47. };
  48. miim_c_pins: miim-c-pins {
  49. /* MDC, MDIO */
  50. pins = "GPIO_59", "GPIO_60";
  51. function = "miim_c";
  52. };
  53. reset_pins: reset-pins {
  54. /* SYS_RST# */
  55. pins = "GPIO_56";
  56. function = "gpio";
  57. };
  58. sgpio_a_pins: sgpio-a-pins {
  59. /* SCK, D0, D1 */
  60. pins = "GPIO_32", "GPIO_33", "GPIO_34";
  61. function = "sgpio_a";
  62. };
  63. sgpio_b_pins: sgpio-b-pins {
  64. /* LD */
  65. pins = "GPIO_64";
  66. function = "sgpio_b";
  67. };
  68. spi3_cs_pins: spi3-cs-pins {
  69. /* CS# */
  70. pins = "GPIO_46";
  71. function = "gpio";
  72. };
  73. usart0_pins: usart0-pins {
  74. /* RXD, TXD */
  75. pins = "GPIO_25", "GPIO_26";
  76. function = "fc0_b";
  77. };
  78. usbs_a_pins: usbs-a-pins {
  79. /* VBUS_DET */
  80. pins = "GPIO_66";
  81. function = "gpio";
  82. };
  83. };
  84. &mdio0 {
  85. pinctrl-0 = <&miim_c_pins>;
  86. pinctrl-names = "default";
  87. reset-gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
  88. clock-frequency = <2500000>;
  89. status = "okay";
  90. phy4: ethernet-phy@5 {
  91. reg = <5>;
  92. coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
  93. };
  94. phy5: ethernet-phy@6 {
  95. reg = <6>;
  96. coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
  97. };
  98. phy6: ethernet-phy@7 {
  99. reg = <7>;
  100. coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
  101. };
  102. phy7: ethernet-phy@8 {
  103. reg = <8>;
  104. coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
  105. };
  106. };
  107. &mdio1 {
  108. status = "okay";
  109. };
  110. &phy0 {
  111. status = "okay";
  112. };
  113. &phy1 {
  114. status = "okay";
  115. };
  116. &port0 {
  117. phys = <&serdes 0 CU(0)>;
  118. phy-handle = <&phy0>;
  119. phy-mode = "gmii";
  120. status = "okay";
  121. };
  122. &port1 {
  123. phys = <&serdes 1 CU(1)>;
  124. phy-handle = <&phy1>;
  125. phy-mode = "gmii";
  126. status = "okay";
  127. };
  128. &port4 {
  129. phys = <&serdes 4 SERDES6G(2)>;
  130. phy-handle = <&phy4>;
  131. phy-mode = "qsgmii";
  132. status = "okay";
  133. };
  134. &port5 {
  135. phys = <&serdes 5 SERDES6G(2)>;
  136. phy-handle = <&phy5>;
  137. phy-mode = "qsgmii";
  138. status = "okay";
  139. };
  140. &port6 {
  141. phys = <&serdes 6 SERDES6G(2)>;
  142. phy-handle = <&phy6>;
  143. phy-mode = "qsgmii";
  144. status = "okay";
  145. };
  146. &port7 {
  147. phys = <&serdes 7 SERDES6G(2)>;
  148. phy-handle = <&phy7>;
  149. phy-mode = "qsgmii";
  150. status = "okay";
  151. };
  152. &serdes {
  153. status = "okay";
  154. };
  155. &sgpio {
  156. pinctrl-0 = <&sgpio_a_pins>, <&sgpio_b_pins>;
  157. pinctrl-names = "default";
  158. bus-frequency = <8000000>;
  159. /* arbitrary range because all GPIOs are in software mode */
  160. microchip,sgpio-port-ranges = <0 11>;
  161. status = "okay";
  162. sgpio_in: gpio@0 {
  163. ngpios = <128>;
  164. };
  165. sgpio_out: gpio@1 {
  166. ngpios = <128>;
  167. };
  168. };
  169. &switch {
  170. status = "okay";
  171. };
  172. &udc {
  173. pinctrl-0 = <&usbs_a_pins>;
  174. pinctrl-names = "default";
  175. atmel,vbus-gpio = <&gpio 66 GPIO_ACTIVE_HIGH>;
  176. status = "okay";
  177. };
  178. &watchdog {
  179. status = "okay";
  180. };