kirkwood-6282.dtsi 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. / {
  3. mbus@f1000000 {
  4. pciec: pcie@82000000 {
  5. compatible = "marvell,kirkwood-pcie";
  6. status = "disabled";
  7. device_type = "pci";
  8. #address-cells = <3>;
  9. #size-cells = <2>;
  10. bus-range = <0x00 0xff>;
  11. ranges =
  12. <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
  13. 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
  14. 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
  15. 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
  16. 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
  17. 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
  18. 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
  19. pcie0: pcie@1,0 {
  20. device_type = "pci";
  21. assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
  22. reg = <0x0800 0 0 0 0>;
  23. #address-cells = <3>;
  24. #size-cells = <2>;
  25. #interrupt-cells = <1>;
  26. ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
  27. 0x81000000 0 0 0x81000000 0x1 0 1 0>;
  28. bus-range = <0x00 0xff>;
  29. interrupt-names = "intx", "error";
  30. interrupts = <9>, <44>;
  31. interrupt-map-mask = <0 0 0 7>;
  32. interrupt-map = <0 0 0 1 &pcie0_intc 0>,
  33. <0 0 0 2 &pcie0_intc 1>,
  34. <0 0 0 3 &pcie0_intc 2>,
  35. <0 0 0 4 &pcie0_intc 3>;
  36. marvell,pcie-port = <0>;
  37. marvell,pcie-lane = <0>;
  38. clocks = <&gate_clk 2>;
  39. status = "disabled";
  40. pcie0_intc: interrupt-controller {
  41. interrupt-controller;
  42. #interrupt-cells = <1>;
  43. };
  44. };
  45. pcie1: pcie@2,0 {
  46. device_type = "pci";
  47. assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
  48. reg = <0x1000 0 0 0 0>;
  49. #address-cells = <3>;
  50. #size-cells = <2>;
  51. #interrupt-cells = <1>;
  52. ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
  53. 0x81000000 0 0 0x81000000 0x2 0 1 0>;
  54. bus-range = <0x00 0xff>;
  55. interrupt-names = "intx", "error";
  56. interrupts = <10>, <45>;
  57. interrupt-map-mask = <0 0 0 7>;
  58. interrupt-map = <0 0 0 1 &pcie1_intc 0>,
  59. <0 0 0 2 &pcie1_intc 1>,
  60. <0 0 0 3 &pcie1_intc 2>,
  61. <0 0 0 4 &pcie1_intc 3>;
  62. marvell,pcie-port = <1>;
  63. marvell,pcie-lane = <0>;
  64. clocks = <&gate_clk 18>;
  65. status = "disabled";
  66. pcie1_intc: interrupt-controller {
  67. interrupt-controller;
  68. #interrupt-cells = <1>;
  69. };
  70. };
  71. };
  72. };
  73. ocp@f1000000 {
  74. pinctrl: pin-controller@10000 {
  75. compatible = "marvell,88f6282-pinctrl";
  76. pmx_sata0: pmx-sata0 {
  77. marvell,pins = "mpp5", "mpp21", "mpp23";
  78. marvell,function = "sata0";
  79. };
  80. pmx_sata1: pmx-sata1 {
  81. marvell,pins = "mpp4", "mpp20", "mpp22";
  82. marvell,function = "sata1";
  83. };
  84. /*
  85. * Default I2C1 pinctrl setting on mpp36/mpp37,
  86. * overwrite marvell,pins on board level if required.
  87. */
  88. pmx_twsi1: pmx-twsi1 {
  89. marvell,pins = "mpp36", "mpp37";
  90. marvell,function = "twsi1";
  91. };
  92. pmx_sdio: pmx-sdio {
  93. marvell,pins = "mpp12", "mpp13", "mpp14",
  94. "mpp15", "mpp16", "mpp17";
  95. marvell,function = "sdio";
  96. };
  97. };
  98. thermal: thermal@10078 {
  99. compatible = "marvell,kirkwood-thermal";
  100. reg = <0x10078 0x4>;
  101. status = "okay";
  102. };
  103. rtc: rtc@10300 {
  104. compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
  105. reg = <0x10300 0x20>;
  106. interrupts = <53>;
  107. clocks = <&gate_clk 7>;
  108. };
  109. i2c1: i2c@11100 {
  110. compatible = "marvell,mv64xxx-i2c";
  111. reg = <0x11100 0x20>;
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. interrupts = <32>;
  115. clock-frequency = <100000>;
  116. clocks = <&gate_clk 7>;
  117. pinctrl-0 = <&pmx_twsi1>;
  118. pinctrl-names = "default";
  119. status = "disabled";
  120. };
  121. sata: sata@80000 {
  122. compatible = "marvell,orion-sata";
  123. reg = <0x80000 0x5000>;
  124. interrupts = <21>;
  125. clocks = <&gate_clk 14>, <&gate_clk 15>;
  126. clock-names = "0", "1";
  127. phys = <&sata_phy0>, <&sata_phy1>;
  128. phy-names = "port0", "port1";
  129. status = "disabled";
  130. };
  131. sdio: mvsdio@90000 {
  132. compatible = "marvell,orion-sdio";
  133. reg = <0x90000 0x200>;
  134. interrupts = <28>;
  135. clocks = <&gate_clk 4>;
  136. pinctrl-0 = <&pmx_sdio>;
  137. pinctrl-names = "default";
  138. bus-width = <4>;
  139. cap-sdio-irq;
  140. cap-sd-highspeed;
  141. cap-mmc-highspeed;
  142. status = "disabled";
  143. };
  144. };
  145. };