keystone-k2hk-evm.dts 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Keystone 2 Kepler/Hawking EVM device tree
  4. *
  5. * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
  6. */
  7. /dts-v1/;
  8. #include "keystone.dtsi"
  9. #include "keystone-k2hk.dtsi"
  10. / {
  11. compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
  12. model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
  13. reserved-memory {
  14. #address-cells = <2>;
  15. #size-cells = <2>;
  16. ranges;
  17. dsp_common_memory: dsp-common-memory@81f800000 {
  18. compatible = "shared-dma-pool";
  19. reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
  20. reusable;
  21. status = "okay";
  22. };
  23. };
  24. leds {
  25. compatible = "gpio-leds";
  26. debug1_1 {
  27. label = "keystone:green:debug1";
  28. gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
  29. };
  30. debug1_2 {
  31. label = "keystone:red:debug1";
  32. gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
  33. };
  34. debug2 {
  35. label = "keystone:blue:debug2";
  36. gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
  37. };
  38. debug3 {
  39. label = "keystone:blue:debug3";
  40. gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
  41. };
  42. };
  43. };
  44. &soc0 {
  45. clocks {
  46. refclksys: refclksys {
  47. #clock-cells = <0>;
  48. compatible = "fixed-clock";
  49. clock-frequency = <122880000>;
  50. clock-output-names = "refclk-sys";
  51. };
  52. refclkpass: refclkpass {
  53. #clock-cells = <0>;
  54. compatible = "fixed-clock";
  55. clock-frequency = <122880000>;
  56. clock-output-names = "refclk-pass";
  57. };
  58. refclkarm: refclkarm {
  59. #clock-cells = <0>;
  60. compatible = "fixed-clock";
  61. clock-frequency = <125000000>;
  62. clock-output-names = "refclk-arm";
  63. };
  64. refclkddr3a: refclkddr3a {
  65. #clock-cells = <0>;
  66. compatible = "fixed-clock";
  67. clock-frequency = <100000000>;
  68. clock-output-names = "refclk-ddr3a";
  69. };
  70. refclkddr3b: refclkddr3b {
  71. #clock-cells = <0>;
  72. compatible = "fixed-clock";
  73. clock-frequency = <100000000>;
  74. clock-output-names = "refclk-ddr3b";
  75. };
  76. };
  77. };
  78. &usb_phy {
  79. status = "okay";
  80. };
  81. &keystone_usb0 {
  82. status = "okay";
  83. };
  84. &usb0 {
  85. dr_mode = "host";
  86. };
  87. &aemif {
  88. cs0 {
  89. #address-cells = <2>;
  90. #size-cells = <1>;
  91. clock-ranges;
  92. ranges;
  93. ti,cs-chipselect = <0>;
  94. /* all timings in nanoseconds */
  95. ti,cs-min-turnaround-ns = <12>;
  96. ti,cs-read-hold-ns = <6>;
  97. ti,cs-read-strobe-ns = <23>;
  98. ti,cs-read-setup-ns = <9>;
  99. ti,cs-write-hold-ns = <8>;
  100. ti,cs-write-strobe-ns = <23>;
  101. ti,cs-write-setup-ns = <8>;
  102. nand@0,0 {
  103. compatible = "ti,keystone-nand","ti,davinci-nand";
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. reg = <0 0 0x4000000
  107. 1 0 0x0000100>;
  108. ti,davinci-chipselect = <0>;
  109. ti,davinci-mask-ale = <0x2000>;
  110. ti,davinci-mask-cle = <0x4000>;
  111. ti,davinci-mask-chipsel = <0>;
  112. nand-ecc-mode = "hw";
  113. ti,davinci-ecc-bits = <4>;
  114. nand-on-flash-bbt;
  115. partition@0 {
  116. label = "u-boot";
  117. reg = <0x0 0x100000>;
  118. read-only;
  119. };
  120. partition@100000 {
  121. label = "params";
  122. reg = <0x100000 0x80000>;
  123. read-only;
  124. };
  125. partition@180000 {
  126. label = "ubifs";
  127. reg = <0x180000 0x1fe80000>;
  128. };
  129. };
  130. };
  131. };
  132. &i2c0 {
  133. dtt@50 {
  134. compatible = "atmel,24c1024";
  135. reg = <0x50>;
  136. };
  137. };
  138. &spi0 {
  139. nor_flash: flash@0 {
  140. #address-cells = <1>;
  141. #size-cells = <1>;
  142. compatible = "micron,n25q128a11", "jedec,spi-nor";
  143. spi-max-frequency = <54000000>;
  144. m25p,fast-read;
  145. reg = <0>;
  146. partition@0 {
  147. label = "u-boot-spl";
  148. reg = <0x0 0x80000>;
  149. read-only;
  150. };
  151. partition@1 {
  152. label = "misc";
  153. reg = <0x80000 0xf80000>;
  154. };
  155. };
  156. };
  157. &mdio {
  158. status = "ok";
  159. ethphy0: ethernet-phy@0 {
  160. compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
  161. reg = <0>;
  162. };
  163. ethphy1: ethernet-phy@1 {
  164. compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
  165. reg = <1>;
  166. };
  167. };
  168. &dsp0 {
  169. memory-region = <&dsp_common_memory>;
  170. status = "okay";
  171. };
  172. &dsp1 {
  173. memory-region = <&dsp_common_memory>;
  174. status = "okay";
  175. };
  176. &dsp2 {
  177. memory-region = <&dsp_common_memory>;
  178. status = "okay";
  179. };
  180. &dsp3 {
  181. memory-region = <&dsp_common_memory>;
  182. status = "okay";
  183. };
  184. &dsp4 {
  185. memory-region = <&dsp_common_memory>;
  186. status = "okay";
  187. };
  188. &dsp5 {
  189. memory-region = <&dsp_common_memory>;
  190. status = "okay";
  191. };
  192. &dsp6 {
  193. memory-region = <&dsp_common_memory>;
  194. status = "okay";
  195. };
  196. &dsp7 {
  197. memory-region = <&dsp_common_memory>;
  198. status = "okay";
  199. };