imx7ulp-com.dts 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright 2019 NXP
  4. /dts-v1/;
  5. #include "imx7ulp.dtsi"
  6. #include <dt-bindings/input/input.h>
  7. / {
  8. model = "Embedded Artists i.MX7ULP COM";
  9. compatible = "ea,imx7ulp-com", "fsl,imx7ulp";
  10. chosen {
  11. stdout-path = &lpuart4;
  12. };
  13. memory@60000000 {
  14. device_type = "memory";
  15. reg = <0x60000000 0x4000000>;
  16. };
  17. };
  18. &lpuart4 {
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&pinctrl_lpuart4>;
  21. status = "okay";
  22. };
  23. &usbotg1 {
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_usbotg1_id>;
  26. srp-disable;
  27. hnp-disable;
  28. adp-disable;
  29. status = "okay";
  30. };
  31. &usdhc0 {
  32. assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
  33. assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
  34. pinctrl-names = "default";
  35. pinctrl-0 = <&pinctrl_usdhc0>;
  36. non-removable;
  37. bus-width = <8>;
  38. no-1-8-v;
  39. status = "okay";
  40. };
  41. &iomuxc1 {
  42. pinctrl_lpuart4: lpuart4grp {
  43. fsl,pins = <
  44. IMX7ULP_PAD_PTC3__LPUART4_RX 0x3
  45. IMX7ULP_PAD_PTC2__LPUART4_TX 0x3
  46. >;
  47. };
  48. pinctrl_usbotg1_id: otg1idgrp {
  49. fsl,pins = <
  50. IMX7ULP_PAD_PTC13__USB0_ID 0x10003
  51. >;
  52. };
  53. pinctrl_usdhc0: usdhc0grp {
  54. fsl,pins = <
  55. IMX7ULP_PAD_PTD1__SDHC0_CMD 0x43
  56. IMX7ULP_PAD_PTD2__SDHC0_CLK 0x10042
  57. IMX7ULP_PAD_PTD3__SDHC0_D7 0x43
  58. IMX7ULP_PAD_PTD4__SDHC0_D6 0x43
  59. IMX7ULP_PAD_PTD5__SDHC0_D5 0x43
  60. IMX7ULP_PAD_PTD6__SDHC0_D4 0x43
  61. IMX7ULP_PAD_PTD7__SDHC0_D3 0x43
  62. IMX7ULP_PAD_PTD8__SDHC0_D2 0x43
  63. IMX7ULP_PAD_PTD9__SDHC0_D1 0x43
  64. IMX7ULP_PAD_PTD10__SDHC0_D0 0x43
  65. IMX7ULP_PAD_PTD11__SDHC0_DQS 0x42
  66. >;
  67. };
  68. };