imx6ul-tqma6ul1-mba6ulx.dts 1.0 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
  2. /*
  3. * Copyright 2018-2022 TQ-Systems GmbH
  4. * Author: Markus Niebel <[email protected]>
  5. */
  6. /dts-v1/;
  7. #include "imx6ul-tqma6ul1.dtsi"
  8. #include "mba6ulx.dtsi"
  9. / {
  10. model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board";
  11. compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul";
  12. };
  13. /*
  14. * Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage)
  15. * and need to be disabled here again
  16. */
  17. &can2 {
  18. status = "disabled";
  19. };
  20. &fec1 {
  21. pinctrl-names = "default";
  22. pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>;
  23. status = "okay";
  24. mdio {
  25. #address-cells = <1>;
  26. #size-cells = <0>;
  27. ethphy0: ethernet-phy@0 {
  28. compatible = "ethernet-phy-ieee802.3-c22";
  29. max-speed = <100>;
  30. reg = <0>;
  31. };
  32. };
  33. };
  34. &fec2 {
  35. /delete-property/ phy-handle;
  36. /delete-node/ mdio;
  37. };
  38. &iomuxc {
  39. pinctrl_enet1_mdc: enet1mdcgrp {
  40. fsl,pins = <
  41. /* mdio */
  42. MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0
  43. MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0
  44. >;
  45. };
  46. };