imx6sl-tolino-shine2hd.dts 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Device tree for the Tolino Shine 2 HD ebook reader
  4. *
  5. * Name on mainboard is: 37NB-E60QF0+4A2 or 37NB-E60QF0+4A3
  6. * Serials start with: E60QF2
  7. *
  8. * Copyright 2020 Andreas Kemnade
  9. */
  10. /dts-v1/;
  11. #include <dt-bindings/input/input.h>
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include "imx6sl.dtsi"
  14. / {
  15. model = "Tolino Shine 2 HD";
  16. compatible = "kobo,tolino-shine2hd", "fsl,imx6sl";
  17. chosen {
  18. stdout-path = &uart1;
  19. };
  20. gpio_keys: gpio-keys {
  21. compatible = "gpio-keys";
  22. pinctrl-names = "default";
  23. pinctrl-0 = <&pinctrl_gpio_keys>;
  24. key-cover {
  25. label = "Cover";
  26. gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
  27. linux,code = <SW_LID>;
  28. linux,input-type = <EV_SW>;
  29. wakeup-source;
  30. };
  31. key-fl {
  32. label = "Frontlight";
  33. gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
  34. linux,code = <KEY_BRIGHTNESS_CYCLE>;
  35. };
  36. key-home {
  37. label = "Home";
  38. gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
  39. linux,code = <KEY_HOME>;
  40. };
  41. key-power {
  42. label = "Power";
  43. gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
  44. linux,code = <KEY_POWER>;
  45. wakeup-source;
  46. };
  47. };
  48. leds: leds {
  49. compatible = "gpio-leds";
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&pinctrl_led>;
  52. led-0 {
  53. label = "tolinoshine2hd:white:on";
  54. gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
  55. linux,default-trigger = "timer";
  56. };
  57. };
  58. memory@80000000 {
  59. device_type = "memory";
  60. reg = <0x80000000 0x20000000>;
  61. };
  62. reg_wifi: regulator-wifi {
  63. compatible = "regulator-fixed";
  64. pinctrl-names = "default";
  65. pinctrl-0 = <&pinctrl_wifi_power>;
  66. regulator-name = "SD3_SPWR";
  67. regulator-min-microvolt = <3000000>;
  68. regulator-max-microvolt = <3000000>;
  69. gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
  70. };
  71. wifi_pwrseq: wifi_pwrseq {
  72. compatible = "mmc-pwrseq-simple";
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&pinctrl_wifi_reset>;
  75. post-power-on-delay-ms = <20>;
  76. reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
  77. };
  78. };
  79. &i2c1 {
  80. pinctrl-names = "default","sleep";
  81. pinctrl-0 = <&pinctrl_i2c1>;
  82. pinctrl-1 = <&pinctrl_i2c1_sleep>;
  83. status = "okay";
  84. ec: embedded-controller@43 {
  85. compatible = "netronix,ntxec";
  86. reg = <0x43>;
  87. #pwm-cells = <2>;
  88. };
  89. };
  90. &i2c2 {
  91. pinctrl-names = "default","sleep";
  92. pinctrl-0 = <&pinctrl_i2c2>;
  93. pinctrl-1 = <&pinctrl_i2c2_sleep>;
  94. clock-frequency = <100000>;
  95. status = "okay";
  96. zforce: touchscreen@50 {
  97. compatible = "neonode,zforce";
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&pinctrl_zforce>;
  100. reg = <0x50>;
  101. interrupt-parent = <&gpio5>;
  102. interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
  103. vdd-supply = <&ldo1_reg>;
  104. reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  105. x-size = <1072>;
  106. y-size = <1448>;
  107. };
  108. /* TODO: TPS65185 PMIC for E Ink at 0x68 */
  109. };
  110. &i2c3 {
  111. pinctrl-names = "default";
  112. pinctrl-0 = <&pinctrl_i2c3>;
  113. clock-frequency = <400000>;
  114. status = "okay";
  115. ricoh619: pmic@32 {
  116. compatible = "ricoh,rc5t619";
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&pinctrl_ricoh_gpio>;
  119. reg = <0x32>;
  120. interrupt-parent = <&gpio5>;
  121. interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
  122. system-power-controller;
  123. regulators {
  124. dcdc1_reg: DCDC1 {
  125. regulator-name = "DCDC1";
  126. regulator-min-microvolt = <300000>;
  127. regulator-max-microvolt = <1875000>;
  128. regulator-always-on;
  129. regulator-boot-on;
  130. regulator-state-mem {
  131. regulator-on-in-suspend;
  132. regulator-suspend-max-microvolt = <900000>;
  133. regulator-suspend-min-microvolt = <900000>;
  134. };
  135. };
  136. /* Core3_3V3 */
  137. dcdc2_reg: DCDC2 {
  138. regulator-name = "DCDC2";
  139. regulator-always-on;
  140. regulator-boot-on;
  141. regulator-state-mem {
  142. regulator-on-in-suspend;
  143. regulator-suspend-max-microvolt = <3100000>;
  144. regulator-suspend-min-microvolt = <3100000>;
  145. };
  146. };
  147. dcdc3_reg: DCDC3 {
  148. regulator-name = "DCDC3";
  149. regulator-min-microvolt = <300000>;
  150. regulator-max-microvolt = <1875000>;
  151. regulator-always-on;
  152. regulator-boot-on;
  153. regulator-state-mem {
  154. regulator-on-in-suspend;
  155. regulator-suspend-max-microvolt = <1140000>;
  156. regulator-suspend-min-microvolt = <1140000>;
  157. };
  158. };
  159. /* Core4_1V2 */
  160. dcdc4_reg: DCDC4 {
  161. regulator-name = "DCDC4";
  162. regulator-min-microvolt = <1200000>;
  163. regulator-max-microvolt = <1200000>;
  164. regulator-always-on;
  165. regulator-boot-on;
  166. regulator-state-mem {
  167. regulator-on-in-suspend;
  168. regulator-suspend-max-microvolt = <1140000>;
  169. regulator-suspend-min-microvolt = <1140000>;
  170. };
  171. };
  172. /* Core4_1V8 */
  173. dcdc5_reg: DCDC5 {
  174. regulator-name = "DCDC5";
  175. regulator-min-microvolt = <1800000>;
  176. regulator-max-microvolt = <1800000>;
  177. regulator-always-on;
  178. regulator-boot-on;
  179. regulator-state-mem {
  180. regulator-on-in-suspend;
  181. regulator-suspend-max-microvolt = <1700000>;
  182. regulator-suspend-min-microvolt = <1700000>;
  183. };
  184. };
  185. /* IR_3V3 */
  186. ldo1_reg: LDO1 {
  187. regulator-name = "LDO1";
  188. regulator-boot-on;
  189. };
  190. /* Core1_3V3 */
  191. ldo2_reg: LDO2 {
  192. regulator-name = "LDO2";
  193. regulator-always-on;
  194. regulator-boot-on;
  195. regulator-state-mem {
  196. regulator-on-in-suspend;
  197. regulator-suspend-max-microvolt = <3000000>;
  198. regulator-suspend-min-microvolt = <3000000>;
  199. };
  200. };
  201. /* Core5_1V2 */
  202. ldo3_reg: LDO3 {
  203. regulator-name = "LDO3";
  204. regulator-always-on;
  205. regulator-boot-on;
  206. };
  207. ldo4_reg: LDO4 {
  208. regulator-name = "LDO4";
  209. regulator-boot-on;
  210. };
  211. /* SPD_3V3 */
  212. ldo5_reg: LDO5 {
  213. regulator-name = "LDO5";
  214. regulator-always-on;
  215. regulator-boot-on;
  216. };
  217. /* DDR_0V6 */
  218. ldo6_reg: LDO6 {
  219. regulator-name = "LDO6";
  220. regulator-always-on;
  221. regulator-boot-on;
  222. };
  223. /* VDD_PWM */
  224. ldo7_reg: LDO7 {
  225. regulator-name = "LDO7";
  226. regulator-always-on;
  227. regulator-boot-on;
  228. };
  229. /* ldo_1v8 */
  230. ldo8_reg: LDO8 {
  231. regulator-name = "LDO8";
  232. regulator-min-microvolt = <1800000>;
  233. regulator-max-microvolt = <1800000>;
  234. regulator-always-on;
  235. regulator-boot-on;
  236. };
  237. ldo9_reg: LDO9 {
  238. regulator-name = "LDO9";
  239. regulator-boot-on;
  240. };
  241. ldo10_reg: LDO10 {
  242. regulator-name = "LDO10";
  243. regulator-boot-on;
  244. };
  245. ldortc1_reg: LDORTC1 {
  246. regulator-name = "LDORTC1";
  247. regulator-always-on;
  248. regulator-boot-on;
  249. };
  250. };
  251. };
  252. };
  253. &iomuxc {
  254. pinctrl-names = "default";
  255. pinctrl-0 = <&pinctrl_hog>;
  256. pinctrl_gpio_keys: gpio-keysgrp {
  257. fsl,pins = <
  258. MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059
  259. MX6SL_PAD_SD1_DAT4__GPIO5_IO12 0x17059
  260. MX6SL_PAD_KEY_COL1__GPIO3_IO26 0x17059
  261. MX6SL_PAD_KEY_ROW0__GPIO3_IO25 0x17059
  262. >;
  263. };
  264. pinctrl_hog: hoggrp {
  265. fsl,pins = <
  266. MX6SL_PAD_LCD_DAT0__GPIO2_IO20 0x79
  267. MX6SL_PAD_LCD_DAT1__GPIO2_IO21 0x79
  268. MX6SL_PAD_LCD_DAT2__GPIO2_IO22 0x79
  269. MX6SL_PAD_LCD_DAT3__GPIO2_IO23 0x79
  270. MX6SL_PAD_LCD_DAT4__GPIO2_IO24 0x79
  271. MX6SL_PAD_LCD_DAT5__GPIO2_IO25 0x79
  272. MX6SL_PAD_LCD_DAT6__GPIO2_IO26 0x79
  273. MX6SL_PAD_LCD_DAT7__GPIO2_IO27 0x79
  274. MX6SL_PAD_LCD_DAT8__GPIO2_IO28 0x79
  275. MX6SL_PAD_LCD_DAT9__GPIO2_IO29 0x79
  276. MX6SL_PAD_LCD_DAT10__GPIO2_IO30 0x79
  277. MX6SL_PAD_LCD_DAT11__GPIO2_IO31 0x79
  278. MX6SL_PAD_LCD_DAT12__GPIO3_IO00 0x79
  279. MX6SL_PAD_LCD_DAT13__GPIO3_IO01 0x79
  280. MX6SL_PAD_LCD_DAT14__GPIO3_IO02 0x79
  281. MX6SL_PAD_LCD_DAT15__GPIO3_IO03 0x79
  282. MX6SL_PAD_LCD_DAT16__GPIO3_IO04 0x79
  283. MX6SL_PAD_LCD_DAT17__GPIO3_IO05 0x79
  284. MX6SL_PAD_LCD_DAT18__GPIO3_IO06 0x79
  285. MX6SL_PAD_LCD_DAT19__GPIO3_IO07 0x79
  286. MX6SL_PAD_LCD_DAT20__GPIO3_IO08 0x79
  287. MX6SL_PAD_LCD_DAT21__GPIO3_IO09 0x79
  288. MX6SL_PAD_LCD_DAT22__GPIO3_IO10 0x79
  289. MX6SL_PAD_LCD_DAT23__GPIO3_IO11 0x79
  290. MX6SL_PAD_LCD_CLK__GPIO2_IO15 0x79
  291. MX6SL_PAD_LCD_ENABLE__GPIO2_IO16 0x79
  292. MX6SL_PAD_LCD_HSYNC__GPIO2_IO17 0x79
  293. MX6SL_PAD_LCD_VSYNC__GPIO2_IO18 0x79
  294. MX6SL_PAD_LCD_RESET__GPIO2_IO19 0x79
  295. MX6SL_PAD_KEY_COL3__GPIO3_IO30 0x79
  296. MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x79
  297. MX6SL_PAD_ECSPI2_MOSI__GPIO4_IO13 0x79
  298. MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x79
  299. >;
  300. };
  301. pinctrl_i2c1: i2c1grp {
  302. fsl,pins = <
  303. MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001f8b1
  304. MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001f8b1
  305. >;
  306. };
  307. pinctrl_i2c1_sleep: i2c1grp-sleep {
  308. fsl,pins = <
  309. MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x400108b1
  310. MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x400108b1
  311. >;
  312. };
  313. pinctrl_i2c2: i2c2grp {
  314. fsl,pins = <
  315. MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001f8b1
  316. MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001f8b1
  317. >;
  318. };
  319. pinctrl_i2c2_sleep: i2c2grp-sleep {
  320. fsl,pins = <
  321. MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x400108b1
  322. MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x400108b1
  323. >;
  324. };
  325. pinctrl_i2c3: i2c3grp {
  326. fsl,pins = <
  327. MX6SL_PAD_REF_CLK_24M__I2C3_SCL 0x4001f8b1
  328. MX6SL_PAD_REF_CLK_32K__I2C3_SDA 0x4001f8b1
  329. >;
  330. };
  331. pinctrl_led: ledgrp {
  332. fsl,pins = <
  333. MX6SL_PAD_SD1_DAT2__GPIO5_IO13 0x17059
  334. >;
  335. };
  336. pinctrl_ricoh_gpio: ricoh_gpiogrp {
  337. fsl,pins = <
  338. MX6SL_PAD_SD1_CLK__GPIO5_IO15 0x1b8b1 /* ricoh619 chg */
  339. MX6SL_PAD_SD1_DAT0__GPIO5_IO11 0x1b8b1 /* ricoh619 irq */
  340. MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
  341. >;
  342. };
  343. pinctrl_uart1: uart1grp {
  344. fsl,pins = <
  345. MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
  346. MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
  347. >;
  348. };
  349. pinctrl_uart4: uart4grp {
  350. fsl,pins = <
  351. MX6SL_PAD_KEY_ROW6__UART4_TX_DATA 0x1b0b1
  352. MX6SL_PAD_KEY_COL6__UART4_RX_DATA 0x1b0b1
  353. >;
  354. };
  355. pinctrl_usbotg1: usbotg1grp {
  356. fsl,pins = <
  357. MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
  358. >;
  359. };
  360. pinctrl_usdhc2: usdhc2grp {
  361. fsl,pins = <
  362. MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
  363. MX6SL_PAD_SD2_CLK__SD2_CLK 0x13059
  364. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  365. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  366. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  367. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  368. >;
  369. };
  370. pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
  371. fsl,pins = <
  372. MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
  373. MX6SL_PAD_SD2_CLK__SD2_CLK 0x130b9
  374. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
  375. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
  376. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
  377. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
  378. >;
  379. };
  380. pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
  381. fsl,pins = <
  382. MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
  383. MX6SL_PAD_SD2_CLK__SD2_CLK 0x130f9
  384. MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
  385. MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
  386. MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
  387. MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
  388. >;
  389. };
  390. pinctrl_usdhc2_sleep: usdhc2grp-sleep {
  391. fsl,pins = <
  392. MX6SL_PAD_SD2_CMD__GPIO5_IO04 0x100f9
  393. MX6SL_PAD_SD2_CLK__GPIO5_IO05 0x100f9
  394. MX6SL_PAD_SD2_DAT0__GPIO5_IO01 0x100f9
  395. MX6SL_PAD_SD2_DAT1__GPIO4_IO30 0x100f9
  396. MX6SL_PAD_SD2_DAT2__GPIO5_IO03 0x100f9
  397. MX6SL_PAD_SD2_DAT3__GPIO4_IO28 0x100f9
  398. >;
  399. };
  400. pinctrl_usdhc3: usdhc3grp {
  401. fsl,pins = <
  402. MX6SL_PAD_SD3_CMD__SD3_CMD 0x11059
  403. MX6SL_PAD_SD3_CLK__SD3_CLK 0x11059
  404. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x11059
  405. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x11059
  406. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x11059
  407. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x11059
  408. >;
  409. };
  410. pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
  411. fsl,pins = <
  412. MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
  413. MX6SL_PAD_SD3_CLK__SD3_CLK 0x170b9
  414. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
  415. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
  416. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
  417. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
  418. >;
  419. };
  420. pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
  421. fsl,pins = <
  422. MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
  423. MX6SL_PAD_SD3_CLK__SD3_CLK 0x170f9
  424. MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
  425. MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
  426. MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
  427. MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
  428. >;
  429. };
  430. pinctrl_usdhc3_sleep: usdhc3grp-sleep {
  431. fsl,pins = <
  432. MX6SL_PAD_SD3_CMD__GPIO5_IO21 0x100c1
  433. MX6SL_PAD_SD3_CLK__GPIO5_IO18 0x100c1
  434. MX6SL_PAD_SD3_DAT0__GPIO5_IO19 0x100c1
  435. MX6SL_PAD_SD3_DAT1__GPIO5_IO20 0x100c1
  436. MX6SL_PAD_SD3_DAT2__GPIO5_IO16 0x100c1
  437. MX6SL_PAD_SD3_DAT3__GPIO5_IO17 0x100c1
  438. >;
  439. };
  440. pinctrl_wifi_power: wifi-powergrp {
  441. fsl,pins = <
  442. MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x10059 /* WIFI_3V3_ON */
  443. >;
  444. };
  445. pinctrl_wifi_reset: wifi-resetgrp {
  446. fsl,pins = <
  447. MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x10059 /* WIFI_RST */
  448. >;
  449. };
  450. pinctrl_zforce: zforcegrp {
  451. fsl,pins = <
  452. MX6SL_PAD_SD1_DAT3__GPIO5_IO06 0x17059 /* TP_INT */
  453. MX6SL_PAD_SD1_DAT5__GPIO5_IO09 0x10059 /* TP_RST */
  454. >;
  455. };
  456. };
  457. &reg_vdd1p1 {
  458. vin-supply = <&dcdc2_reg>;
  459. };
  460. &reg_vdd2p5 {
  461. vin-supply = <&dcdc2_reg>;
  462. };
  463. &reg_arm {
  464. vin-supply = <&dcdc3_reg>;
  465. };
  466. &reg_soc {
  467. vin-supply = <&dcdc1_reg>;
  468. };
  469. &reg_pu {
  470. vin-supply = <&dcdc1_reg>;
  471. };
  472. &snvs_rtc {
  473. /*
  474. * We are using the RTC in the PMIC, but this one is not disabled
  475. * in imx6sl.dtsi.
  476. */
  477. status = "disabled";
  478. };
  479. &uart1 {
  480. /* J4, through-holes */
  481. pinctrl-names = "default";
  482. pinctrl-0 = <&pinctrl_uart1>;
  483. status = "okay";
  484. };
  485. &uart4 {
  486. /* TP198, next to J4, SMD pads */
  487. pinctrl-names = "default";
  488. pinctrl-0 = <&pinctrl_uart4>;
  489. status = "okay";
  490. };
  491. &usdhc2 {
  492. pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
  493. pinctrl-0 = <&pinctrl_usdhc2>;
  494. pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
  495. pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
  496. pinctrl-3 = <&pinctrl_usdhc2_sleep>;
  497. non-removable;
  498. status = "okay";
  499. /* internal uSD card */
  500. };
  501. &usdhc3 {
  502. pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
  503. pinctrl-0 = <&pinctrl_usdhc3>;
  504. pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
  505. pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
  506. pinctrl-3 = <&pinctrl_usdhc3_sleep>;
  507. vmmc-supply = <&reg_wifi>;
  508. mmc-pwrseq = <&wifi_pwrseq>;
  509. cap-power-off-card;
  510. non-removable;
  511. status = "okay";
  512. /*
  513. * 37NB-E60QF0+4A2: CyberTan WC121 (BCM43362) SDIO WiFi
  514. * 37NB-E60QF0+4A3: RTL8189F SDIO WiFi
  515. */
  516. };
  517. &usbotg1 {
  518. pinctrl-names = "default";
  519. pinctrl-0 = <&pinctrl_usbotg1>;
  520. disable-over-current;
  521. srp-disable;
  522. hnp-disable;
  523. adp-disable;
  524. status = "okay";
  525. };