imx6qdl-skov-revc-lt2.dtsi 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (C) 2021 Pengutronix, Oleksij Rempel <[email protected]>
  4. / {
  5. backlight: backlight {
  6. compatible = "pwm-backlight";
  7. pinctrl-names = "default";
  8. pinctrl-0 = <&pinctrl_backlight>;
  9. enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
  10. pwms = <&pwm2 0 20000 0>;
  11. brightness-levels = <0 255>;
  12. num-interpolated-steps = <17>;
  13. default-brightness-level = <8>;
  14. power-supply = <&reg_24v0>;
  15. };
  16. display {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. compatible = "fsl,imx-parallel-display";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_ipu1>;
  22. port@0 {
  23. reg = <0>;
  24. display0_in: endpoint {
  25. remote-endpoint = <&ipu1_di0_disp0>;
  26. };
  27. };
  28. port@1 {
  29. reg = <1>;
  30. display0_out: endpoint {
  31. remote-endpoint = <&panel_in>;
  32. };
  33. };
  34. };
  35. panel {
  36. compatible = "logictechno,lttd800480070-l2rt";
  37. backlight = <&backlight>;
  38. power-supply = <&reg_3v3>;
  39. port {
  40. panel_in: endpoint {
  41. remote-endpoint = <&display0_out>;
  42. };
  43. };
  44. };
  45. };
  46. &ipu1_di0_disp0 {
  47. remote-endpoint = <&display0_in>;
  48. };
  49. &iomuxc {
  50. pinctrl_backlight: backlightgrp {
  51. fsl,pins = <
  52. MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
  53. >;
  54. };
  55. pinctrl_ipu1: ipu1grp {
  56. fsl,pins = <
  57. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  58. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
  59. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  60. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  61. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  62. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  63. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  64. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  65. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  66. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  67. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  68. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  69. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  70. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  71. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  72. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  73. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  74. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  75. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  76. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  77. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  78. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  79. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  80. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  81. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  82. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  83. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  84. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  85. >;
  86. };
  87. };