imx6qdl-phytec-mira-peb-wlbt-05.dtsi 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485
  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (C) 2021 PHYTEC Messtechnik GmbH
  4. * Author: Yunus Bas <[email protected]>
  5. */
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. / {
  9. reg_wl_en: regulator-wl-en {
  10. compatible = "regulator-fixed";
  11. regulator-name = "wlan_en";
  12. regulator-min-microvolt = <3300000>;
  13. regulator-max-microvolt = <3300000>;
  14. pinctrl-names = "default";
  15. pinctrl-0 = <&pinctrl_wl>;
  16. gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
  17. enable-active-high;
  18. startup-delay-us = <100>;
  19. status = "disabled";
  20. };
  21. };
  22. &uart3 {
  23. pinctrl-names = "default";
  24. pinctrl-0 = <&pinctrl_uart3_bt>;
  25. uart-has-rtscts;
  26. bluetooth {
  27. compatible = "brcm,bcm43438-bt";
  28. shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  29. device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
  30. host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
  31. status = "disabled";
  32. };
  33. };
  34. &usdhc3 {
  35. #address-cells = <1>;
  36. #size-cells = <0>;
  37. pinctrl-names = "default";
  38. pinctrl-0 = <&pinctrl_usdhc3_wl>;
  39. vmmc-supply = <&reg_wl_en>;
  40. bus-width = <4>;
  41. non-removable;
  42. no-1-8-v;
  43. status = "disabled";
  44. brmcf: wifi@1 {
  45. compatible = "brcm,bcm4329-fmac";
  46. reg = <1>;
  47. };
  48. };
  49. &iomuxc {
  50. pinctrl_uart3_bt: uart3grp-bt {
  51. fsl,pins = <
  52. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  53. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  54. MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
  55. MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
  56. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */
  57. MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0xb0b1 /* DEV WAKEUP */
  58. MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0xb0b1 /* HOST WAKEUP */
  59. >;
  60. };
  61. pinctrl_usdhc3_wl: usdhc3grp-wl {
  62. fsl,pins = <
  63. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  64. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  65. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  66. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  67. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  68. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  69. >;
  70. };
  71. pinctrl_wl: wlgrp {
  72. fsl,pins = <
  73. MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */
  74. >;
  75. };
  76. };