imx6qdl-nitrogen6x.dtsi 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR X11
  2. /*
  3. * Copyright 2013 Boundary Devices, Inc.
  4. * Copyright 2011 Freescale Semiconductor, Inc.
  5. * Copyright 2011 Linaro Ltd.
  6. */
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. / {
  10. chosen {
  11. stdout-path = &uart2;
  12. };
  13. memory@10000000 {
  14. device_type = "memory";
  15. reg = <0x10000000 0x40000000>;
  16. };
  17. regulators {
  18. compatible = "simple-bus";
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. reg_2p5v: regulator@0 {
  22. compatible = "regulator-fixed";
  23. reg = <0>;
  24. regulator-name = "2P5V";
  25. regulator-min-microvolt = <2500000>;
  26. regulator-max-microvolt = <2500000>;
  27. regulator-always-on;
  28. };
  29. reg_3p3v: regulator@1 {
  30. compatible = "regulator-fixed";
  31. reg = <1>;
  32. regulator-name = "3P3V";
  33. regulator-min-microvolt = <3300000>;
  34. regulator-max-microvolt = <3300000>;
  35. regulator-always-on;
  36. };
  37. reg_usb_otg_vbus: regulator@2 {
  38. compatible = "regulator-fixed";
  39. reg = <2>;
  40. regulator-name = "usb_otg_vbus";
  41. regulator-min-microvolt = <5000000>;
  42. regulator-max-microvolt = <5000000>;
  43. gpio = <&gpio3 22 0>;
  44. enable-active-high;
  45. };
  46. reg_can_xcvr: regulator@3 {
  47. compatible = "regulator-fixed";
  48. reg = <3>;
  49. regulator-name = "CAN XCVR";
  50. regulator-min-microvolt = <3300000>;
  51. regulator-max-microvolt = <3300000>;
  52. pinctrl-names = "default";
  53. pinctrl-0 = <&pinctrl_can_xcvr>;
  54. gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  55. };
  56. reg_wlan_vmmc: regulator@4 {
  57. compatible = "regulator-fixed";
  58. reg = <4>;
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_wlan_vmmc>;
  61. regulator-name = "reg_wlan_vmmc";
  62. regulator-min-microvolt = <3300000>;
  63. regulator-max-microvolt = <3300000>;
  64. gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
  65. startup-delay-us = <70000>;
  66. enable-active-high;
  67. };
  68. reg_usb_h1_vbus: regulator@5 {
  69. compatible = "regulator-fixed";
  70. reg = <5>;
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&pinctrl_usbh1>;
  73. regulator-name = "usb_h1_vbus";
  74. regulator-min-microvolt = <3300000>;
  75. regulator-max-microvolt = <3300000>;
  76. gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
  77. enable-active-high;
  78. };
  79. };
  80. gpio-keys {
  81. compatible = "gpio-keys";
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&pinctrl_gpio_keys>;
  84. power {
  85. label = "Power Button";
  86. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  87. linux,code = <KEY_POWER>;
  88. wakeup-source;
  89. };
  90. menu {
  91. label = "Menu";
  92. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  93. linux,code = <KEY_MENU>;
  94. };
  95. home {
  96. label = "Home";
  97. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  98. linux,code = <KEY_HOME>;
  99. };
  100. back {
  101. label = "Back";
  102. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  103. linux,code = <KEY_BACK>;
  104. };
  105. volume-up {
  106. label = "Volume Up";
  107. gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  108. linux,code = <KEY_VOLUMEUP>;
  109. };
  110. volume-down {
  111. label = "Volume Down";
  112. gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  113. linux,code = <KEY_VOLUMEDOWN>;
  114. };
  115. };
  116. sound {
  117. compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
  118. "fsl,imx-audio-sgtl5000";
  119. model = "imx6q-nitrogen6x-sgtl5000";
  120. ssi-controller = <&ssi1>;
  121. audio-codec = <&codec>;
  122. audio-routing =
  123. "MIC_IN", "Mic Jack",
  124. "Mic Jack", "Mic Bias",
  125. "Headphone Jack", "HP_OUT";
  126. mux-int-port = <1>;
  127. mux-ext-port = <3>;
  128. };
  129. backlight_lcd: backlight-lcd {
  130. compatible = "pwm-backlight";
  131. pwms = <&pwm1 0 5000000>;
  132. brightness-levels = <0 4 8 16 32 64 128 255>;
  133. default-brightness-level = <7>;
  134. power-supply = <&reg_3p3v>;
  135. status = "okay";
  136. };
  137. backlight_lvds: backlight-lvds {
  138. compatible = "pwm-backlight";
  139. pwms = <&pwm4 0 5000000>;
  140. brightness-levels = <0 4 8 16 32 64 128 255>;
  141. default-brightness-level = <7>;
  142. power-supply = <&reg_3p3v>;
  143. status = "okay";
  144. };
  145. lcd_display: disp0 {
  146. compatible = "fsl,imx-parallel-display";
  147. #address-cells = <1>;
  148. #size-cells = <0>;
  149. interface-pix-fmt = "bgr666";
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_j15>;
  152. status = "okay";
  153. port@0 {
  154. reg = <0>;
  155. lcd_display_in: endpoint {
  156. remote-endpoint = <&ipu1_di0_disp0>;
  157. };
  158. };
  159. port@1 {
  160. reg = <1>;
  161. lcd_display_out: endpoint {
  162. remote-endpoint = <&lcd_panel_in>;
  163. };
  164. };
  165. };
  166. panel-lcd {
  167. compatible = "okaya,rs800480t-7x0gp";
  168. backlight = <&backlight_lcd>;
  169. port {
  170. lcd_panel_in: endpoint {
  171. remote-endpoint = <&lcd_display_out>;
  172. };
  173. };
  174. };
  175. panel-lvds0 {
  176. compatible = "hannstar,hsd100pxn1";
  177. backlight = <&backlight_lvds>;
  178. port {
  179. panel_in: endpoint {
  180. remote-endpoint = <&lvds0_out>;
  181. };
  182. };
  183. };
  184. };
  185. &audmux {
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&pinctrl_audmux>;
  188. status = "okay";
  189. };
  190. &can1 {
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&pinctrl_can1>;
  193. xceiver-supply = <&reg_can_xcvr>;
  194. status = "okay";
  195. };
  196. &clks {
  197. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  198. <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  199. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  200. <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  201. };
  202. &ecspi1 {
  203. cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
  204. pinctrl-names = "default";
  205. pinctrl-0 = <&pinctrl_ecspi1>;
  206. status = "okay";
  207. flash: flash@0 {
  208. compatible = "sst,sst25vf016b", "jedec,spi-nor";
  209. spi-max-frequency = <20000000>;
  210. reg = <0>;
  211. #address-cells = <1>;
  212. #size-cells = <1>;
  213. partition@0 {
  214. label = "bootloader";
  215. reg = <0x0 0xc0000>;
  216. };
  217. partition@c0000 {
  218. label = "env";
  219. reg = <0xc0000 0x2000>;
  220. };
  221. partition@c2000 {
  222. label = "splash";
  223. reg = <0xc2000 0x13e000>;
  224. };
  225. };
  226. };
  227. &fec {
  228. pinctrl-names = "default";
  229. pinctrl-0 = <&pinctrl_enet>;
  230. phy-mode = "rgmii";
  231. phy-handle = <&ethphy>;
  232. phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
  233. /delete-property/ interrupts;
  234. interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  235. <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  236. fsl,err006687-workaround-present;
  237. status = "okay";
  238. mdio {
  239. #address-cells = <1>;
  240. #size-cells = <0>;
  241. ethphy: ethernet-phy {
  242. compatible = "ethernet-phy-ieee802.3-c22";
  243. txen-skew-ps = <0>;
  244. txc-skew-ps = <3000>;
  245. rxdv-skew-ps = <0>;
  246. rxc-skew-ps = <3000>;
  247. rxd0-skew-ps = <0>;
  248. rxd1-skew-ps = <0>;
  249. rxd2-skew-ps = <0>;
  250. rxd3-skew-ps = <0>;
  251. txd0-skew-ps = <0>;
  252. txd1-skew-ps = <0>;
  253. txd2-skew-ps = <0>;
  254. txd3-skew-ps = <0>;
  255. };
  256. };
  257. };
  258. &hdmi {
  259. ddc-i2c-bus = <&i2c2>;
  260. status = "okay";
  261. };
  262. &i2c1 {
  263. clock-frequency = <100000>;
  264. pinctrl-names = "default";
  265. pinctrl-0 = <&pinctrl_i2c1>;
  266. status = "okay";
  267. codec: sgtl5000@a {
  268. compatible = "fsl,sgtl5000";
  269. reg = <0x0a>;
  270. clocks = <&clks IMX6QDL_CLK_CKO>;
  271. VDDA-supply = <&reg_2p5v>;
  272. VDDIO-supply = <&reg_3p3v>;
  273. };
  274. rtc: rtc@6f {
  275. compatible = "isil,isl1208";
  276. reg = <0x6f>;
  277. };
  278. };
  279. &i2c2 {
  280. clock-frequency = <100000>;
  281. pinctrl-names = "default";
  282. pinctrl-0 = <&pinctrl_i2c2>;
  283. status = "okay";
  284. };
  285. &i2c3 {
  286. clock-frequency = <100000>;
  287. pinctrl-names = "default";
  288. pinctrl-0 = <&pinctrl_i2c3>;
  289. status = "okay";
  290. touchscreen@4 {
  291. compatible = "eeti,egalax_ts";
  292. reg = <0x04>;
  293. interrupt-parent = <&gpio1>;
  294. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  295. wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  296. };
  297. touchscreen@38 {
  298. compatible = "edt,edt-ft5x06";
  299. reg = <0x38>;
  300. interrupt-parent = <&gpio1>;
  301. interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
  302. wakeup-source;
  303. };
  304. };
  305. &iomuxc {
  306. pinctrl-names = "default";
  307. pinctrl-0 = <&pinctrl_hog>;
  308. imx6q-nitrogen6x {
  309. pinctrl_hog: hoggrp {
  310. fsl,pins = <
  311. /* SGTL5000 sys_mclk */
  312. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
  313. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
  314. >;
  315. };
  316. pinctrl_audmux: audmuxgrp {
  317. fsl,pins = <
  318. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  319. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  320. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  321. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  322. >;
  323. };
  324. pinctrl_can1: can1grp {
  325. fsl,pins = <
  326. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
  327. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
  328. >;
  329. };
  330. pinctrl_can_xcvr: can-xcvrgrp {
  331. fsl,pins = <
  332. /* Flexcan XCVR enable */
  333. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
  334. >;
  335. };
  336. pinctrl_ecspi1: ecspi1grp {
  337. fsl,pins = <
  338. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  339. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  340. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  341. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
  342. >;
  343. };
  344. pinctrl_enet: enetgrp {
  345. fsl,pins = <
  346. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  347. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  348. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
  349. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
  350. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
  351. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
  352. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
  353. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
  354. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  355. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  356. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
  357. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
  358. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  359. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  360. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
  361. /* Phy reset */
  362. MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
  363. MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  364. >;
  365. };
  366. pinctrl_gpio_keys: gpio-keysgrp {
  367. fsl,pins = <
  368. /* Power Button */
  369. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  370. /* Menu Button */
  371. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  372. /* Home Button */
  373. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  374. /* Back Button */
  375. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  376. /* Volume Up Button */
  377. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  378. /* Volume Down Button */
  379. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  380. >;
  381. };
  382. pinctrl_i2c1: i2c1grp {
  383. fsl,pins = <
  384. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  385. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  386. >;
  387. };
  388. pinctrl_i2c2: i2c2grp {
  389. fsl,pins = <
  390. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  391. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  392. >;
  393. };
  394. pinctrl_i2c3: i2c3grp {
  395. fsl,pins = <
  396. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  397. MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
  398. >;
  399. };
  400. pinctrl_j15: j15grp {
  401. fsl,pins = <
  402. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  403. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
  404. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  405. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  406. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  407. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  408. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  409. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  410. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  411. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  412. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  413. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  414. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  415. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  416. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  417. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  418. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  419. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  420. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  421. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  422. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  423. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  424. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  425. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  426. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  427. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  428. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  429. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  430. >;
  431. };
  432. pinctrl_pwm1: pwm1grp {
  433. fsl,pins = <
  434. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  435. >;
  436. };
  437. pinctrl_pwm3: pwm3grp {
  438. fsl,pins = <
  439. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  440. >;
  441. };
  442. pinctrl_pwm4: pwm4grp {
  443. fsl,pins = <
  444. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  445. >;
  446. };
  447. pinctrl_uart1: uart1grp {
  448. fsl,pins = <
  449. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  450. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  451. >;
  452. };
  453. pinctrl_uart2: uart2grp {
  454. fsl,pins = <
  455. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  456. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  457. >;
  458. };
  459. pinctrl_usbh1: usbh1grp {
  460. fsl,pins = <
  461. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
  462. >;
  463. };
  464. pinctrl_usbotg: usbotggrp {
  465. fsl,pins = <
  466. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  467. MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
  468. /* power enable, high active */
  469. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
  470. >;
  471. };
  472. pinctrl_usdhc2: usdhc2grp {
  473. fsl,pins = <
  474. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
  475. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
  476. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
  477. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
  478. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
  479. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
  480. >;
  481. };
  482. pinctrl_usdhc3: usdhc3grp {
  483. fsl,pins = <
  484. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  485. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  486. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  487. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  488. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  489. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  490. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
  491. >;
  492. };
  493. pinctrl_usdhc4: usdhc4grp {
  494. fsl,pins = <
  495. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  496. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  497. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  498. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  499. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  500. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  501. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
  502. >;
  503. };
  504. pinctrl_wlan_vmmc: wlan-vmmcgrp {
  505. fsl,pins = <
  506. MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
  507. MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
  508. MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
  509. MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
  510. >;
  511. };
  512. };
  513. };
  514. &ipu1_di0_disp0 {
  515. remote-endpoint = <&lcd_display_in>;
  516. };
  517. &ldb {
  518. status = "okay";
  519. lvds-channel@0 {
  520. status = "okay";
  521. port@4 {
  522. reg = <4>;
  523. lvds0_out: endpoint {
  524. remote-endpoint = <&panel_in>;
  525. };
  526. };
  527. };
  528. };
  529. &pcie {
  530. status = "okay";
  531. };
  532. &pwm1 {
  533. #pwm-cells = <2>;
  534. pinctrl-names = "default";
  535. pinctrl-0 = <&pinctrl_pwm1>;
  536. status = "okay";
  537. };
  538. &pwm3 {
  539. pinctrl-names = "default";
  540. pinctrl-0 = <&pinctrl_pwm3>;
  541. status = "okay";
  542. };
  543. &pwm4 {
  544. #pwm-cells = <2>;
  545. pinctrl-names = "default";
  546. pinctrl-0 = <&pinctrl_pwm4>;
  547. status = "okay";
  548. };
  549. &ssi1 {
  550. status = "okay";
  551. };
  552. &uart1 {
  553. pinctrl-names = "default";
  554. pinctrl-0 = <&pinctrl_uart1>;
  555. status = "okay";
  556. };
  557. &uart2 {
  558. pinctrl-names = "default";
  559. pinctrl-0 = <&pinctrl_uart2>;
  560. status = "okay";
  561. };
  562. &usbh1 {
  563. vbus-supply = <&reg_usb_h1_vbus>;
  564. status = "okay";
  565. };
  566. &usbotg {
  567. vbus-supply = <&reg_usb_otg_vbus>;
  568. pinctrl-names = "default";
  569. pinctrl-0 = <&pinctrl_usbotg>;
  570. disable-over-current;
  571. status = "okay";
  572. };
  573. &usdhc2 {
  574. pinctrl-names = "default";
  575. pinctrl-0 = <&pinctrl_usdhc2>;
  576. bus-width = <4>;
  577. non-removable;
  578. vmmc-supply = <&reg_wlan_vmmc>;
  579. cap-power-off-card;
  580. keep-power-in-suspend;
  581. status = "okay";
  582. #address-cells = <1>;
  583. #size-cells = <0>;
  584. wlcore: wlcore@2 {
  585. compatible = "ti,wl1271";
  586. reg = <2>;
  587. interrupt-parent = <&gpio6>;
  588. interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
  589. ref-clock-frequency = <38400000>;
  590. };
  591. };
  592. &usdhc3 {
  593. pinctrl-names = "default";
  594. pinctrl-0 = <&pinctrl_usdhc3>;
  595. cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
  596. vmmc-supply = <&reg_3p3v>;
  597. status = "okay";
  598. };
  599. &usdhc4 {
  600. pinctrl-names = "default";
  601. pinctrl-0 = <&pinctrl_usdhc4>;
  602. cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
  603. vmmc-supply = <&reg_3p3v>;
  604. status = "okay";
  605. };