imx6qdl-apf6dev.dtsi 9.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR MIT
  2. //
  3. // Copyright 2015 Armadeus Systems <[email protected]>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. #include <dt-bindings/interrupt-controller/irq.h>
  7. / {
  8. chosen {
  9. stdout-path = &uart4;
  10. };
  11. backlight: backlight {
  12. compatible = "pwm-backlight";
  13. pwms = <&pwm3 0 191000>;
  14. brightness-levels = <0 4 8 16 32 64 128 255>;
  15. default-brightness-level = <0>;
  16. power-supply = <&reg_5v>;
  17. };
  18. disp0 {
  19. compatible = "fsl,imx-parallel-display";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_ipu1_disp0>;
  22. #address-cells = <1>;
  23. #size-cells = <0>;
  24. port@0 {
  25. reg = <0>;
  26. display_in: endpoint {
  27. remote-endpoint = <&ipu1_di0_disp0>;
  28. };
  29. };
  30. port@1 {
  31. reg = <1>;
  32. display_out: endpoint {
  33. remote-endpoint = <&panel_in>;
  34. };
  35. };
  36. };
  37. gpio-keys {
  38. compatible = "gpio-keys";
  39. pinctrl-names = "default";
  40. pinctrl-0 = <&pinctrl_gpio_keys>;
  41. user-button {
  42. label = "User button";
  43. gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  44. linux,code = <BTN_MISC>;
  45. wakeup-source;
  46. };
  47. };
  48. leds {
  49. compatible = "gpio-leds";
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&pinctrl_gpio_leds>;
  52. user-led {
  53. label = "User LED";
  54. gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
  55. linux,default-trigger = "heartbeat";
  56. default-state = "on";
  57. };
  58. };
  59. panel {
  60. compatible = "armadeus,st0700-adapt";
  61. power-supply = <&reg_3p3v>;
  62. backlight = <&backlight>;
  63. port {
  64. panel_in: endpoint {
  65. remote-endpoint = <&display_out>;
  66. };
  67. };
  68. };
  69. reg_3p3v: regulator-3p3v {
  70. compatible = "regulator-fixed";
  71. regulator-name = "3P3V";
  72. regulator-min-microvolt = <3300000>;
  73. regulator-max-microvolt = <3300000>;
  74. regulator-always-on;
  75. vin-supply = <&reg_5v>;
  76. };
  77. reg_5v: regulator-5v {
  78. compatible = "regulator-fixed";
  79. regulator-name = "5V";
  80. regulator-min-microvolt = <5000000>;
  81. regulator-max-microvolt = <5000000>;
  82. regulator-always-on;
  83. };
  84. reg_usb_otg_vbus: regulator-usb-otg-vbus {
  85. compatible = "regulator-fixed";
  86. regulator-name = "usb_otg_vbus";
  87. regulator-min-microvolt = <5000000>;
  88. regulator-max-microvolt = <5000000>;
  89. regulator-always-on;
  90. };
  91. sound {
  92. compatible = "fsl,imx6-armadeus-sgtl5000",
  93. "fsl,imx-audio-sgtl5000";
  94. model = "imx6-armadeus-sgtl5000";
  95. ssi-controller = <&ssi1>;
  96. audio-codec = <&codec>;
  97. audio-routing =
  98. "MIC_IN", "Mic Jack",
  99. "Mic Jack", "Mic Bias",
  100. "Headphone Jack", "HP_OUT";
  101. mux-int-port = <1>;
  102. mux-ext-port = <3>;
  103. };
  104. sound-spdif {
  105. compatible = "fsl,imx-audio-spdif";
  106. model = "imx-spdif";
  107. spdif-controller = <&spdif>;
  108. spdif-out;
  109. };
  110. };
  111. &audmux {
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&pinctrl_audmux>;
  114. status = "okay";
  115. };
  116. &can2 {
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&pinctrl_flexcan2>;
  119. xceiver-supply = <&reg_5v>;
  120. status = "okay";
  121. };
  122. &ecspi1 {
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_ecspi1>;
  125. cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
  126. <&gpio4 10 GPIO_ACTIVE_LOW>,
  127. <&gpio4 11 GPIO_ACTIVE_LOW>;
  128. status = "okay";
  129. };
  130. &hdmi {
  131. ddc-i2c-bus = <&i2c3>;
  132. status = "okay";
  133. };
  134. &i2c1 {
  135. clock-frequency = <400000>;
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&pinctrl_i2c1>;
  138. status = "okay";
  139. touchscreen@48 {
  140. compatible = "semtech,sx8654";
  141. reg = <0x48>;
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_touchscreen>;
  144. interrupt-parent = <&gpio6>;
  145. interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  146. };
  147. };
  148. &i2c2 {
  149. clock-frequency = <400000>;
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_i2c2>;
  152. status = "okay";
  153. codec: sgtl5000@a {
  154. compatible = "fsl,sgtl5000";
  155. reg = <0x0a>;
  156. clocks = <&clks IMX6QDL_CLK_CKO>;
  157. VDDA-supply = <&reg_3p3v>;
  158. VDDIO-supply = <&reg_3p3v>;
  159. };
  160. rtc@6f {
  161. compatible = "microchip,mcp7940x";
  162. reg = <0x6f>;
  163. };
  164. };
  165. &i2c3 {
  166. clock-frequency = <400000>;
  167. pinctrl-names = "default";
  168. pinctrl-0 = <&pinctrl_i2c3>;
  169. status = "okay";
  170. };
  171. &ipu1_di0_disp0 {
  172. remote-endpoint = <&display_in>;
  173. };
  174. &pcie {
  175. pinctrl-names = "default";
  176. pinctrl-0 = <&pinctrl_pcie>;
  177. reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>;
  178. status = "okay";
  179. };
  180. &pwm3 {
  181. #pwm-cells = <2>;
  182. pinctrl-names = "default";
  183. pinctrl-0 = <&pinctrl_pwm3>;
  184. status = "okay";
  185. };
  186. /* GPS */
  187. &uart1 {
  188. pinctrl-names = "default";
  189. pinctrl-0 = <&pinctrl_uart1>;
  190. status = "okay";
  191. };
  192. /* GSM */
  193. &uart3 {
  194. pinctrl-names = "default";
  195. pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
  196. uart-has-rtscts;
  197. status = "okay";
  198. };
  199. /* console */
  200. &uart4 {
  201. pinctrl-names = "default";
  202. pinctrl-0 = <&pinctrl_uart4>;
  203. status = "okay";
  204. };
  205. &usbh1 {
  206. vbus-supply = <&reg_5v>;
  207. phy_type = "utmi";
  208. status = "okay";
  209. };
  210. &usbotg {
  211. pinctrl-names = "default";
  212. pinctrl-0 = <&pinctrl_usbotg>;
  213. vbus-supply = <&reg_usb_otg_vbus>;
  214. dr_mode = "otg";
  215. status = "okay";
  216. };
  217. /* microSD */
  218. &usdhc2 {
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pinctrl_usdhc2>;
  221. cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  222. no-1-8-v;
  223. status = "okay";
  224. };
  225. &spdif {
  226. pinctrl-names = "default";
  227. pinctrl-0 = <&pinctrl_spdif>;
  228. status = "okay";
  229. };
  230. &ssi1 {
  231. status = "okay";
  232. };
  233. &iomuxc {
  234. pinctrl-names = "default";
  235. pinctrl-0 = <&pinctrl_gpios>;
  236. pinctrl_audmux: audmuxgrp {
  237. fsl,pins = <
  238. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
  239. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
  240. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
  241. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
  242. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
  243. >;
  244. };
  245. pinctrl_ecspi1: ecspi1grp {
  246. fsl,pins = <
  247. MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
  248. MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
  249. MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
  250. MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
  251. MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
  252. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
  253. >;
  254. };
  255. pinctrl_flexcan2: flexcan2grp {
  256. fsl,pins = <
  257. MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
  258. MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
  259. >;
  260. };
  261. pinctrl_gpio_keys: gpiokeysgrp {
  262. fsl,pins = <
  263. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
  264. >;
  265. };
  266. pinctrl_gpio_leds: gpioledsgrp {
  267. fsl,pins = <
  268. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
  269. >;
  270. };
  271. pinctrl_gpios: gpiosgrp {
  272. fsl,pins = <
  273. MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1
  274. MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
  275. MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1
  276. MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1
  277. MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x100b1
  278. MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x100b1
  279. MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x100b1
  280. MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1
  281. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1
  282. >;
  283. };
  284. pinctrl_gsm: gsmgrp {
  285. fsl,pins = <
  286. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 /* GSM_POKIN */
  287. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
  288. >;
  289. };
  290. pinctrl_i2c1: i2c1grp {
  291. fsl,pins = <
  292. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
  293. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
  294. >;
  295. };
  296. pinctrl_i2c2: i2c2grp {
  297. fsl,pins = <
  298. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  299. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  300. >;
  301. };
  302. pinctrl_i2c3: i2c3grp {
  303. fsl,pins = <
  304. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  305. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  306. >;
  307. };
  308. pinctrl_ipu1_disp0: ipu1disp0grp {
  309. fsl,pins = <
  310. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100b1
  311. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100b1
  312. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100b1
  313. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100b1
  314. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100b1
  315. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100b1
  316. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100b1
  317. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100b1
  318. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100b1
  319. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100b1
  320. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100b1
  321. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100b1
  322. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100b1
  323. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100b1
  324. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100b1
  325. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100b1
  326. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100b1
  327. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100b1
  328. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100b1
  329. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100b1
  330. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100b1
  331. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100b1
  332. >;
  333. };
  334. pinctrl_pcie: pciegrp {
  335. fsl,pins = <
  336. MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
  337. >;
  338. };
  339. pinctrl_pwm3: pwm3grp {
  340. fsl,pins = <
  341. MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
  342. >;
  343. };
  344. pinctrl_uart1: uart1grp {
  345. fsl,pins = <
  346. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
  347. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
  348. >;
  349. };
  350. pinctrl_uart3: uart3grp {
  351. fsl,pins = <
  352. MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b0
  353. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
  354. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
  355. MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b0
  356. >;
  357. };
  358. pinctrl_uart4: uart4grp {
  359. fsl,pins = <
  360. MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
  361. MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
  362. >;
  363. };
  364. pinctrl_usbotg: usbotggrp {
  365. fsl,pins = <
  366. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
  367. >;
  368. };
  369. pinctrl_usdhc2: usdhc2grp {
  370. fsl,pins = <
  371. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  372. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  373. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  374. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  375. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  376. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  377. >;
  378. };
  379. pinctrl_spdif: spdifgrp {
  380. fsl,pins = <
  381. MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
  382. >;
  383. };
  384. pinctrl_touchscreen: touchscreengrp {
  385. fsl,pins = <
  386. MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
  387. >;
  388. };
  389. };