imx6q-novena.dts 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803
  1. /*
  2. * Copyright 2015 Sutajio Ko-Usagi PTE LTD
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public
  20. * License along with this file; if not, write to the Free
  21. * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. *
  24. * Or, alternatively,
  25. *
  26. * b) Permission is hereby granted, free of charge, to any person
  27. * obtaining a copy of this software and associated documentation
  28. * files (the "Software"), to deal in the Software without
  29. * restriction, including without limitation the rights to use,
  30. * copy, modify, merge, publish, distribute, sublicense, and/or
  31. * sell copies of the Software, and to permit persons to whom the
  32. * Software is furnished to do so, subject to the following
  33. * conditions:
  34. *
  35. * The above copyright notice and this permission notice shall be
  36. * included in all copies or substantial portions of the Software.
  37. *
  38. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45. * OTHER DEALINGS IN THE SOFTWARE.
  46. *
  47. */
  48. /dts-v1/;
  49. #include "imx6q.dtsi"
  50. #include <dt-bindings/gpio/gpio.h>
  51. #include <dt-bindings/input/input.h>
  52. / {
  53. model = "Kosagi Novena Dual/Quad";
  54. compatible = "kosagi,imx6q-novena", "fsl,imx6q";
  55. /* Will be filled by the bootloader */
  56. memory@10000000 {
  57. device_type = "memory";
  58. reg = <0x10000000 0>;
  59. };
  60. chosen {
  61. stdout-path = &uart2;
  62. };
  63. backlight: backlight {
  64. compatible = "pwm-backlight";
  65. pwms = <&pwm1 0 10000000>;
  66. pinctrl-names = "default";
  67. pinctrl-0 = <&pinctrl_backlight_novena>;
  68. power-supply = <&reg_lvds_lcd>;
  69. brightness-levels = <0 3 6 12 16 24 32 48 64 96 128 192 255>;
  70. default-brightness-level = <12>;
  71. };
  72. gpio-keys {
  73. compatible = "gpio-keys";
  74. pinctrl-names = "default";
  75. pinctrl-0 = <&pinctrl_gpio_keys_novena>;
  76. user-button {
  77. label = "User Button";
  78. gpios = <&gpio4 14 GPIO_ACTIVE_LOW>;
  79. linux,code = <KEY_POWER>;
  80. };
  81. lid-event {
  82. label = "Lid";
  83. gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
  84. linux,input-type = <5>; /* EV_SW */
  85. linux,code = <0>; /* SW_LID */
  86. };
  87. };
  88. leds {
  89. compatible = "gpio-leds";
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_leds_novena>;
  92. led-heartbeat {
  93. label = "novena:white:panel";
  94. gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  95. linux,default-trigger = "default-on";
  96. };
  97. };
  98. panel: panel {
  99. compatible = "innolux,n133hse-ea1";
  100. backlight = <&backlight>;
  101. };
  102. reg_2p5v: regulator-2p5v {
  103. compatible = "regulator-fixed";
  104. regulator-name = "2P5V";
  105. regulator-min-microvolt = <2500000>;
  106. regulator-max-microvolt = <2500000>;
  107. regulator-always-on;
  108. };
  109. reg_3p3v: regulator-3p3v {
  110. compatible = "regulator-fixed";
  111. regulator-name = "3P3V";
  112. regulator-min-microvolt = <3300000>;
  113. regulator-max-microvolt = <3300000>;
  114. regulator-always-on;
  115. };
  116. reg_audio_codec: regulator-audio-codec {
  117. compatible = "regulator-fixed";
  118. regulator-name = "es8328-power";
  119. regulator-boot-on;
  120. regulator-min-microvolt = <5000000>;
  121. regulator-max-microvolt = <5000000>;
  122. startup-delay-us = <400000>;
  123. gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
  124. enable-active-high;
  125. };
  126. reg_display: regulator-display {
  127. compatible = "regulator-fixed";
  128. regulator-name = "lcd-display-power";
  129. regulator-min-microvolt = <3300000>;
  130. regulator-max-microvolt = <3300000>;
  131. startup-delay-us = <200000>;
  132. gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>;
  133. enable-active-high;
  134. };
  135. reg_lvds_lcd: regulator-lvds-lcd {
  136. compatible = "regulator-fixed";
  137. regulator-name = "lcd-lvds-power";
  138. regulator-min-microvolt = <3300000>;
  139. regulator-max-microvolt = <3300000>;
  140. gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
  141. enable-active-high;
  142. };
  143. reg_pcie: regulator-pcie {
  144. compatible = "regulator-fixed";
  145. regulator-name = "pcie-bus-power";
  146. regulator-min-microvolt = <1500000>;
  147. regulator-max-microvolt = <1500000>;
  148. gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
  149. enable-active-high;
  150. };
  151. reg_sata: regulator-sata {
  152. compatible = "regulator-fixed";
  153. regulator-name = "sata-power";
  154. regulator-boot-on;
  155. regulator-min-microvolt = <3300000>;
  156. regulator-max-microvolt = <3300000>;
  157. startup-delay-us = <10000>;
  158. gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
  159. enable-active-high;
  160. };
  161. reg_usb_otg_vbus: regulator-usb-otg-vbus {
  162. compatible = "regulator-fixed";
  163. regulator-name = "usb_otg_vbus";
  164. regulator-min-microvolt = <5000000>;
  165. regulator-max-microvolt = <5000000>;
  166. enable-active-high;
  167. };
  168. sound {
  169. compatible = "fsl,imx-audio-es8328";
  170. model = "imx-audio-es8328";
  171. ssi-controller = <&ssi1>;
  172. audio-codec = <&codec>;
  173. audio-amp-supply = <&reg_audio_codec>;
  174. jack-gpio = <&gpio5 15 GPIO_ACTIVE_HIGH>;
  175. audio-routing =
  176. "Speaker", "LOUT2",
  177. "Speaker", "ROUT2",
  178. "Speaker", "audio-amp",
  179. "Headphone", "ROUT1",
  180. "Headphone", "LOUT1",
  181. "LINPUT1", "Mic Jack",
  182. "RINPUT1", "Mic Jack",
  183. "Mic Jack", "Mic Bias";
  184. mux-int-port = <0x1>;
  185. mux-ext-port = <0x3>;
  186. };
  187. };
  188. &audmux {
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&pinctrl_audmux_novena>;
  191. status = "okay";
  192. };
  193. &ecspi3 {
  194. pinctrl-names = "default";
  195. pinctrl-0 = <&pinctrl_ecspi3_novena>;
  196. status = "okay";
  197. };
  198. &fec {
  199. pinctrl-names = "default";
  200. pinctrl-0 = <&pinctrl_enet_novena>;
  201. phy-mode = "rgmii";
  202. phy-handle = <&ethphy>;
  203. phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
  204. status = "okay";
  205. mdio {
  206. #address-cells = <1>;
  207. #size-cells = <0>;
  208. ethphy: ethernet-phy {
  209. compatible = "ethernet-phy-ieee802.3-c22";
  210. rxc-skew-ps = <3000>;
  211. rxdv-skew-ps = <0>;
  212. txc-skew-ps = <3000>;
  213. txen-skew-ps = <0>;
  214. rxd0-skew-ps = <0>;
  215. rxd1-skew-ps = <0>;
  216. rxd2-skew-ps = <0>;
  217. rxd3-skew-ps = <0>;
  218. txd0-skew-ps = <3000>;
  219. txd1-skew-ps = <3000>;
  220. txd2-skew-ps = <3000>;
  221. txd3-skew-ps = <3000>;
  222. };
  223. };
  224. };
  225. &hdmi {
  226. pinctrl-names = "default";
  227. pinctrl-0 = <&pinctrl_hdmi_novena>;
  228. ddc-i2c-bus = <&i2c2>;
  229. status = "okay";
  230. };
  231. &i2c1 {
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&pinctrl_i2c1_novena>;
  234. status = "okay";
  235. accel: mma8452@1c {
  236. compatible = "fsl,mma8452";
  237. reg = <0x1c>;
  238. };
  239. rtc: pcf8523@68 {
  240. compatible = "nxp,pcf8523";
  241. reg = <0x68>;
  242. };
  243. sbs_battery: bq20z75@b {
  244. compatible = "sbs,sbs-battery";
  245. reg = <0x0b>;
  246. sbs,i2c-retry-count = <50>;
  247. };
  248. touch: stmpe811@44 {
  249. compatible = "st,stmpe811";
  250. reg = <0x44>;
  251. irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
  252. id = <0>;
  253. blocks = <0x5>;
  254. irq-trigger = <0x1>;
  255. pinctrl-names = "default";
  256. pinctrl-0 = <&pinctrl_stmpe_novena>;
  257. vio-supply = <&reg_3p3v>;
  258. vcc-supply = <&reg_3p3v>;
  259. stmpe_touchscreen {
  260. compatible = "st,stmpe-ts";
  261. st,sample-time = <4>;
  262. st,mod-12b = <1>;
  263. st,ref-sel = <0>;
  264. st,adc-freq = <1>;
  265. st,ave-ctrl = <1>;
  266. st,touch-det-delay = <2>;
  267. st,settling = <2>;
  268. st,fraction-z = <7>;
  269. st,i-drive = <1>;
  270. };
  271. };
  272. };
  273. &i2c2 {
  274. pinctrl-names = "default";
  275. pinctrl-0 = <&pinctrl_i2c2_novena>;
  276. status = "okay";
  277. pmic: pfuze100@8 {
  278. compatible = "fsl,pfuze100";
  279. reg = <0x08>;
  280. regulators {
  281. reg_sw1a: sw1a {
  282. regulator-min-microvolt = <300000>;
  283. regulator-max-microvolt = <1875000>;
  284. regulator-boot-on;
  285. regulator-always-on;
  286. regulator-ramp-delay = <6250>;
  287. };
  288. reg_sw1c: sw1c {
  289. regulator-min-microvolt = <300000>;
  290. regulator-max-microvolt = <1875000>;
  291. regulator-boot-on;
  292. regulator-always-on;
  293. };
  294. reg_sw2: sw2 {
  295. regulator-min-microvolt = <800000>;
  296. regulator-max-microvolt = <3300000>;
  297. regulator-boot-on;
  298. regulator-always-on;
  299. };
  300. reg_sw3a: sw3a {
  301. regulator-min-microvolt = <400000>;
  302. regulator-max-microvolt = <1975000>;
  303. regulator-boot-on;
  304. regulator-always-on;
  305. };
  306. reg_sw3b: sw3b {
  307. regulator-min-microvolt = <400000>;
  308. regulator-max-microvolt = <1975000>;
  309. regulator-boot-on;
  310. regulator-always-on;
  311. };
  312. reg_sw4: sw4 {
  313. regulator-min-microvolt = <800000>;
  314. regulator-max-microvolt = <3300000>;
  315. };
  316. reg_swbst: swbst {
  317. regulator-min-microvolt = <5000000>;
  318. regulator-max-microvolt = <5150000>;
  319. regulator-boot-on;
  320. };
  321. reg_snvs: vsnvs {
  322. regulator-min-microvolt = <1000000>;
  323. regulator-max-microvolt = <3000000>;
  324. regulator-boot-on;
  325. regulator-always-on;
  326. };
  327. reg_vref: vrefddr {
  328. regulator-boot-on;
  329. regulator-always-on;
  330. };
  331. reg_vgen1: vgen1 {
  332. regulator-min-microvolt = <800000>;
  333. regulator-max-microvolt = <1550000>;
  334. };
  335. reg_vgen2: vgen2 {
  336. regulator-min-microvolt = <800000>;
  337. regulator-max-microvolt = <1550000>;
  338. };
  339. reg_vgen3: vgen3 {
  340. regulator-min-microvolt = <1800000>;
  341. regulator-max-microvolt = <3300000>;
  342. };
  343. reg_vgen4: vgen4 {
  344. regulator-min-microvolt = <1800000>;
  345. regulator-max-microvolt = <3300000>;
  346. regulator-always-on;
  347. };
  348. reg_vgen5: vgen5 {
  349. regulator-min-microvolt = <1800000>;
  350. regulator-max-microvolt = <3300000>;
  351. regulator-always-on;
  352. };
  353. reg_vgen6: vgen6 {
  354. regulator-min-microvolt = <1800000>;
  355. regulator-max-microvolt = <3300000>;
  356. regulator-always-on;
  357. };
  358. };
  359. };
  360. };
  361. &i2c3 {
  362. pinctrl-names = "default";
  363. pinctrl-0 = <&pinctrl_i2c3_novena>;
  364. status = "okay";
  365. codec: es8328@11 {
  366. compatible = "everest,es8328";
  367. reg = <0x11>;
  368. DVDD-supply = <&reg_audio_codec>;
  369. AVDD-supply = <&reg_audio_codec>;
  370. PVDD-supply = <&reg_audio_codec>;
  371. HPVDD-supply = <&reg_audio_codec>;
  372. pinctrl-names = "default";
  373. pinctrl-0 = <&pinctrl_sound_novena>;
  374. clocks = <&clks IMX6QDL_CLK_CKO1>;
  375. assigned-clocks = <&clks IMX6QDL_CLK_CKO>,
  376. <&clks IMX6QDL_CLK_CKO1_SEL>,
  377. <&clks IMX6QDL_CLK_PLL4_AUDIO>,
  378. <&clks IMX6QDL_CLK_CKO1>;
  379. assigned-clock-parents = <&clks IMX6QDL_CLK_CKO1>,
  380. <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
  381. <&clks IMX6QDL_CLK_OSC>,
  382. <&clks IMX6QDL_CLK_CKO1_PODF>;
  383. assigned-clock-rates = <0 0 722534400 22579200>;
  384. };
  385. };
  386. &kpp {
  387. pinctrl-names = "default";
  388. pinctrl-0 = <&pinctrl_kpp_novena>;
  389. linux,keymap = <
  390. MATRIX_KEY(1, 1, KEY_CONFIG)
  391. >;
  392. status = "okay";
  393. };
  394. &ldb {
  395. fsl,dual-channel;
  396. status = "okay";
  397. lvds-channel@0 {
  398. fsl,data-mapping = "jeida";
  399. fsl,data-width = <24>;
  400. fsl,panel = <&panel>;
  401. status = "okay";
  402. };
  403. };
  404. &pcie {
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&pinctrl_pcie_novena>;
  407. reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
  408. vpcie-supply = <&reg_pcie>;
  409. status = "okay";
  410. };
  411. &pwm1 {
  412. #pwm-cells = <2>;
  413. status = "okay";
  414. };
  415. &sata {
  416. target-supply = <&reg_sata>;
  417. fsl,transmit-level-mV = <1025>;
  418. fsl,transmit-boost-mdB = <0>;
  419. fsl,transmit-atten-16ths = <8>;
  420. status = "okay";
  421. };
  422. &ssi1 {
  423. status = "okay";
  424. };
  425. &uart2 {
  426. pinctrl-names = "default";
  427. pinctrl-0 = <&pinctrl_uart2_novena>;
  428. status = "okay";
  429. };
  430. &uart3 {
  431. pinctrl-names = "default";
  432. pinctrl-0 = <&pinctrl_uart3_novena>;
  433. status = "okay";
  434. };
  435. &uart4 {
  436. pinctrl-names = "default";
  437. pinctrl-0 = <&pinctrl_uart4_novena>;
  438. status = "okay";
  439. };
  440. &usbotg {
  441. vbus-supply = <&reg_usb_otg_vbus>;
  442. dr_mode = "otg";
  443. pinctrl-names = "default";
  444. pinctrl-0 = <&pinctrl_usbotg_novena>;
  445. disable-over-current;
  446. status = "okay";
  447. };
  448. &usbh1 {
  449. vbus-supply = <&reg_swbst>;
  450. status = "okay";
  451. };
  452. &usdhc2 {
  453. pinctrl-names = "default";
  454. pinctrl-0 = <&pinctrl_usdhc2_novena>;
  455. cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  456. wp-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  457. bus-width = <4>;
  458. status = "okay";
  459. };
  460. &usdhc3 {
  461. pinctrl-names = "default";
  462. pinctrl-0 = <&pinctrl_usdhc3_novena>;
  463. bus-width = <4>;
  464. non-removable;
  465. status = "okay";
  466. };
  467. &iomuxc {
  468. pinctrl_audmux_novena: audmuxgrp-novena {
  469. fsl,pins = <
  470. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  471. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  472. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  473. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  474. >;
  475. };
  476. pinctrl_backlight_novena: backlightgrp-novena {
  477. fsl,pins = <
  478. MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
  479. MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x1b0b1
  480. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1
  481. >;
  482. };
  483. pinctrl_ecspi3_novena: ecspi3grp-novena {
  484. fsl,pins = <
  485. MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
  486. MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
  487. MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
  488. >;
  489. };
  490. pinctrl_enet_novena: enetgrp-novena {
  491. fsl,pins = <
  492. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  493. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  494. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020
  495. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b028
  496. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b028
  497. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b028
  498. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b028
  499. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b028
  500. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  501. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  502. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
  503. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
  504. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  505. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  506. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
  507. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  508. /* Ethernet reset */
  509. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b1
  510. >;
  511. };
  512. pinctrl_fpga_gpio: fpgagpiogrp-novena {
  513. fsl,pins = <
  514. /* FPGA power */
  515. MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
  516. /* Reset */
  517. MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
  518. /* FPGA GPIOs */
  519. MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b0b1
  520. MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b0b1
  521. MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1
  522. MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b0b1
  523. MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b0b1
  524. MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0b1
  525. MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b0b1
  526. MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b0b1
  527. MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b0b1
  528. MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b0b1
  529. MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b0b1
  530. MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b0b1
  531. MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b0b1
  532. MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b1
  533. MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b0b1
  534. MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b1
  535. MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1
  536. MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b1
  537. MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1
  538. MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1
  539. MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
  540. MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b1
  541. MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b0b1
  542. MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b1
  543. MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b1
  544. MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b1
  545. >;
  546. };
  547. pinctrl_fpga_eim: fpgaeimgrp-novena {
  548. fsl,pins = <
  549. /* FPGA power */
  550. MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b1
  551. /* Reset */
  552. MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b1
  553. /* FPGA GPIOs */
  554. MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0f1
  555. MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0f1
  556. MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0f1
  557. MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0f1
  558. MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0f1
  559. MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0f1
  560. MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0f1
  561. MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0f1
  562. MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0f1
  563. MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0f1
  564. MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0f1
  565. MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0f1
  566. MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0f1
  567. MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0f1
  568. MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0f1
  569. MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0f1
  570. MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0f1
  571. MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0f1
  572. MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0f1
  573. MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0f1
  574. MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0f1
  575. MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0f1
  576. MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0f1
  577. MX6QDL_PAD_EIM_RW__EIM_RW 0xb0f1
  578. MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb0f1
  579. MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0f1
  580. >;
  581. };
  582. pinctrl_gpio_keys_novena: gpiokeysgrp-novena {
  583. fsl,pins = <
  584. /* User button */
  585. MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0
  586. /* PCIe Wakeup */
  587. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1f0e0
  588. /* Lid switch */
  589. MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
  590. >;
  591. };
  592. pinctrl_hdmi_novena: hdmigrp-novena {
  593. fsl,pins = <
  594. MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
  595. MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b1
  596. >;
  597. };
  598. pinctrl_i2c1_novena: i2c1grp-novena {
  599. fsl,pins = <
  600. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  601. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  602. >;
  603. };
  604. pinctrl_i2c2_novena: i2c2grp-novena {
  605. fsl,pins = <
  606. MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
  607. MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
  608. >;
  609. };
  610. pinctrl_i2c3_novena: i2c3grp-novena {
  611. fsl,pins = <
  612. MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
  613. MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
  614. >;
  615. };
  616. pinctrl_kpp_novena: kppgrp-novena {
  617. fsl,pins = <
  618. /* Front panel button */
  619. MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x1b0b1
  620. /* Fake column driver, not connected */
  621. MX6QDL_PAD_KEY_COL1__KEY_COL1 0x1b0b1
  622. >;
  623. };
  624. pinctrl_leds_novena: ledsgrp-novena {
  625. fsl,pins = <
  626. MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b1
  627. >;
  628. };
  629. pinctrl_pcie_novena: pciegrp-novena {
  630. fsl,pins = <
  631. /* Reset */
  632. MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b1
  633. /* Power On */
  634. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
  635. /* Wifi kill */
  636. MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b0b1
  637. >;
  638. };
  639. pinctrl_sata_novena: satagrp-novena {
  640. fsl,pins = <
  641. MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b1
  642. >;
  643. };
  644. pinctrl_senoko_novena: senokogrp-novena {
  645. fsl,pins = <
  646. /* Senoko IRQ line */
  647. MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x13048
  648. /* Senoko reset line */
  649. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b1
  650. >;
  651. };
  652. pinctrl_sound_novena: soundgrp-novena {
  653. fsl,pins = <
  654. /* Audio power regulator */
  655. MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b1
  656. /* Headphone plug */
  657. MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b1
  658. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
  659. >;
  660. };
  661. pinctrl_stmpe_novena: stmpegrp-novena {
  662. fsl,pins = <
  663. /* Touchscreen interrupt */
  664. MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b1
  665. >;
  666. };
  667. pinctrl_uart2_novena: uart2grp-novena {
  668. fsl,pins = <
  669. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  670. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  671. >;
  672. };
  673. pinctrl_uart3_novena: uart3grp-novena {
  674. fsl,pins = <
  675. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  676. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  677. >;
  678. };
  679. pinctrl_uart4_novena: uart4grp-novena {
  680. fsl,pins = <
  681. MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
  682. MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
  683. >;
  684. };
  685. pinctrl_usbotg_novena: usbotggrp-novena {
  686. fsl,pins = <
  687. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
  688. >;
  689. };
  690. pinctrl_usdhc2_novena: usdhc2grp-novena {
  691. fsl,pins = <
  692. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
  693. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
  694. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
  695. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
  696. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
  697. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
  698. /* Write protect */
  699. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1
  700. /* Card detect */
  701. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1
  702. >;
  703. };
  704. pinctrl_usdhc3_novena: usdhc3grp-novena {
  705. fsl,pins = <
  706. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
  707. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
  708. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
  709. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
  710. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
  711. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
  712. >;
  713. };
  714. };