imx6q-apalis-ixora-v1.2.dts 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Copyright 2014-2022 Toradex
  4. * Copyright 2012 Freescale Semiconductor, Inc.
  5. * Copyright 2011 Linaro Ltd.
  6. */
  7. /dts-v1/;
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/input/input.h>
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. #include "imx6q.dtsi"
  12. #include "imx6qdl-apalis.dtsi"
  13. / {
  14. model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2";
  15. compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
  16. "fsl,imx6q";
  17. aliases {
  18. i2c0 = &i2c1;
  19. i2c1 = &i2c3;
  20. i2c2 = &i2c2;
  21. rtc0 = &rtc_i2c;
  22. rtc1 = &snvs_rtc;
  23. };
  24. chosen {
  25. stdout-path = "serial0:115200n8";
  26. };
  27. leds {
  28. compatible = "gpio-leds";
  29. pinctrl-names = "default";
  30. pinctrl-0 = <&pinctrl_leds_ixora>;
  31. led4-green {
  32. gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  33. label = "LED_4_GREEN";
  34. };
  35. led4-red {
  36. gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  37. label = "LED_4_RED";
  38. };
  39. led5-green {
  40. gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
  41. label = "LED_5_GREEN";
  42. };
  43. led5-red {
  44. gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
  45. label = "LED_5_RED";
  46. };
  47. };
  48. reg_3v3_vmmc: regulator-3v3-vmmc {
  49. compatible = "regulator-fixed";
  50. enable-active-high;
  51. gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
  52. pinctrl-names = "default";
  53. pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
  54. regulator-max-microvolt = <3300000>;
  55. regulator-min-microvolt = <3300000>;
  56. regulator-name = "3v3_vmmc";
  57. startup-delay-us = <100>;
  58. };
  59. reg_can1_supply: regulator-can1-supply {
  60. compatible = "regulator-fixed";
  61. enable-active-high;
  62. gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>;
  63. pinctrl-names = "default";
  64. pinctrl-0 = <&pinctrl_enable_can1_power>;
  65. regulator-name = "can1_supply";
  66. };
  67. reg_can2_supply: regulator-can2-supply {
  68. compatible = "regulator-fixed";
  69. enable-active-high;
  70. gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&pinctrl_enable_can2_power>;
  73. regulator-name = "can2_supply";
  74. };
  75. };
  76. &can1 {
  77. xceiver-supply = <&reg_can1_supply>;
  78. status = "okay";
  79. };
  80. &can2 {
  81. xceiver-supply = <&reg_can2_supply>;
  82. status = "okay";
  83. };
  84. &gpio1 {
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&pinctrl_uart24_forceoff>;
  87. /*
  88. * uart-2-4-on-x21-enable-hog enables the UART transceiver for Apalis
  89. * UART2 and UART3. If one wants to disable the transceiver force
  90. * the GPIO to output-low, if one wants to control the transceiver
  91. * from user space delete the hog node.
  92. */
  93. uart-2-4-on-x21-enable-hog {
  94. gpio-hog;
  95. gpios = <11 GPIO_ACTIVE_HIGH>; /* MXM3 180 */
  96. output-high;
  97. };
  98. };
  99. /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
  100. &i2c1 {
  101. status = "okay";
  102. /* M41T0M6 real time clock on carrier board */
  103. rtc_i2c: rtc@68 {
  104. compatible = "st,m41t0";
  105. reg = <0x68>;
  106. };
  107. eeprom: eeprom@50 {
  108. compatible = "atmel,24c02";
  109. reg = <0x50>;
  110. pagesize = <16>;
  111. };
  112. };
  113. /*
  114. * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier
  115. * board)
  116. */
  117. &i2c3 {
  118. status = "okay";
  119. };
  120. &pcie {
  121. pinctrl-names = "default";
  122. pinctrl-0 = <&pinctrl_reset_moci>;
  123. /* active-high meaning opposite of regular PERST# active-low polarity */
  124. reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
  125. reset-gpio-active-high;
  126. status = "okay";
  127. };
  128. &pwm1 {
  129. status = "okay";
  130. };
  131. &pwm2 {
  132. status = "okay";
  133. };
  134. &pwm3 {
  135. status = "okay";
  136. };
  137. &pwm4 {
  138. status = "okay";
  139. };
  140. &reg_usb_host_vbus {
  141. status = "okay";
  142. };
  143. &reg_usb_otg_vbus {
  144. status = "okay";
  145. };
  146. &sata {
  147. status = "okay";
  148. };
  149. &sound_spdif {
  150. status = "okay";
  151. };
  152. &spdif {
  153. status = "okay";
  154. };
  155. &uart1 {
  156. status = "okay";
  157. };
  158. &uart2 {
  159. status = "okay";
  160. };
  161. &uart4 {
  162. status = "okay";
  163. };
  164. &uart5 {
  165. status = "okay";
  166. };
  167. &usbh1 {
  168. vbus-supply = <&reg_usb_host_vbus>;
  169. status = "okay";
  170. };
  171. &usbotg {
  172. vbus-supply = <&reg_usb_otg_vbus>;
  173. status = "okay";
  174. };
  175. /* MMC1 */
  176. &usdhc1 {
  177. pinctrl-names = "default", "sleep";
  178. pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
  179. pinctrl-1 = <&pinctrl_usdhc1_4bit_sleep &pinctrl_mmc_cd_sleep>;
  180. bus-width = <4>;
  181. cap-power-off-card;
  182. vmmc-supply = <&reg_3v3_vmmc>;
  183. status = "okay";
  184. };
  185. &iomuxc {
  186. pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
  187. fsl,pins = <
  188. MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
  189. >;
  190. };
  191. pinctrl_enable_can1_power: enablecan1powergrp {
  192. fsl,pins = <
  193. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  194. >;
  195. };
  196. pinctrl_enable_can2_power: enablecan2powergrp {
  197. fsl,pins = <
  198. MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0
  199. >;
  200. };
  201. pinctrl_uart24_forceoff: uart24forceoffgrp {
  202. fsl,pins = <
  203. MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
  204. >;
  205. };
  206. pinctrl_leds_ixora: ledsixoragrp {
  207. fsl,pins = <
  208. MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
  209. MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
  210. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  211. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  212. >;
  213. };
  214. pinctrl_mmc_cd_sleep: mmccdslpgrp {
  215. fsl,pins = <
  216. /* MMC1 CD */
  217. MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0
  218. >;
  219. };
  220. pinctrl_usdhc1_4bit_sleep: usdhc1-4bitslpgrp {
  221. fsl,pins = <
  222. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000
  223. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000
  224. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000
  225. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000
  226. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000
  227. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000
  228. >;
  229. };
  230. };