imx6-logicpd-som.dtsi 8.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (C) 2019 Logic PD, Inc.
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. chosen {
  8. stdout-path = &uart1;
  9. };
  10. memory@10000000 {
  11. device_type = "memory";
  12. reg = <0x10000000 0x80000000>;
  13. };
  14. reg_wl18xx_vmmc: regulator-wl18xx {
  15. compatible = "regulator-fixed";
  16. regulator-name = "vwl1837";
  17. regulator-min-microvolt = <3300000>;
  18. regulator-max-microvolt = <3300000>;
  19. gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  20. startup-delay-us = <70000>;
  21. enable-active-high;
  22. };
  23. };
  24. &clks {
  25. assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
  26. <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
  27. assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
  28. <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
  29. };
  30. &gpmi {
  31. pinctrl-names = "default";
  32. pinctrl-0 = <&pinctrl_gpmi_nand>;
  33. nand-on-flash-bbt;
  34. status = "okay";
  35. };
  36. &i2c3 {
  37. clock-frequency = <100000>;
  38. pinctrl-names = "default";
  39. pinctrl-0 = <&pinctrl_i2c3>;
  40. status = "okay";
  41. pfuze100: pmic@8 {
  42. compatible = "fsl,pfuze100";
  43. reg = <0x08>;
  44. regulators {
  45. sw1a_reg: sw1ab {
  46. regulator-min-microvolt = <725000>;
  47. regulator-max-microvolt = <1450000>;
  48. regulator-name = "vddcore";
  49. regulator-boot-on;
  50. regulator-always-on;
  51. regulator-ramp-delay = <6250>;
  52. };
  53. sw1c_reg: sw1c {
  54. regulator-min-microvolt = <725000>;
  55. regulator-max-microvolt = <1450000>;
  56. regulator-name = "vddsoc";
  57. regulator-boot-on;
  58. regulator-always-on;
  59. regulator-ramp-delay = <6250>;
  60. };
  61. sw2_reg: sw2 {
  62. regulator-min-microvolt = <3300000>;
  63. regulator-max-microvolt = <3300000>;
  64. regulator-name = "gen_3v3";
  65. regulator-boot-on;
  66. };
  67. sw3a_reg: sw3a {
  68. regulator-min-microvolt = <1350000>;
  69. regulator-max-microvolt = <1350000>;
  70. regulator-name = "sw3a_vddr";
  71. regulator-boot-on;
  72. regulator-always-on;
  73. };
  74. sw3b_reg: sw3b {
  75. regulator-min-microvolt = <1350000>;
  76. regulator-max-microvolt = <1350000>;
  77. regulator-name = "sw3b_vddr";
  78. regulator-boot-on;
  79. regulator-always-on;
  80. };
  81. sw4_reg: sw4 {
  82. regulator-min-microvolt = <1800000>;
  83. regulator-max-microvolt = <3300000>;
  84. regulator-name = "gen_rgmii";
  85. };
  86. swbst_reg: swbst {
  87. regulator-min-microvolt = <5000000>;
  88. regulator-max-microvolt = <5150000>;
  89. regulator-name = "gen_5v0";
  90. };
  91. snvs_reg: vsnvs {
  92. regulator-min-microvolt = <1000000>;
  93. regulator-max-microvolt = <3000000>;
  94. regulator-name = "gen_vsns";
  95. regulator-boot-on;
  96. regulator-always-on;
  97. };
  98. vref_reg: vrefddr {
  99. regulator-boot-on;
  100. regulator-always-on;
  101. };
  102. vgen1_reg: vgen1 {
  103. regulator-min-microvolt = <1500000>;
  104. regulator-max-microvolt = <1500000>;
  105. regulator-name = "gen_1v5";
  106. };
  107. vgen2_reg: vgen2 {
  108. regulator-name = "vgen2";
  109. regulator-min-microvolt = <800000>;
  110. regulator-max-microvolt = <1550000>;
  111. };
  112. vgen3_reg: vgen3 {
  113. regulator-name = "gen_vadj_0";
  114. regulator-min-microvolt = <1800000>;
  115. regulator-max-microvolt = <3300000>;
  116. };
  117. vgen4_reg: vgen4 {
  118. regulator-name = "gen_1v8";
  119. regulator-min-microvolt = <1800000>;
  120. regulator-max-microvolt = <1800000>;
  121. regulator-always-on;
  122. };
  123. vgen5_reg: vgen5 {
  124. regulator-name = "gen_vadj_1";
  125. regulator-min-microvolt = <1800000>;
  126. regulator-max-microvolt = <3300000>;
  127. regulator-always-on;
  128. };
  129. vgen6_reg: vgen6 {
  130. regulator-name = "gen_2v5";
  131. regulator-min-microvolt = <2500000>;
  132. regulator-max-microvolt = <2500000>;
  133. regulator-always-on;
  134. };
  135. coin_reg: coin {
  136. regulator-min-microvolt = <2500000>;
  137. regulator-max-microvolt = <3000000>;
  138. regulator-always-on;
  139. };
  140. };
  141. };
  142. temperature-sensor@49 {
  143. compatible = "ti,tmp102";
  144. reg = <0x49>;
  145. interrupt-parent = <&gpio6>;
  146. interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
  147. #thermal-sensor-cells = <1>;
  148. };
  149. temperature-sensor@4a {
  150. compatible = "ti,tmp102";
  151. reg = <0x4a>;
  152. pinctrl-names = "default";
  153. pinctrl-0 = <&pinctrl_tempsense>;
  154. interrupt-parent = <&gpio6>;
  155. interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
  156. #thermal-sensor-cells = <1>;
  157. };
  158. eeprom@51 {
  159. compatible = "atmel,24c64";
  160. pagesize = <32>;
  161. read-only; /* Manufacturing EEPROM programmed at factory */
  162. reg = <0x51>;
  163. };
  164. eeprom@52 {
  165. compatible = "atmel,24c64";
  166. pagesize = <32>;
  167. reg = <0x52>;
  168. };
  169. };
  170. /* Reroute power feeding the CPU to come from the external PMIC */
  171. &reg_arm
  172. {
  173. vin-supply = <&sw1a_reg>;
  174. };
  175. &reg_soc
  176. {
  177. vin-supply = <&sw1c_reg>;
  178. };
  179. &snvs_poweroff {
  180. status = "okay";
  181. };
  182. &iomuxc {
  183. pinctrl-names = "default";
  184. pinctrl-0 = <&pinctrl_hog>;
  185. pinctrl_gpmi_nand: gpmi-nandgrp {
  186. fsl,pins = <
  187. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1
  188. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1
  189. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1
  190. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000
  191. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1
  192. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1
  193. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1
  194. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1
  195. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1
  196. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1
  197. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1
  198. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1
  199. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1
  200. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1
  201. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1
  202. >;
  203. };
  204. pinctrl_hog: hoggrp {
  205. fsl,pins = < /* Enable ARM Debugger */
  206. MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
  207. MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0
  208. MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0
  209. MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
  210. MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0
  211. MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0
  212. MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0
  213. MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0
  214. MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0
  215. MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0
  216. MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0
  217. MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0
  218. MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0
  219. MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0
  220. MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0
  221. MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0
  222. MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0
  223. MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0
  224. MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0
  225. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
  226. >;
  227. };
  228. pinctrl_i2c3: i2c3grp {
  229. fsl,pins = <
  230. MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
  231. MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
  232. >;
  233. };
  234. pinctrl_tempsense: tempsensegrp {
  235. fsl,pins = <
  236. MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
  237. >;
  238. };
  239. pinctrl_uart1: uart1grp {
  240. fsl,pins = <
  241. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  242. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  243. >;
  244. };
  245. pinctrl_uart2: uart2grp {
  246. fsl,pins = <
  247. MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
  248. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  249. MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
  250. MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
  251. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  252. >;
  253. };
  254. pinctrl_usdhc1: usdhc1grp {
  255. fsl,pins = <
  256. MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
  257. MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
  258. MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
  259. MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
  260. MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
  261. MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
  262. >;
  263. };
  264. pinctrl_usdhc3: usdhc3grp {
  265. fsl,pins = <
  266. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049
  267. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049
  268. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049
  269. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049
  270. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049
  271. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049
  272. MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */
  273. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */
  274. >;
  275. };
  276. };
  277. &snvs_poweroff {
  278. status = "okay";
  279. };
  280. &uart1 {
  281. pinctrl-names = "default";
  282. pinctrl-0 = <&pinctrl_uart1>;
  283. status = "okay";
  284. };
  285. &uart2 {
  286. pinctrl-names = "default";
  287. pinctrl-0 = <&pinctrl_uart2>;
  288. uart-has-rtscts;
  289. status = "okay";
  290. bluetooth {
  291. compatible = "ti,wl1837-st";
  292. enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
  293. };
  294. };
  295. &usdhc1 {
  296. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  297. pinctrl-0 = <&pinctrl_usdhc1>;
  298. non-removable;
  299. keep-power-in-suspend;
  300. wakeup-source;
  301. vmmc-supply = <&sw2_reg>;
  302. status = "okay";
  303. };
  304. &usdhc3 {
  305. pinctrl-names = "default";
  306. pinctrl-0 = <&pinctrl_usdhc3>;
  307. non-removable;
  308. cap-power-off-card;
  309. keep-power-in-suspend;
  310. wakeup-source;
  311. vmmc-supply = <&reg_wl18xx_vmmc>;
  312. #address-cells = <1>;
  313. #size-cells = <0>;
  314. status = "okay";
  315. wlcore: wlcore@2 {
  316. compatible = "ti,wl1837";
  317. reg = <2>;
  318. interrupt-parent = <&gpio7>;
  319. interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
  320. tcxo-clock-frequency = <26000000>;
  321. };
  322. };