imx51-eukrea-mbimxsd51-baseboard.dts 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2013 Eukréa Electromatique <[email protected]>
  4. */
  5. /dts-v1/;
  6. #include "imx51-eukrea-cpuimx51.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. / {
  9. model = "Eukrea CPUIMX51";
  10. compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
  11. clocks {
  12. clk24M: can_clock {
  13. compatible = "fixed-clock";
  14. #clock-cells = <0>;
  15. clock-frequency = <24000000>;
  16. };
  17. };
  18. gpio_keys {
  19. compatible = "gpio-keys";
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&pinctrl_gpiokeys_1>;
  22. button-1 {
  23. label = "BP1";
  24. gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
  25. linux,code = <256>;
  26. wakeup-source;
  27. linux,input-type = <1>;
  28. };
  29. };
  30. leds {
  31. compatible = "gpio-leds";
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_gpioled>;
  34. led1 {
  35. label = "led1";
  36. gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
  37. linux,default-trigger = "heartbeat";
  38. };
  39. };
  40. regulators {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. reg_can: regulator@0 {
  45. compatible = "regulator-fixed";
  46. reg = <0>;
  47. regulator-name = "CAN_RST";
  48. regulator-min-microvolt = <3300000>;
  49. regulator-max-microvolt = <3300000>;
  50. gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
  51. startup-delay-us = <20000>;
  52. enable-active-high;
  53. };
  54. };
  55. sound {
  56. compatible = "eukrea,asoc-tlv320";
  57. eukrea,model = "imx51-eukrea-tlv320aic23";
  58. ssi-controller = <&ssi2>;
  59. fsl,mux-int-port = <2>;
  60. fsl,mux-ext-port = <3>;
  61. };
  62. usbphy1: usbphy1 {
  63. compatible = "usb-nop-xceiv";
  64. clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
  65. clock-names = "main_clk";
  66. clock-frequency = <19200000>;
  67. #phy-cells = <0>;
  68. };
  69. };
  70. &audmux {
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&pinctrl_audmux>;
  73. status = "okay";
  74. };
  75. &esdhc1 {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
  78. cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
  79. status = "okay";
  80. };
  81. &ecspi1 {
  82. pinctrl-names = "default";
  83. pinctrl-0 = <&pinctrl_ecspi1>;
  84. cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
  85. status = "okay";
  86. can0: can@0 {
  87. pinctrl-names = "default";
  88. pinctrl-0 = <&pinctrl_can>;
  89. compatible = "microchip,mcp2515";
  90. reg = <0>;
  91. clocks = <&clk24M>;
  92. spi-max-frequency = <10000000>;
  93. interrupt-parent = <&gpio1>;
  94. interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
  95. vdd-supply = <&reg_can>;
  96. };
  97. };
  98. &i2c1 {
  99. tlv320aic23: codec@1a {
  100. compatible = "ti,tlv320aic23";
  101. reg = <0x1a>;
  102. };
  103. };
  104. &iomuxc {
  105. imx51-eukrea {
  106. pinctrl_audmux: audmuxgrp {
  107. fsl,pins = <
  108. MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
  109. MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
  110. MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
  111. MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
  112. >;
  113. };
  114. pinctrl_can: cangrp {
  115. fsl,pins = <
  116. MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
  117. MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
  118. >;
  119. };
  120. pinctrl_ecspi1: ecspi1grp {
  121. fsl,pins = <
  122. MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
  123. MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
  124. MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
  125. MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
  126. >;
  127. };
  128. pinctrl_esdhc1: esdhc1grp {
  129. fsl,pins = <
  130. MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
  131. MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
  132. MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
  133. MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
  134. MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
  135. MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
  136. >;
  137. };
  138. pinctrl_uart1: uart1grp {
  139. fsl,pins = <
  140. MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
  141. MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
  142. >;
  143. };
  144. pinctrl_uart3: uart3grp {
  145. fsl,pins = <
  146. MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
  147. MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
  148. >;
  149. };
  150. pinctrl_uart3_rtscts: uart3rtsctsgrp {
  151. fsl,pins = <
  152. MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
  153. MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
  154. >;
  155. };
  156. pinctrl_backlight_1: backlightgrp-1 {
  157. fsl,pins = <
  158. MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
  159. >;
  160. };
  161. pinctrl_esdhc1_cd: esdhc1_cd {
  162. fsl,pins = <
  163. MX51_PAD_GPIO1_0__GPIO1_0 0xd5
  164. >;
  165. };
  166. pinctrl_gpiokeys_1: gpiokeysgrp-1 {
  167. fsl,pins = <
  168. MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
  169. >;
  170. };
  171. pinctrl_gpioled: gpioledgrp-1 {
  172. fsl,pins = <
  173. MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
  174. >;
  175. };
  176. pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
  177. fsl,pins = <
  178. MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
  179. >;
  180. };
  181. pinctrl_usbh1: usbh1grp {
  182. fsl,pins = <
  183. MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
  184. MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
  185. MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
  186. MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
  187. MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
  188. MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
  189. MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
  190. MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
  191. MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
  192. MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
  193. MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
  194. MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
  195. >;
  196. };
  197. pinctrl_usbh1_vbus: usbh1-vbusgrp {
  198. fsl,pins = <
  199. MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
  200. >;
  201. };
  202. };
  203. };
  204. &ssi2 {
  205. codec-handle = <&tlv320aic23>;
  206. status = "okay";
  207. };
  208. &uart1 {
  209. pinctrl-names = "default";
  210. pinctrl-0 = <&pinctrl_uart1>;
  211. uart-has-rtscts;
  212. status = "okay";
  213. };
  214. &uart3 {
  215. pinctrl-names = "default";
  216. pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
  217. uart-has-rtscts;
  218. status = "okay";
  219. };
  220. &usbh1 {
  221. pinctrl-names = "default";
  222. pinctrl-0 = <&pinctrl_usbh1>;
  223. fsl,usbphy = <&usbphy1>;
  224. dr_mode = "host";
  225. phy_type = "ulpi";
  226. status = "okay";
  227. };
  228. &usbotg {
  229. dr_mode = "otg";
  230. phy_type = "utmi_wide";
  231. status = "okay";
  232. };
  233. &usbphy0 {
  234. pinctrl-names = "default";
  235. pinctrl-0 = <&pinctrl_usbh1_vbus>;
  236. reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
  237. };