imx35.dtsi 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright 2012 Steffen Trumtrar, Pengutronix
  4. //
  5. // based on imx27.dtsi
  6. #include "imx35-pinfunc.h"
  7. / {
  8. #address-cells = <1>;
  9. #size-cells = <1>;
  10. /*
  11. * The decompressor and also some bootloaders rely on a
  12. * pre-existing /chosen node to be available to insert the
  13. * command line and merge other ATAGS info.
  14. */
  15. chosen {};
  16. aliases {
  17. ethernet0 = &fec;
  18. gpio0 = &gpio1;
  19. gpio1 = &gpio2;
  20. gpio2 = &gpio3;
  21. i2c0 = &i2c1;
  22. i2c1 = &i2c2;
  23. i2c2 = &i2c3;
  24. mmc0 = &esdhc1;
  25. mmc1 = &esdhc2;
  26. mmc2 = &esdhc3;
  27. serial0 = &uart1;
  28. serial1 = &uart2;
  29. serial2 = &uart3;
  30. spi0 = &spi1;
  31. spi1 = &spi2;
  32. };
  33. cpus {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. cpu@0 {
  37. compatible = "arm,arm1136jf-s";
  38. device_type = "cpu";
  39. reg = <0>;
  40. };
  41. };
  42. avic: avic-interrupt-controller@68000000 {
  43. compatible = "fsl,imx35-avic", "fsl,avic";
  44. interrupt-controller;
  45. #interrupt-cells = <1>;
  46. reg = <0x68000000 0x10000000>;
  47. };
  48. soc {
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. compatible = "simple-bus";
  52. interrupt-parent = <&avic>;
  53. ranges;
  54. L2: cache-controller@30000000 {
  55. compatible = "arm,l210-cache";
  56. reg = <0x30000000 0x1000>;
  57. cache-unified;
  58. cache-level = <2>;
  59. };
  60. aips1: bus@43f00000 {
  61. compatible = "fsl,aips", "simple-bus";
  62. #address-cells = <1>;
  63. #size-cells = <1>;
  64. reg = <0x43f00000 0x100000>;
  65. ranges;
  66. i2c1: i2c@43f80000 {
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
  70. reg = <0x43f80000 0x4000>;
  71. clocks = <&clks 51>;
  72. clock-names = "ipg_per";
  73. interrupts = <10>;
  74. status = "disabled";
  75. };
  76. i2c3: i2c@43f84000 {
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
  80. reg = <0x43f84000 0x4000>;
  81. clocks = <&clks 53>;
  82. clock-names = "ipg_per";
  83. interrupts = <3>;
  84. status = "disabled";
  85. };
  86. uart1: serial@43f90000 {
  87. compatible = "fsl,imx35-uart", "fsl,imx21-uart";
  88. reg = <0x43f90000 0x4000>;
  89. clocks = <&clks 9>, <&clks 70>;
  90. clock-names = "ipg", "per";
  91. interrupts = <45>;
  92. status = "disabled";
  93. };
  94. uart2: serial@43f94000 {
  95. compatible = "fsl,imx35-uart", "fsl,imx21-uart";
  96. reg = <0x43f94000 0x4000>;
  97. clocks = <&clks 9>, <&clks 71>;
  98. clock-names = "ipg", "per";
  99. interrupts = <32>;
  100. status = "disabled";
  101. };
  102. i2c2: i2c@43f98000 {
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
  106. reg = <0x43f98000 0x4000>;
  107. clocks = <&clks 52>;
  108. clock-names = "ipg_per";
  109. interrupts = <4>;
  110. status = "disabled";
  111. };
  112. ssi1: ssi@43fa0000 {
  113. #sound-dai-cells = <0>;
  114. compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
  115. reg = <0x43fa0000 0x4000>;
  116. interrupts = <11>;
  117. clocks = <&clks 68>;
  118. dmas = <&sdma 28 0 0>,
  119. <&sdma 29 0 0>;
  120. dma-names = "rx", "tx";
  121. fsl,fifo-depth = <15>;
  122. status = "disabled";
  123. };
  124. spi1: spi@43fa4000 {
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. compatible = "fsl,imx35-cspi";
  128. reg = <0x43fa4000 0x4000>;
  129. clocks = <&clks 35 &clks 35>;
  130. clock-names = "ipg", "per";
  131. interrupts = <14>;
  132. status = "disabled";
  133. };
  134. kpp: kpp@43fa8000 {
  135. compatible = "fsl,imx35-kpp", "fsl,imx21-kpp";
  136. reg = <0x43fa8000 0x4000>;
  137. interrupts = <24>;
  138. clocks = <&clks 56>;
  139. status = "disabled";
  140. };
  141. iomuxc: iomuxc@43fac000 {
  142. compatible = "fsl,imx35-iomuxc";
  143. reg = <0x43fac000 0x4000>;
  144. };
  145. };
  146. spba: spba-bus@50000000 {
  147. compatible = "fsl,spba-bus", "simple-bus";
  148. #address-cells = <1>;
  149. #size-cells = <1>;
  150. reg = <0x50000000 0x100000>;
  151. ranges;
  152. uart3: serial@5000c000 {
  153. compatible = "fsl,imx35-uart", "fsl,imx21-uart";
  154. reg = <0x5000c000 0x4000>;
  155. clocks = <&clks 9>, <&clks 72>;
  156. clock-names = "ipg", "per";
  157. interrupts = <18>;
  158. status = "disabled";
  159. };
  160. spi2: spi@50010000 {
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. compatible = "fsl,imx35-cspi";
  164. reg = <0x50010000 0x4000>;
  165. interrupts = <13>;
  166. clocks = <&clks 36 &clks 36>;
  167. clock-names = "ipg", "per";
  168. status = "disabled";
  169. };
  170. fec: ethernet@50038000 {
  171. compatible = "fsl,imx35-fec", "fsl,imx27-fec";
  172. reg = <0x50038000 0x4000>;
  173. clocks = <&clks 46>, <&clks 8>;
  174. clock-names = "ipg", "ahb";
  175. interrupts = <57>;
  176. status = "disabled";
  177. };
  178. };
  179. aips2: bus@53f00000 {
  180. compatible = "fsl,aips", "simple-bus";
  181. #address-cells = <1>;
  182. #size-cells = <1>;
  183. reg = <0x53f00000 0x100000>;
  184. ranges;
  185. clks: ccm@53f80000 {
  186. compatible = "fsl,imx35-ccm";
  187. reg = <0x53f80000 0x4000>;
  188. interrupts = <31>;
  189. #clock-cells = <1>;
  190. };
  191. gpt: timer@53f90000 {
  192. compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
  193. reg = <0x53f90000 0x4000>;
  194. interrupts = <29>;
  195. clocks = <&clks 9>, <&clks 50>;
  196. clock-names = "ipg", "per";
  197. };
  198. gpio3: gpio@53fa4000 {
  199. compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
  200. reg = <0x53fa4000 0x4000>;
  201. interrupts = <56>;
  202. gpio-controller;
  203. #gpio-cells = <2>;
  204. interrupt-controller;
  205. #interrupt-cells = <2>;
  206. };
  207. esdhc1: mmc@53fb4000 {
  208. compatible = "fsl,imx35-esdhc";
  209. reg = <0x53fb4000 0x4000>;
  210. interrupts = <7>;
  211. clocks = <&clks 9>, <&clks 8>, <&clks 43>;
  212. clock-names = "ipg", "ahb", "per";
  213. status = "disabled";
  214. };
  215. esdhc2: mmc@53fb8000 {
  216. compatible = "fsl,imx35-esdhc";
  217. reg = <0x53fb8000 0x4000>;
  218. interrupts = <8>;
  219. clocks = <&clks 9>, <&clks 8>, <&clks 44>;
  220. clock-names = "ipg", "ahb", "per";
  221. status = "disabled";
  222. };
  223. esdhc3: mmc@53fbc000 {
  224. compatible = "fsl,imx35-esdhc";
  225. reg = <0x53fbc000 0x4000>;
  226. interrupts = <9>;
  227. clocks = <&clks 9>, <&clks 8>, <&clks 45>;
  228. clock-names = "ipg", "ahb", "per";
  229. status = "disabled";
  230. };
  231. audmux: audmux@53fc4000 {
  232. compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
  233. reg = <0x53fc4000 0x4000>;
  234. status = "disabled";
  235. };
  236. gpio1: gpio@53fcc000 {
  237. compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
  238. reg = <0x53fcc000 0x4000>;
  239. interrupts = <52>;
  240. gpio-controller;
  241. #gpio-cells = <2>;
  242. interrupt-controller;
  243. #interrupt-cells = <2>;
  244. };
  245. gpio2: gpio@53fd0000 {
  246. compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
  247. reg = <0x53fd0000 0x4000>;
  248. interrupts = <51>;
  249. gpio-controller;
  250. #gpio-cells = <2>;
  251. interrupt-controller;
  252. #interrupt-cells = <2>;
  253. };
  254. sdma: dma-controller@53fd4000 {
  255. compatible = "fsl,imx35-sdma";
  256. reg = <0x53fd4000 0x4000>;
  257. clocks = <&clks 9>, <&clks 65>;
  258. clock-names = "ipg", "ahb";
  259. #dma-cells = <3>;
  260. interrupts = <34>;
  261. fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
  262. };
  263. wdog: watchdog@53fdc000 {
  264. compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
  265. reg = <0x53fdc000 0x4000>;
  266. clocks = <&clks 74>;
  267. clock-names = "";
  268. interrupts = <55>;
  269. };
  270. can1: can@53fe4000 {
  271. compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan";
  272. reg = <0x53fe4000 0x1000>;
  273. clocks = <&clks 33>, <&clks 33>;
  274. clock-names = "ipg", "per";
  275. interrupts = <43>;
  276. status = "disabled";
  277. };
  278. can2: can@53fe8000 {
  279. compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan";
  280. reg = <0x53fe8000 0x1000>;
  281. clocks = <&clks 34>, <&clks 34>;
  282. clock-names = "ipg", "per";
  283. interrupts = <44>;
  284. status = "disabled";
  285. };
  286. efuse@53ff0000 {
  287. compatible = "fsl,imx35-iim";
  288. reg = <0x53ff0000 0x4000>;
  289. interrupts = <19>;
  290. clocks = <&clks 80>;
  291. };
  292. usbotg: usb@53ff4000 {
  293. compatible = "fsl,imx35-usb", "fsl,imx27-usb";
  294. reg = <0x53ff4000 0x0200>;
  295. interrupts = <37>;
  296. clocks = <&clks 9>, <&clks 73>, <&clks 28>;
  297. clock-names = "ipg", "ahb", "per";
  298. fsl,usbmisc = <&usbmisc 0>;
  299. fsl,usbphy = <&usbphy0>;
  300. status = "disabled";
  301. };
  302. usbhost1: usb@53ff4400 {
  303. compatible = "fsl,imx35-usb", "fsl,imx27-usb";
  304. reg = <0x53ff4400 0x0200>;
  305. interrupts = <35>;
  306. clocks = <&clks 9>, <&clks 73>, <&clks 28>;
  307. clock-names = "ipg", "ahb", "per";
  308. fsl,usbmisc = <&usbmisc 1>;
  309. fsl,usbphy = <&usbphy1>;
  310. dr_mode = "host";
  311. status = "disabled";
  312. };
  313. usbmisc: usbmisc@53ff4600 {
  314. #index-cells = <1>;
  315. compatible = "fsl,imx35-usbmisc";
  316. reg = <0x53ff4600 0x00f>;
  317. };
  318. };
  319. emi@80000000 { /* External Memory Interface */
  320. compatible = "fsl,emi", "simple-bus";
  321. #address-cells = <1>;
  322. #size-cells = <1>;
  323. reg = <0x80000000 0x40000000>;
  324. ranges;
  325. nfc: nand@bb000000 {
  326. #address-cells = <1>;
  327. #size-cells = <1>;
  328. compatible = "fsl,imx35-nand", "fsl,imx25-nand";
  329. reg = <0xbb000000 0x2000>;
  330. clocks = <&clks 29>;
  331. clock-names = "";
  332. interrupts = <33>;
  333. status = "disabled";
  334. };
  335. weim: weim@b8002000 {
  336. #address-cells = <2>;
  337. #size-cells = <1>;
  338. clocks = <&clks 0>;
  339. compatible = "fsl,imx35-weim", "fsl,imx27-weim";
  340. reg = <0xb8002000 0x1000>;
  341. ranges = <
  342. 0 0 0xa0000000 0x8000000
  343. 1 0 0xa8000000 0x8000000
  344. 2 0 0xb0000000 0x2000000
  345. 3 0 0xb2000000 0x2000000
  346. 4 0 0xb4000000 0x2000000
  347. 5 0 0xb6000000 0x2000000
  348. >;
  349. status = "disabled";
  350. };
  351. };
  352. };
  353. usbphy {
  354. compatible = "simple-bus";
  355. #address-cells = <1>;
  356. #size-cells = <0>;
  357. usbphy0: usb-phy@0 {
  358. reg = <0>;
  359. compatible = "usb-nop-xceiv";
  360. #phy-cells = <0>;
  361. };
  362. usbphy1: usb-phy@1 {
  363. reg = <1>;
  364. compatible = "usb-nop-xceiv";
  365. #phy-cells = <0>;
  366. };
  367. };
  368. };