imx35-eukrea-mbimxsd35-baseboard.dts 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2013 Eukréa Electromatique <[email protected]>
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/input/input.h>
  8. #include "imx35-eukrea-cpuimx35.dtsi"
  9. / {
  10. model = "Eukrea CPUIMX35";
  11. compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";
  12. gpio-keys {
  13. compatible = "gpio-keys";
  14. pinctrl-names = "default";
  15. pinctrl-0 = <&pinctrl_bp1>;
  16. button {
  17. label = "BP1";
  18. gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
  19. linux,code = <BTN_MISC>;
  20. wakeup-source;
  21. linux,input-type = <1>;
  22. };
  23. };
  24. leds {
  25. compatible = "gpio-leds";
  26. pinctrl-names = "default";
  27. pinctrl-0 = <&pinctrl_led1>;
  28. led1 {
  29. label = "led1";
  30. gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
  31. linux,default-trigger = "heartbeat";
  32. };
  33. };
  34. sound {
  35. compatible = "eukrea,asoc-tlv320";
  36. eukrea,model = "imx35-eukrea-tlv320aic23";
  37. ssi-controller = <&ssi1>;
  38. fsl,mux-int-port = <1>;
  39. fsl,mux-ext-port = <4>;
  40. };
  41. };
  42. &audmux {
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&pinctrl_audmux>;
  45. status = "okay";
  46. };
  47. &esdhc1 {
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&pinctrl_esdhc1>;
  50. cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
  51. status = "okay";
  52. };
  53. &i2c1 {
  54. tlv320aic23: codec@1a {
  55. compatible = "ti,tlv320aic23";
  56. reg = <0x1a>;
  57. };
  58. };
  59. &iomuxc {
  60. imx35-eukrea {
  61. pinctrl_audmux: audmuxgrp {
  62. fsl,pins = <
  63. MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000
  64. MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000
  65. MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000
  66. MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000
  67. >;
  68. };
  69. pinctrl_bp1: bp1grp {
  70. fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>;
  71. };
  72. pinctrl_esdhc1: esdhc1grp {
  73. fsl,pins = <
  74. MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
  75. MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
  76. MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
  77. MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
  78. MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
  79. MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
  80. MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */
  81. >;
  82. };
  83. pinctrl_led1: led1grp {
  84. fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>;
  85. };
  86. pinctrl_reg_lcd_3v3: reg-lcd-3v3 {
  87. fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
  88. };
  89. pinctrl_uart1: uart1grp {
  90. fsl,pins = <
  91. MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
  92. MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5
  93. MX35_PAD_CTS1__UART1_CTS 0x1c5
  94. MX35_PAD_RTS1__UART1_RTS 0x1c5
  95. >;
  96. };
  97. pinctrl_uart2: uart2grp {
  98. fsl,pins = <
  99. MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5
  100. MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5
  101. MX35_PAD_RTS2__UART2_RTS 0x1c5
  102. MX35_PAD_CTS2__UART2_CTS 0x1c5
  103. >;
  104. };
  105. };
  106. };
  107. &ssi1 {
  108. codec-handle = <&tlv320aic23>;
  109. status = "okay";
  110. };
  111. &uart1 {
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&pinctrl_uart1>;
  114. uart-has-rtscts;
  115. status = "okay";
  116. };
  117. &uart2 {
  118. pinctrl-names = "default";
  119. pinctrl-0 = <&pinctrl_uart2>;
  120. uart-has-rtscts;
  121. status = "okay";
  122. };
  123. &usbhost1 {
  124. phy_type = "serial";
  125. dr_mode = "host";
  126. status = "okay";
  127. };
  128. &usbotg {
  129. phy_type = "utmi";
  130. dr_mode = "otg";
  131. external-vbus-divider;
  132. status = "okay";
  133. };