imx25.dtsi 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright 2012 Sascha Hauer, Pengutronix <[email protected]>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include "imx25-pinfunc.h"
  6. / {
  7. #address-cells = <1>;
  8. #size-cells = <1>;
  9. /*
  10. * The decompressor and also some bootloaders rely on a
  11. * pre-existing /chosen node to be available to insert the
  12. * command line and merge other ATAGS info.
  13. */
  14. chosen {};
  15. aliases {
  16. ethernet0 = &fec;
  17. gpio0 = &gpio1;
  18. gpio1 = &gpio2;
  19. gpio2 = &gpio3;
  20. gpio3 = &gpio4;
  21. i2c0 = &i2c1;
  22. i2c1 = &i2c2;
  23. i2c2 = &i2c3;
  24. mmc0 = &esdhc1;
  25. mmc1 = &esdhc2;
  26. pwm0 = &pwm1;
  27. pwm1 = &pwm2;
  28. pwm2 = &pwm3;
  29. pwm3 = &pwm4;
  30. serial0 = &uart1;
  31. serial1 = &uart2;
  32. serial2 = &uart3;
  33. serial3 = &uart4;
  34. serial4 = &uart5;
  35. spi0 = &spi1;
  36. spi1 = &spi2;
  37. spi2 = &spi3;
  38. usb0 = &usbotg;
  39. usb1 = &usbhost1;
  40. };
  41. cpus {
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. cpu@0 {
  45. compatible = "arm,arm926ej-s";
  46. device_type = "cpu";
  47. reg = <0>;
  48. };
  49. };
  50. asic: asic-interrupt-controller@68000000 {
  51. compatible = "fsl,imx25-asic", "fsl,avic";
  52. interrupt-controller;
  53. #interrupt-cells = <1>;
  54. reg = <0x68000000 0x8000000>;
  55. };
  56. clocks {
  57. osc {
  58. compatible = "fixed-clock";
  59. #clock-cells = <0>;
  60. clock-frequency = <24000000>;
  61. };
  62. };
  63. soc: soc {
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. compatible = "simple-bus";
  67. interrupt-parent = <&asic>;
  68. ranges;
  69. bus@43f00000 { /* AIPS1 */
  70. compatible = "fsl,aips-bus", "simple-bus";
  71. #address-cells = <1>;
  72. #size-cells = <1>;
  73. reg = <0x43f00000 0x100000>;
  74. ranges;
  75. aips1: bridge@43f00000 {
  76. compatible = "fsl,imx25-aips";
  77. reg = <0x43f00000 0x4000>;
  78. };
  79. i2c1: i2c@43f80000 {
  80. #address-cells = <1>;
  81. #size-cells = <0>;
  82. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  83. reg = <0x43f80000 0x4000>;
  84. clocks = <&clks 48>;
  85. clock-names = "";
  86. interrupts = <3>;
  87. status = "disabled";
  88. };
  89. i2c3: i2c@43f84000 {
  90. #address-cells = <1>;
  91. #size-cells = <0>;
  92. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  93. reg = <0x43f84000 0x4000>;
  94. clocks = <&clks 48>;
  95. clock-names = "";
  96. interrupts = <10>;
  97. status = "disabled";
  98. };
  99. can1: can@43f88000 {
  100. compatible = "fsl,imx25-flexcan";
  101. reg = <0x43f88000 0x4000>;
  102. interrupts = <43>;
  103. clocks = <&clks 75>, <&clks 75>;
  104. clock-names = "ipg", "per";
  105. status = "disabled";
  106. };
  107. can2: can@43f8c000 {
  108. compatible = "fsl,imx25-flexcan";
  109. reg = <0x43f8c000 0x4000>;
  110. interrupts = <44>;
  111. clocks = <&clks 76>, <&clks 76>;
  112. clock-names = "ipg", "per";
  113. status = "disabled";
  114. };
  115. uart1: serial@43f90000 {
  116. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  117. reg = <0x43f90000 0x4000>;
  118. interrupts = <45>;
  119. clocks = <&clks 120>, <&clks 57>;
  120. clock-names = "ipg", "per";
  121. status = "disabled";
  122. };
  123. uart2: serial@43f94000 {
  124. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  125. reg = <0x43f94000 0x4000>;
  126. interrupts = <32>;
  127. clocks = <&clks 121>, <&clks 57>;
  128. clock-names = "ipg", "per";
  129. status = "disabled";
  130. };
  131. i2c2: i2c@43f98000 {
  132. #address-cells = <1>;
  133. #size-cells = <0>;
  134. compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
  135. reg = <0x43f98000 0x4000>;
  136. clocks = <&clks 48>;
  137. clock-names = "";
  138. interrupts = <4>;
  139. status = "disabled";
  140. };
  141. owire@43f9c000 {
  142. #address-cells = <1>;
  143. #size-cells = <0>;
  144. reg = <0x43f9c000 0x4000>;
  145. clocks = <&clks 51>;
  146. clock-names = "";
  147. interrupts = <2>;
  148. status = "disabled";
  149. };
  150. spi1: spi@43fa4000 {
  151. #address-cells = <1>;
  152. #size-cells = <0>;
  153. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  154. reg = <0x43fa4000 0x4000>;
  155. clocks = <&clks 78>, <&clks 78>;
  156. clock-names = "ipg", "per";
  157. interrupts = <14>;
  158. status = "disabled";
  159. };
  160. kpp: kpp@43fa8000 {
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
  164. reg = <0x43fa8000 0x4000>;
  165. clocks = <&clks 102>;
  166. clock-names = "";
  167. interrupts = <24>;
  168. status = "disabled";
  169. };
  170. iomuxc: iomuxc@43fac000 {
  171. compatible = "fsl,imx25-iomuxc";
  172. reg = <0x43fac000 0x4000>;
  173. };
  174. audmux: audmux@43fb0000 {
  175. compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
  176. reg = <0x43fb0000 0x4000>;
  177. status = "disabled";
  178. };
  179. };
  180. spba-bus@50000000 {
  181. compatible = "fsl,spba-bus", "simple-bus";
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. reg = <0x50000000 0x40000>;
  185. ranges;
  186. spi3: spi@50004000 {
  187. #address-cells = <1>;
  188. #size-cells = <0>;
  189. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  190. reg = <0x50004000 0x4000>;
  191. interrupts = <0>;
  192. clocks = <&clks 80>, <&clks 80>;
  193. clock-names = "ipg", "per";
  194. status = "disabled";
  195. };
  196. uart4: serial@50008000 {
  197. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  198. reg = <0x50008000 0x4000>;
  199. interrupts = <5>;
  200. clocks = <&clks 123>, <&clks 57>;
  201. clock-names = "ipg", "per";
  202. status = "disabled";
  203. };
  204. uart3: serial@5000c000 {
  205. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  206. reg = <0x5000c000 0x4000>;
  207. interrupts = <18>;
  208. clocks = <&clks 122>, <&clks 57>;
  209. clock-names = "ipg", "per";
  210. status = "disabled";
  211. };
  212. spi2: spi@50010000 {
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
  216. reg = <0x50010000 0x4000>;
  217. clocks = <&clks 79>, <&clks 79>;
  218. clock-names = "ipg", "per";
  219. interrupts = <13>;
  220. status = "disabled";
  221. };
  222. ssi2: ssi@50014000 {
  223. #sound-dai-cells = <0>;
  224. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  225. reg = <0x50014000 0x4000>;
  226. interrupts = <11>;
  227. clocks = <&clks 118>;
  228. clock-names = "ipg";
  229. dmas = <&sdma 24 1 0>,
  230. <&sdma 25 1 0>;
  231. dma-names = "rx", "tx";
  232. fsl,fifo-depth = <15>;
  233. status = "disabled";
  234. };
  235. esai@50018000 {
  236. reg = <0x50018000 0x4000>;
  237. interrupts = <7>;
  238. };
  239. uart5: serial@5002c000 {
  240. compatible = "fsl,imx25-uart", "fsl,imx21-uart";
  241. reg = <0x5002c000 0x4000>;
  242. interrupts = <40>;
  243. clocks = <&clks 124>, <&clks 57>;
  244. clock-names = "ipg", "per";
  245. status = "disabled";
  246. };
  247. tscadc: tscadc@50030000 {
  248. compatible = "fsl,imx25-tsadc";
  249. reg = <0x50030000 0xc>;
  250. interrupts = <46>;
  251. clocks = <&clks 119>;
  252. clock-names = "ipg";
  253. interrupt-controller;
  254. #interrupt-cells = <1>;
  255. #address-cells = <1>;
  256. #size-cells = <1>;
  257. status = "disabled";
  258. ranges;
  259. adc: adc@50030800 {
  260. compatible = "fsl,imx25-gcq";
  261. reg = <0x50030800 0x60>;
  262. interrupt-parent = <&tscadc>;
  263. interrupts = <1>;
  264. #address-cells = <1>;
  265. #size-cells = <0>;
  266. status = "disabled";
  267. };
  268. tsc: tcq@50030400 {
  269. compatible = "fsl,imx25-tcq";
  270. reg = <0x50030400 0x60>;
  271. interrupt-parent = <&tscadc>;
  272. interrupts = <0>;
  273. fsl,wires = <4>;
  274. status = "disabled";
  275. };
  276. };
  277. ssi1: ssi@50034000 {
  278. #sound-dai-cells = <0>;
  279. compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
  280. reg = <0x50034000 0x4000>;
  281. interrupts = <12>;
  282. clocks = <&clks 117>;
  283. clock-names = "ipg";
  284. dmas = <&sdma 28 1 0>,
  285. <&sdma 29 1 0>;
  286. dma-names = "rx", "tx";
  287. fsl,fifo-depth = <15>;
  288. status = "disabled";
  289. };
  290. fec: ethernet@50038000 {
  291. compatible = "fsl,imx25-fec";
  292. reg = <0x50038000 0x4000>;
  293. interrupts = <57>;
  294. clocks = <&clks 88>, <&clks 65>;
  295. clock-names = "ipg", "ahb";
  296. status = "disabled";
  297. };
  298. };
  299. bus@53f00000 { /* AIPS2 */
  300. compatible = "fsl,aips-bus", "simple-bus";
  301. #address-cells = <1>;
  302. #size-cells = <1>;
  303. reg = <0x53f00000 0x100000>;
  304. ranges;
  305. aips2: bridge@53f00000 {
  306. compatible = "fsl,imx25-aips";
  307. reg = <0x53f00000 0x4000>;
  308. };
  309. clks: ccm@53f80000 {
  310. compatible = "fsl,imx25-ccm";
  311. reg = <0x53f80000 0x4000>;
  312. interrupts = <31>;
  313. #clock-cells = <1>;
  314. };
  315. gpt4: timer@53f84000 {
  316. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  317. reg = <0x53f84000 0x4000>;
  318. clocks = <&clks 95>, <&clks 47>;
  319. clock-names = "ipg", "per";
  320. interrupts = <1>;
  321. };
  322. gpt3: timer@53f88000 {
  323. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  324. reg = <0x53f88000 0x4000>;
  325. clocks = <&clks 94>, <&clks 47>;
  326. clock-names = "ipg", "per";
  327. interrupts = <29>;
  328. };
  329. gpt2: timer@53f8c000 {
  330. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  331. reg = <0x53f8c000 0x4000>;
  332. clocks = <&clks 93>, <&clks 47>;
  333. clock-names = "ipg", "per";
  334. interrupts = <53>;
  335. };
  336. gpt1: timer@53f90000 {
  337. compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
  338. reg = <0x53f90000 0x4000>;
  339. clocks = <&clks 92>, <&clks 47>;
  340. clock-names = "ipg", "per";
  341. interrupts = <54>;
  342. };
  343. epit1: timer@53f94000 {
  344. compatible = "fsl,imx25-epit";
  345. reg = <0x53f94000 0x4000>;
  346. clocks = <&clks 83>, <&clks 43>;
  347. clock-names = "ipg", "per";
  348. interrupts = <28>;
  349. };
  350. epit2: timer@53f98000 {
  351. compatible = "fsl,imx25-epit";
  352. reg = <0x53f98000 0x4000>;
  353. clocks = <&clks 84>, <&clks 43>;
  354. clock-names = "ipg", "per";
  355. interrupts = <27>;
  356. };
  357. gpio4: gpio@53f9c000 {
  358. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  359. reg = <0x53f9c000 0x4000>;
  360. interrupts = <23>;
  361. gpio-controller;
  362. #gpio-cells = <2>;
  363. interrupt-controller;
  364. #interrupt-cells = <2>;
  365. };
  366. pwm2: pwm@53fa0000 {
  367. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  368. #pwm-cells = <3>;
  369. reg = <0x53fa0000 0x4000>;
  370. clocks = <&clks 106>, <&clks 52>;
  371. clock-names = "ipg", "per";
  372. interrupts = <36>;
  373. };
  374. gpio3: gpio@53fa4000 {
  375. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  376. reg = <0x53fa4000 0x4000>;
  377. interrupts = <16>;
  378. gpio-controller;
  379. #gpio-cells = <2>;
  380. interrupt-controller;
  381. #interrupt-cells = <2>;
  382. };
  383. pwm3: pwm@53fa8000 {
  384. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  385. #pwm-cells = <3>;
  386. reg = <0x53fa8000 0x4000>;
  387. clocks = <&clks 107>, <&clks 52>;
  388. clock-names = "ipg", "per";
  389. interrupts = <41>;
  390. };
  391. scc: crypto@53fac000 {
  392. compatible = "fsl,imx25-scc";
  393. reg = <0x53fac000 0x4000>;
  394. clocks = <&clks 111>;
  395. clock-names = "ipg";
  396. interrupts = <49>, <50>;
  397. interrupt-names = "scm", "smn";
  398. };
  399. rngb: rngb@53fb0000 {
  400. compatible = "fsl,imx25-rngb";
  401. reg = <0x53fb0000 0x4000>;
  402. clocks = <&clks 109>;
  403. interrupts = <22>;
  404. };
  405. esdhc1: mmc@53fb4000 {
  406. compatible = "fsl,imx25-esdhc";
  407. reg = <0x53fb4000 0x4000>;
  408. interrupts = <9>;
  409. clocks = <&clks 86>, <&clks 63>, <&clks 45>;
  410. clock-names = "ipg", "ahb", "per";
  411. status = "disabled";
  412. };
  413. esdhc2: mmc@53fb8000 {
  414. compatible = "fsl,imx25-esdhc";
  415. reg = <0x53fb8000 0x4000>;
  416. interrupts = <8>;
  417. clocks = <&clks 87>, <&clks 64>, <&clks 46>;
  418. clock-names = "ipg", "ahb", "per";
  419. status = "disabled";
  420. };
  421. lcdc: lcdc@53fbc000 {
  422. compatible = "fsl,imx25-fb", "fsl,imx21-fb";
  423. reg = <0x53fbc000 0x4000>;
  424. interrupts = <39>;
  425. clocks = <&clks 103>, <&clks 66>, <&clks 49>;
  426. clock-names = "ipg", "ahb", "per";
  427. status = "disabled";
  428. };
  429. slcdc@53fc0000 {
  430. reg = <0x53fc0000 0x4000>;
  431. interrupts = <38>;
  432. status = "disabled";
  433. };
  434. pwm4: pwm@53fc8000 {
  435. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  436. #pwm-cells = <3>;
  437. reg = <0x53fc8000 0x4000>;
  438. clocks = <&clks 108>, <&clks 52>;
  439. clock-names = "ipg", "per";
  440. interrupts = <42>;
  441. };
  442. gpio1: gpio@53fcc000 {
  443. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  444. reg = <0x53fcc000 0x4000>;
  445. interrupts = <52>;
  446. gpio-controller;
  447. #gpio-cells = <2>;
  448. interrupt-controller;
  449. #interrupt-cells = <2>;
  450. };
  451. gpio2: gpio@53fd0000 {
  452. compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
  453. reg = <0x53fd0000 0x4000>;
  454. interrupts = <51>;
  455. gpio-controller;
  456. #gpio-cells = <2>;
  457. interrupt-controller;
  458. #interrupt-cells = <2>;
  459. };
  460. sdma: dma-controller@53fd4000 {
  461. compatible = "fsl,imx25-sdma";
  462. reg = <0x53fd4000 0x4000>;
  463. clocks = <&clks 112>, <&clks 68>;
  464. clock-names = "ipg", "ahb";
  465. #dma-cells = <3>;
  466. interrupts = <34>;
  467. fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
  468. };
  469. watchdog@53fdc000 {
  470. compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
  471. reg = <0x53fdc000 0x4000>;
  472. clocks = <&clks 126>;
  473. clock-names = "";
  474. interrupts = <55>;
  475. };
  476. pwm1: pwm@53fe0000 {
  477. compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
  478. #pwm-cells = <3>;
  479. reg = <0x53fe0000 0x4000>;
  480. clocks = <&clks 105>, <&clks 52>;
  481. clock-names = "ipg", "per";
  482. interrupts = <26>;
  483. };
  484. iim: efuse@53ff0000 {
  485. compatible = "fsl,imx25-iim", "fsl,imx27-iim";
  486. reg = <0x53ff0000 0x4000>;
  487. interrupts = <19>;
  488. clocks = <&clks 99>;
  489. };
  490. usbotg: usb@53ff4000 {
  491. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  492. reg = <0x53ff4000 0x0200>;
  493. interrupts = <37>;
  494. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  495. clock-names = "ipg", "ahb", "per";
  496. fsl,usbmisc = <&usbmisc 0>;
  497. fsl,usbphy = <&usbphy0>;
  498. phy_type = "utmi";
  499. dr_mode = "otg";
  500. status = "disabled";
  501. };
  502. usbhost1: usb@53ff4400 {
  503. compatible = "fsl,imx25-usb", "fsl,imx27-usb";
  504. reg = <0x53ff4400 0x0200>;
  505. interrupts = <35>;
  506. clocks = <&clks 9>, <&clks 70>, <&clks 8>;
  507. clock-names = "ipg", "ahb", "per";
  508. fsl,usbmisc = <&usbmisc 1>;
  509. fsl,usbphy = <&usbphy1>;
  510. maximum-speed = "full-speed";
  511. phy_type = "serial";
  512. dr_mode = "host";
  513. status = "disabled";
  514. };
  515. usbmisc: usbmisc@53ff4600 {
  516. #index-cells = <1>;
  517. compatible = "fsl,imx25-usbmisc";
  518. reg = <0x53ff4600 0x00f>;
  519. };
  520. dryice@53ffc000 {
  521. compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
  522. reg = <0x53ffc000 0x4000>;
  523. clocks = <&clks 81>;
  524. clock-names = "ipg";
  525. interrupts = <25 56>;
  526. };
  527. };
  528. iram: sram@78000000 {
  529. compatible = "mmio-sram";
  530. reg = <0x78000000 0x20000>;
  531. };
  532. emi@80000000 {
  533. compatible = "fsl,emi-bus", "simple-bus";
  534. #address-cells = <1>;
  535. #size-cells = <1>;
  536. reg = <0x80000000 0x3b002000>;
  537. ranges;
  538. nfc: nand@bb000000 {
  539. #address-cells = <1>;
  540. #size-cells = <1>;
  541. compatible = "fsl,imx25-nand";
  542. reg = <0xbb000000 0x2000>;
  543. clocks = <&clks 50>;
  544. clock-names = "";
  545. interrupts = <33>;
  546. status = "disabled";
  547. };
  548. };
  549. };
  550. usbphy {
  551. compatible = "simple-bus";
  552. #address-cells = <1>;
  553. #size-cells = <0>;
  554. usbphy0: usb-phy@0 {
  555. reg = <0>;
  556. compatible = "usb-nop-xceiv";
  557. #phy-cells = <0>;
  558. };
  559. usbphy1: usb-phy@1 {
  560. reg = <1>;
  561. compatible = "usb-nop-xceiv";
  562. #phy-cells = <0>;
  563. };
  564. };
  565. };