imx23.dtsi 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. //
  3. // Copyright 2012 Freescale Semiconductor, Inc.
  4. #include "imx23-pinfunc.h"
  5. / {
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. interrupt-parent = <&icoll>;
  9. /*
  10. * The decompressor and also some bootloaders rely on a
  11. * pre-existing /chosen node to be available to insert the
  12. * command line and merge other ATAGS info.
  13. */
  14. chosen {};
  15. aliases {
  16. gpio0 = &gpio0;
  17. gpio1 = &gpio1;
  18. gpio2 = &gpio2;
  19. serial0 = &auart0;
  20. serial1 = &auart1;
  21. spi0 = &ssp0;
  22. spi1 = &ssp1;
  23. usbphy0 = &usbphy0;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. cpu@0 {
  29. compatible = "arm,arm926ej-s";
  30. device_type = "cpu";
  31. reg = <0>;
  32. };
  33. };
  34. apb@80000000 {
  35. compatible = "simple-bus";
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. reg = <0x80000000 0x80000>;
  39. ranges;
  40. apbh@80000000 {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. reg = <0x80000000 0x40000>;
  45. ranges;
  46. icoll: interrupt-controller@80000000 {
  47. compatible = "fsl,imx23-icoll", "fsl,icoll";
  48. interrupt-controller;
  49. #interrupt-cells = <1>;
  50. reg = <0x80000000 0x2000>;
  51. };
  52. dma_apbh: dma-apbh@80004000 {
  53. compatible = "fsl,imx23-dma-apbh";
  54. reg = <0x80004000 0x2000>;
  55. interrupts = <0 14 20 0
  56. 13 13 13 13>;
  57. interrupt-names = "empty", "ssp0", "ssp1", "empty",
  58. "gpmi0", "gpmi1", "gpmi2", "gpmi3";
  59. #dma-cells = <1>;
  60. dma-channels = <8>;
  61. clocks = <&clks 15>;
  62. };
  63. ecc@80008000 {
  64. reg = <0x80008000 0x2000>;
  65. status = "disabled";
  66. };
  67. nand-controller@8000c000 {
  68. compatible = "fsl,imx23-gpmi-nand";
  69. #address-cells = <1>;
  70. #size-cells = <1>;
  71. reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
  72. reg-names = "gpmi-nand", "bch";
  73. interrupts = <56>;
  74. interrupt-names = "bch";
  75. clocks = <&clks 34>;
  76. clock-names = "gpmi_io";
  77. dmas = <&dma_apbh 4>;
  78. dma-names = "rx-tx";
  79. status = "disabled";
  80. };
  81. ssp0: spi@80010000 {
  82. reg = <0x80010000 0x2000>;
  83. interrupts = <15>;
  84. clocks = <&clks 33>;
  85. dmas = <&dma_apbh 1>;
  86. dma-names = "rx-tx";
  87. status = "disabled";
  88. };
  89. etm@80014000 {
  90. reg = <0x80014000 0x2000>;
  91. status = "disabled";
  92. };
  93. pinctrl@80018000 {
  94. #address-cells = <1>;
  95. #size-cells = <0>;
  96. compatible = "fsl,imx23-pinctrl", "simple-bus";
  97. reg = <0x80018000 0x2000>;
  98. gpio0: gpio@0 {
  99. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  100. reg = <0>;
  101. interrupts = <16>;
  102. gpio-controller;
  103. #gpio-cells = <2>;
  104. interrupt-controller;
  105. #interrupt-cells = <2>;
  106. };
  107. gpio1: gpio@1 {
  108. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  109. reg = <1>;
  110. interrupts = <17>;
  111. gpio-controller;
  112. #gpio-cells = <2>;
  113. interrupt-controller;
  114. #interrupt-cells = <2>;
  115. };
  116. gpio2: gpio@2 {
  117. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  118. reg = <2>;
  119. interrupts = <18>;
  120. gpio-controller;
  121. #gpio-cells = <2>;
  122. interrupt-controller;
  123. #interrupt-cells = <2>;
  124. };
  125. duart_pins_a: duart@0 {
  126. reg = <0>;
  127. fsl,pinmux-ids = <
  128. MX23_PAD_PWM0__DUART_RX
  129. MX23_PAD_PWM1__DUART_TX
  130. >;
  131. fsl,drive-strength = <MXS_DRIVE_4mA>;
  132. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  133. fsl,pull-up = <MXS_PULL_DISABLE>;
  134. };
  135. auart0_pins_a: auart0@0 {
  136. reg = <0>;
  137. fsl,pinmux-ids = <
  138. MX23_PAD_AUART1_RX__AUART1_RX
  139. MX23_PAD_AUART1_TX__AUART1_TX
  140. MX23_PAD_AUART1_CTS__AUART1_CTS
  141. MX23_PAD_AUART1_RTS__AUART1_RTS
  142. >;
  143. fsl,drive-strength = <MXS_DRIVE_4mA>;
  144. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  145. fsl,pull-up = <MXS_PULL_DISABLE>;
  146. };
  147. auart0_2pins_a: auart0-2pins@0 {
  148. reg = <0>;
  149. fsl,pinmux-ids = <
  150. MX23_PAD_I2C_SCL__AUART1_TX
  151. MX23_PAD_I2C_SDA__AUART1_RX
  152. >;
  153. fsl,drive-strength = <MXS_DRIVE_4mA>;
  154. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  155. fsl,pull-up = <MXS_PULL_DISABLE>;
  156. };
  157. auart1_2pins_a: auart1-2pins@0 {
  158. reg = <0>;
  159. fsl,pinmux-ids = <
  160. MX23_PAD_GPMI_D14__AUART2_RX
  161. MX23_PAD_GPMI_D15__AUART2_TX
  162. >;
  163. fsl,drive-strength = <MXS_DRIVE_4mA>;
  164. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  165. fsl,pull-up = <MXS_PULL_DISABLE>;
  166. };
  167. gpmi_pins_a: gpmi-nand@0 {
  168. reg = <0>;
  169. fsl,pinmux-ids = <
  170. MX23_PAD_GPMI_D00__GPMI_D00
  171. MX23_PAD_GPMI_D01__GPMI_D01
  172. MX23_PAD_GPMI_D02__GPMI_D02
  173. MX23_PAD_GPMI_D03__GPMI_D03
  174. MX23_PAD_GPMI_D04__GPMI_D04
  175. MX23_PAD_GPMI_D05__GPMI_D05
  176. MX23_PAD_GPMI_D06__GPMI_D06
  177. MX23_PAD_GPMI_D07__GPMI_D07
  178. MX23_PAD_GPMI_CLE__GPMI_CLE
  179. MX23_PAD_GPMI_ALE__GPMI_ALE
  180. MX23_PAD_GPMI_RDY0__GPMI_RDY0
  181. MX23_PAD_GPMI_RDY1__GPMI_RDY1
  182. MX23_PAD_GPMI_WPN__GPMI_WPN
  183. MX23_PAD_GPMI_WRN__GPMI_WRN
  184. MX23_PAD_GPMI_RDN__GPMI_RDN
  185. MX23_PAD_GPMI_CE1N__GPMI_CE1N
  186. MX23_PAD_GPMI_CE0N__GPMI_CE0N
  187. >;
  188. fsl,drive-strength = <MXS_DRIVE_4mA>;
  189. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  190. fsl,pull-up = <MXS_PULL_DISABLE>;
  191. };
  192. gpmi_pins_fixup: gpmi-pins-fixup@0 {
  193. reg = <0>;
  194. fsl,pinmux-ids = <
  195. MX23_PAD_GPMI_WPN__GPMI_WPN
  196. MX23_PAD_GPMI_WRN__GPMI_WRN
  197. MX23_PAD_GPMI_RDN__GPMI_RDN
  198. >;
  199. fsl,drive-strength = <MXS_DRIVE_12mA>;
  200. };
  201. mmc0_4bit_pins_a: mmc0-4bit@0 {
  202. reg = <0>;
  203. fsl,pinmux-ids = <
  204. MX23_PAD_SSP1_DATA0__SSP1_DATA0
  205. MX23_PAD_SSP1_DATA1__SSP1_DATA1
  206. MX23_PAD_SSP1_DATA2__SSP1_DATA2
  207. MX23_PAD_SSP1_DATA3__SSP1_DATA3
  208. MX23_PAD_SSP1_CMD__SSP1_CMD
  209. MX23_PAD_SSP1_SCK__SSP1_SCK
  210. >;
  211. fsl,drive-strength = <MXS_DRIVE_8mA>;
  212. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  213. fsl,pull-up = <MXS_PULL_ENABLE>;
  214. };
  215. mmc0_8bit_pins_a: mmc0-8bit@0 {
  216. reg = <0>;
  217. fsl,pinmux-ids = <
  218. MX23_PAD_SSP1_DATA0__SSP1_DATA0
  219. MX23_PAD_SSP1_DATA1__SSP1_DATA1
  220. MX23_PAD_SSP1_DATA2__SSP1_DATA2
  221. MX23_PAD_SSP1_DATA3__SSP1_DATA3
  222. MX23_PAD_GPMI_D08__SSP1_DATA4
  223. MX23_PAD_GPMI_D09__SSP1_DATA5
  224. MX23_PAD_GPMI_D10__SSP1_DATA6
  225. MX23_PAD_GPMI_D11__SSP1_DATA7
  226. MX23_PAD_SSP1_CMD__SSP1_CMD
  227. MX23_PAD_SSP1_DETECT__SSP1_DETECT
  228. MX23_PAD_SSP1_SCK__SSP1_SCK
  229. >;
  230. fsl,drive-strength = <MXS_DRIVE_8mA>;
  231. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  232. fsl,pull-up = <MXS_PULL_ENABLE>;
  233. };
  234. mmc0_pins_fixup: mmc0-pins-fixup@0 {
  235. reg = <0>;
  236. fsl,pinmux-ids = <
  237. MX23_PAD_SSP1_DETECT__SSP1_DETECT
  238. MX23_PAD_SSP1_SCK__SSP1_SCK
  239. >;
  240. fsl,pull-up = <MXS_PULL_DISABLE>;
  241. };
  242. mmc0_sck_cfg: mmc0-sck-cfg@0 {
  243. reg = <0>;
  244. fsl,pinmux-ids = <
  245. MX23_PAD_SSP1_SCK__SSP1_SCK
  246. >;
  247. fsl,pull-up = <MXS_PULL_DISABLE>;
  248. };
  249. mmc1_4bit_pins_a: mmc1-4bit@0 {
  250. reg = <0>;
  251. fsl,pinmux-ids = <
  252. MX23_PAD_GPMI_D00__SSP2_DATA0
  253. MX23_PAD_GPMI_D01__SSP2_DATA1
  254. MX23_PAD_GPMI_D02__SSP2_DATA2
  255. MX23_PAD_GPMI_D03__SSP2_DATA3
  256. MX23_PAD_GPMI_RDY1__SSP2_CMD
  257. MX23_PAD_GPMI_WRN__SSP2_SCK
  258. >;
  259. fsl,drive-strength = <MXS_DRIVE_8mA>;
  260. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  261. fsl,pull-up = <MXS_PULL_ENABLE>;
  262. };
  263. mmc1_8bit_pins_a: mmc1-8bit@0 {
  264. reg = <0>;
  265. fsl,pinmux-ids = <
  266. MX23_PAD_GPMI_D00__SSP2_DATA0
  267. MX23_PAD_GPMI_D01__SSP2_DATA1
  268. MX23_PAD_GPMI_D02__SSP2_DATA2
  269. MX23_PAD_GPMI_D03__SSP2_DATA3
  270. MX23_PAD_GPMI_D04__SSP2_DATA4
  271. MX23_PAD_GPMI_D05__SSP2_DATA5
  272. MX23_PAD_GPMI_D06__SSP2_DATA6
  273. MX23_PAD_GPMI_D07__SSP2_DATA7
  274. MX23_PAD_GPMI_RDY1__SSP2_CMD
  275. MX23_PAD_GPMI_WRN__SSP2_SCK
  276. >;
  277. fsl,drive-strength = <MXS_DRIVE_8mA>;
  278. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  279. fsl,pull-up = <MXS_PULL_ENABLE>;
  280. };
  281. pwm2_pins_a: pwm2@0 {
  282. reg = <0>;
  283. fsl,pinmux-ids = <
  284. MX23_PAD_PWM2__PWM2
  285. >;
  286. fsl,drive-strength = <MXS_DRIVE_4mA>;
  287. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  288. fsl,pull-up = <MXS_PULL_DISABLE>;
  289. };
  290. lcdif_24bit_pins_a: lcdif-24bit@0 {
  291. reg = <0>;
  292. fsl,pinmux-ids = <
  293. MX23_PAD_LCD_D00__LCD_D00
  294. MX23_PAD_LCD_D01__LCD_D01
  295. MX23_PAD_LCD_D02__LCD_D02
  296. MX23_PAD_LCD_D03__LCD_D03
  297. MX23_PAD_LCD_D04__LCD_D04
  298. MX23_PAD_LCD_D05__LCD_D05
  299. MX23_PAD_LCD_D06__LCD_D06
  300. MX23_PAD_LCD_D07__LCD_D07
  301. MX23_PAD_LCD_D08__LCD_D08
  302. MX23_PAD_LCD_D09__LCD_D09
  303. MX23_PAD_LCD_D10__LCD_D10
  304. MX23_PAD_LCD_D11__LCD_D11
  305. MX23_PAD_LCD_D12__LCD_D12
  306. MX23_PAD_LCD_D13__LCD_D13
  307. MX23_PAD_LCD_D14__LCD_D14
  308. MX23_PAD_LCD_D15__LCD_D15
  309. MX23_PAD_LCD_D16__LCD_D16
  310. MX23_PAD_LCD_D17__LCD_D17
  311. MX23_PAD_GPMI_D08__LCD_D18
  312. MX23_PAD_GPMI_D09__LCD_D19
  313. MX23_PAD_GPMI_D10__LCD_D20
  314. MX23_PAD_GPMI_D11__LCD_D21
  315. MX23_PAD_GPMI_D12__LCD_D22
  316. MX23_PAD_GPMI_D13__LCD_D23
  317. MX23_PAD_LCD_DOTCK__LCD_DOTCK
  318. MX23_PAD_LCD_ENABLE__LCD_ENABLE
  319. MX23_PAD_LCD_HSYNC__LCD_HSYNC
  320. MX23_PAD_LCD_VSYNC__LCD_VSYNC
  321. >;
  322. fsl,drive-strength = <MXS_DRIVE_4mA>;
  323. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  324. fsl,pull-up = <MXS_PULL_DISABLE>;
  325. };
  326. spi2_pins_a: spi2@0 {
  327. reg = <0>;
  328. fsl,pinmux-ids = <
  329. MX23_PAD_GPMI_WRN__SSP2_SCK
  330. MX23_PAD_GPMI_RDY1__SSP2_CMD
  331. MX23_PAD_GPMI_D00__SSP2_DATA0
  332. MX23_PAD_GPMI_D03__SSP2_DATA3
  333. >;
  334. fsl,drive-strength = <MXS_DRIVE_8mA>;
  335. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  336. fsl,pull-up = <MXS_PULL_ENABLE>;
  337. };
  338. i2c_pins_a: i2c@0 {
  339. reg = <0>;
  340. fsl,pinmux-ids = <
  341. MX23_PAD_I2C_SCL__I2C_SCL
  342. MX23_PAD_I2C_SDA__I2C_SDA
  343. >;
  344. fsl,drive-strength = <MXS_DRIVE_8mA>;
  345. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  346. fsl,pull-up = <MXS_PULL_ENABLE>;
  347. };
  348. i2c_pins_b: i2c@1 {
  349. reg = <1>;
  350. fsl,pinmux-ids = <
  351. MX23_PAD_LCD_ENABLE__I2C_SCL
  352. MX23_PAD_LCD_HSYNC__I2C_SDA
  353. >;
  354. fsl,drive-strength = <MXS_DRIVE_8mA>;
  355. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  356. fsl,pull-up = <MXS_PULL_ENABLE>;
  357. };
  358. i2c_pins_c: i2c@2 {
  359. reg = <2>;
  360. fsl,pinmux-ids = <
  361. MX23_PAD_SSP1_DATA1__I2C_SCL
  362. MX23_PAD_SSP1_DATA2__I2C_SDA
  363. >;
  364. fsl,drive-strength = <MXS_DRIVE_8mA>;
  365. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  366. fsl,pull-up = <MXS_PULL_ENABLE>;
  367. };
  368. };
  369. digctl@8001c000 {
  370. compatible = "fsl,imx23-digctl";
  371. reg = <0x8001c000 2000>;
  372. status = "disabled";
  373. };
  374. emi@80020000 {
  375. reg = <0x80020000 0x2000>;
  376. status = "disabled";
  377. };
  378. dma_apbx: dma-apbx@80024000 {
  379. compatible = "fsl,imx23-dma-apbx";
  380. reg = <0x80024000 0x2000>;
  381. interrupts = <7 5 9 26
  382. 19 0 25 23
  383. 60 58 9 0
  384. 0 0 0 0>;
  385. interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
  386. "saif0", "empty", "auart0-rx", "auart0-tx",
  387. "auart1-rx", "auart1-tx", "saif1", "empty",
  388. "empty", "empty", "empty", "empty";
  389. #dma-cells = <1>;
  390. dma-channels = <16>;
  391. clocks = <&clks 16>;
  392. };
  393. dcp: crypto@80028000 {
  394. compatible = "fsl,imx23-dcp";
  395. reg = <0x80028000 0x2000>;
  396. interrupts = <53 54>;
  397. status = "okay";
  398. };
  399. pxp@8002a000 {
  400. reg = <0x8002a000 0x2000>;
  401. status = "disabled";
  402. };
  403. efuse@8002c000 {
  404. compatible = "fsl,imx23-ocotp", "fsl,ocotp";
  405. #address-cells = <1>;
  406. #size-cells = <1>;
  407. reg = <0x8002c000 0x2000>;
  408. clocks = <&clks 15>;
  409. };
  410. axi-ahb@8002e000 {
  411. reg = <0x8002e000 0x2000>;
  412. status = "disabled";
  413. };
  414. lcdif@80030000 {
  415. compatible = "fsl,imx23-lcdif";
  416. reg = <0x80030000 2000>;
  417. interrupts = <46 45>;
  418. clocks = <&clks 38>;
  419. status = "disabled";
  420. };
  421. ssp1: spi@80034000 {
  422. reg = <0x80034000 0x2000>;
  423. interrupts = <2>;
  424. clocks = <&clks 33>;
  425. dmas = <&dma_apbh 2>;
  426. dma-names = "rx-tx";
  427. status = "disabled";
  428. };
  429. tvenc@80038000 {
  430. reg = <0x80038000 0x2000>;
  431. status = "disabled";
  432. };
  433. };
  434. apbx@80040000 {
  435. compatible = "simple-bus";
  436. #address-cells = <1>;
  437. #size-cells = <1>;
  438. reg = <0x80040000 0x40000>;
  439. ranges;
  440. clks: clkctrl@80040000 {
  441. compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
  442. reg = <0x80040000 0x2000>;
  443. #clock-cells = <1>;
  444. };
  445. saif0: saif@80042000 {
  446. reg = <0x80042000 0x2000>;
  447. dmas = <&dma_apbx 4>;
  448. dma-names = "rx-tx";
  449. status = "disabled";
  450. };
  451. power@80044000 {
  452. reg = <0x80044000 0x2000>;
  453. status = "disabled";
  454. };
  455. saif1: saif@80046000 {
  456. reg = <0x80046000 0x2000>;
  457. dmas = <&dma_apbx 10>;
  458. dma-names = "rx-tx";
  459. status = "disabled";
  460. };
  461. audio-out@80048000 {
  462. reg = <0x80048000 0x2000>;
  463. dmas = <&dma_apbx 1>;
  464. dma-names = "tx";
  465. status = "disabled";
  466. };
  467. audio-in@8004c000 {
  468. reg = <0x8004c000 0x2000>;
  469. dmas = <&dma_apbx 0>;
  470. dma-names = "rx";
  471. status = "disabled";
  472. };
  473. lradc: lradc@80050000 {
  474. compatible = "fsl,imx23-lradc";
  475. reg = <0x80050000 0x2000>;
  476. interrupts = <36 37 38 39 40 41 42 43 44>;
  477. status = "disabled";
  478. clocks = <&clks 26>;
  479. #io-channel-cells = <1>;
  480. };
  481. spdif@80054000 {
  482. reg = <0x80054000 2000>;
  483. dmas = <&dma_apbx 2>;
  484. dma-names = "tx";
  485. status = "disabled";
  486. };
  487. i2c: i2c@80058000 {
  488. #address-cells = <1>;
  489. #size-cells = <0>;
  490. compatible = "fsl,imx23-i2c";
  491. reg = <0x80058000 0x2000>;
  492. interrupts = <27>;
  493. clock-frequency = <100000>;
  494. dmas = <&dma_apbx 3>;
  495. dma-names = "rx-tx";
  496. status = "disabled";
  497. };
  498. rtc@8005c000 {
  499. compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
  500. reg = <0x8005c000 0x2000>;
  501. interrupts = <22>;
  502. };
  503. pwm: pwm@80064000 {
  504. compatible = "fsl,imx23-pwm";
  505. reg = <0x80064000 0x2000>;
  506. clocks = <&clks 30>;
  507. #pwm-cells = <2>;
  508. fsl,pwm-number = <5>;
  509. status = "disabled";
  510. };
  511. timrot@80068000 {
  512. compatible = "fsl,imx23-timrot", "fsl,timrot";
  513. reg = <0x80068000 0x2000>;
  514. interrupts = <28 29 30 31>;
  515. clocks = <&clks 28>;
  516. };
  517. auart0: serial@8006c000 {
  518. compatible = "fsl,imx23-auart";
  519. reg = <0x8006c000 0x2000>;
  520. interrupts = <24>;
  521. clocks = <&clks 32>;
  522. dmas = <&dma_apbx 6>, <&dma_apbx 7>;
  523. dma-names = "rx", "tx";
  524. status = "disabled";
  525. };
  526. auart1: serial@8006e000 {
  527. compatible = "fsl,imx23-auart";
  528. reg = <0x8006e000 0x2000>;
  529. interrupts = <59>;
  530. clocks = <&clks 32>;
  531. dmas = <&dma_apbx 8>, <&dma_apbx 9>;
  532. dma-names = "rx", "tx";
  533. status = "disabled";
  534. };
  535. duart: serial@80070000 {
  536. compatible = "arm,pl011", "arm,primecell";
  537. reg = <0x80070000 0x2000>;
  538. interrupts = <0>;
  539. clocks = <&clks 32>, <&clks 16>;
  540. clock-names = "uart", "apb_pclk";
  541. status = "disabled";
  542. };
  543. usbphy0: usbphy@8007c000 {
  544. compatible = "fsl,imx23-usbphy";
  545. reg = <0x8007c000 0x2000>;
  546. clocks = <&clks 41>;
  547. status = "disabled";
  548. };
  549. };
  550. };
  551. ahb@80080000 {
  552. compatible = "simple-bus";
  553. #address-cells = <1>;
  554. #size-cells = <1>;
  555. reg = <0x80080000 0x80000>;
  556. ranges;
  557. usb0: usb@80080000 {
  558. compatible = "fsl,imx23-usb", "fsl,imx27-usb";
  559. reg = <0x80080000 0x40000>;
  560. interrupts = <11>;
  561. fsl,usbphy = <&usbphy0>;
  562. clocks = <&clks 40>;
  563. status = "disabled";
  564. };
  565. };
  566. iio-hwmon {
  567. compatible = "iio-hwmon";
  568. io-channels = <&lradc 8>;
  569. };
  570. };