exynos5420-arndale-octa.dts 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Samsung's Exynos5420 based Arndale Octa board device tree source
  4. *
  5. * Copyright (c) 2013 Samsung Electronics Co., Ltd.
  6. * http://www.samsung.com
  7. */
  8. /dts-v1/;
  9. #include "exynos5420.dtsi"
  10. #include "exynos5420-cpus.dtsi"
  11. #include <dt-bindings/gpio/gpio.h>
  12. #include <dt-bindings/interrupt-controller/irq.h>
  13. #include <dt-bindings/input/input.h>
  14. #include <dt-bindings/clock/samsung,s2mps11.h>
  15. / {
  16. model = "Insignal Arndale Octa evaluation board based on Exynos5420";
  17. compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
  18. memory@20000000 {
  19. device_type = "memory";
  20. reg = <0x20000000 0x80000000>;
  21. };
  22. chosen {
  23. stdout-path = "serial3:115200n8";
  24. };
  25. firmware@2073000 {
  26. compatible = "samsung,secure-firmware";
  27. reg = <0x02073000 0x1000>;
  28. };
  29. fixed-rate-clocks {
  30. oscclk {
  31. compatible = "samsung,exynos5420-oscclk";
  32. clock-frequency = <24000000>;
  33. };
  34. };
  35. gpio-keys {
  36. compatible = "gpio-keys";
  37. key-wakeup {
  38. label = "SW-TACT1";
  39. gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
  40. linux,code = <KEY_WAKEUP>;
  41. wakeup-source;
  42. };
  43. };
  44. };
  45. &adc {
  46. vdd-supply = <&ldo4_reg>;
  47. status = "okay";
  48. };
  49. &cci {
  50. status = "disabled";
  51. };
  52. &cpu0 {
  53. cpu-supply = <&buck2_reg>;
  54. };
  55. &cpu4 {
  56. cpu-supply = <&buck6_reg>;
  57. };
  58. &cpu0_thermal {
  59. trips {
  60. cpu0_alert0: cpu-alert-0 {
  61. temperature = <60000>; /* millicelsius */
  62. hysteresis = <5000>; /* millicelsius */
  63. type = "passive";
  64. };
  65. cpu0_alert1: cpu-alert-1 {
  66. temperature = <80000>; /* millicelsius */
  67. hysteresis = <10000>; /* millicelsius */
  68. type = "passive";
  69. };
  70. cpu0_alert2: cpu-alert-2 {
  71. temperature = <110000>; /* millicelsius */
  72. hysteresis = <10000>; /* millicelsius */
  73. type = "passive";
  74. };
  75. cpu0_crit0: cpu-crit-0 {
  76. temperature = <120000>; /* millicelsius */
  77. hysteresis = <0>; /* millicelsius */
  78. type = "critical";
  79. };
  80. };
  81. cooling-maps {
  82. /*
  83. * Reduce the CPU speed by 2 steps, down to: 1600 MHz
  84. * and 1100 MHz.
  85. */
  86. map0 {
  87. trip = <&cpu0_alert0>;
  88. cooling-device = <&cpu0 0 2>,
  89. <&cpu1 0 2>,
  90. <&cpu2 0 2>,
  91. <&cpu3 0 2>,
  92. <&cpu4 0 2>,
  93. <&cpu5 0 2>,
  94. <&cpu6 0 2>,
  95. <&cpu7 0 2>;
  96. };
  97. /*
  98. * Reduce the CPU speed down to 1200 MHz big (6 steps)
  99. * and 800 MHz LITTLE (5 steps).
  100. */
  101. map1 {
  102. trip = <&cpu0_alert1>;
  103. cooling-device = <&cpu0 3 6>,
  104. <&cpu1 3 6>,
  105. <&cpu2 3 6>,
  106. <&cpu3 3 6>,
  107. <&cpu4 3 5>,
  108. <&cpu5 3 5>,
  109. <&cpu6 3 5>,
  110. <&cpu7 3 5>;
  111. };
  112. /*
  113. * Reduce the CPU speed as much as possible, down to 700 MHz
  114. * big (11 steps) and 600 MHz LITTLE (7 steps).
  115. */
  116. map2 {
  117. trip = <&cpu0_alert2>;
  118. cooling-device = <&cpu0 6 11>,
  119. <&cpu1 6 11>,
  120. <&cpu2 6 11>,
  121. <&cpu3 6 11>,
  122. <&cpu4 5 7>,
  123. <&cpu5 5 7>,
  124. <&cpu6 5 7>,
  125. <&cpu7 5 7>;
  126. };
  127. };
  128. };
  129. &cpu1_thermal {
  130. trips {
  131. cpu1_alert0: cpu-alert-0 {
  132. temperature = <60000>; /* millicelsius */
  133. hysteresis = <5000>; /* millicelsius */
  134. type = "passive";
  135. };
  136. cpu1_alert1: cpu-alert-1 {
  137. temperature = <80000>; /* millicelsius */
  138. hysteresis = <10000>; /* millicelsius */
  139. type = "passive";
  140. };
  141. cpu1_alert2: cpu-alert-2 {
  142. temperature = <110000>; /* millicelsius */
  143. hysteresis = <10000>; /* millicelsius */
  144. type = "passive";
  145. };
  146. cpu1_crit0: cpu-crit-0 {
  147. temperature = <120000>; /* millicelsius */
  148. hysteresis = <0>; /* millicelsius */
  149. type = "critical";
  150. };
  151. };
  152. cooling-maps {
  153. map0 {
  154. trip = <&cpu1_alert0>;
  155. cooling-device = <&cpu0 0 2>,
  156. <&cpu1 0 2>,
  157. <&cpu2 0 2>,
  158. <&cpu3 0 2>,
  159. <&cpu4 0 2>,
  160. <&cpu5 0 2>,
  161. <&cpu6 0 2>,
  162. <&cpu7 0 2>;
  163. };
  164. map1 {
  165. trip = <&cpu1_alert1>;
  166. cooling-device = <&cpu0 3 6>,
  167. <&cpu1 3 6>,
  168. <&cpu2 3 6>,
  169. <&cpu3 3 6>,
  170. <&cpu4 3 5>,
  171. <&cpu5 3 5>,
  172. <&cpu6 3 5>,
  173. <&cpu7 3 5>;
  174. };
  175. map2 {
  176. trip = <&cpu1_alert2>;
  177. cooling-device = <&cpu0 6 11>,
  178. <&cpu1 6 11>,
  179. <&cpu2 6 11>,
  180. <&cpu3 6 11>,
  181. <&cpu4 5 7>,
  182. <&cpu5 5 7>,
  183. <&cpu6 5 7>,
  184. <&cpu7 5 7>;
  185. };
  186. };
  187. };
  188. &cpu2_thermal {
  189. trips {
  190. cpu2_alert0: cpu-alert-0 {
  191. temperature = <60000>; /* millicelsius */
  192. hysteresis = <5000>; /* millicelsius */
  193. type = "passive";
  194. };
  195. cpu2_alert1: cpu-alert-1 {
  196. temperature = <80000>; /* millicelsius */
  197. hysteresis = <10000>; /* millicelsius */
  198. type = "passive";
  199. };
  200. cpu2_alert2: cpu-alert-2 {
  201. temperature = <110000>; /* millicelsius */
  202. hysteresis = <10000>; /* millicelsius */
  203. type = "passive";
  204. };
  205. cpu2_crit0: cpu-crit-0 {
  206. temperature = <120000>; /* millicelsius */
  207. hysteresis = <0>; /* millicelsius */
  208. type = "critical";
  209. };
  210. };
  211. cooling-maps {
  212. map0 {
  213. trip = <&cpu2_alert0>;
  214. cooling-device = <&cpu0 0 2>,
  215. <&cpu1 0 2>,
  216. <&cpu2 0 2>,
  217. <&cpu3 0 2>,
  218. <&cpu4 0 2>,
  219. <&cpu5 0 2>,
  220. <&cpu6 0 2>,
  221. <&cpu7 0 2>;
  222. };
  223. map1 {
  224. trip = <&cpu2_alert1>;
  225. cooling-device = <&cpu0 3 6>,
  226. <&cpu1 3 6>,
  227. <&cpu2 3 6>,
  228. <&cpu3 3 6>,
  229. <&cpu4 3 5>,
  230. <&cpu5 3 5>,
  231. <&cpu6 3 5>,
  232. <&cpu7 3 5>;
  233. };
  234. map2 {
  235. trip = <&cpu2_alert2>;
  236. cooling-device = <&cpu0 6 11>,
  237. <&cpu1 6 11>,
  238. <&cpu2 6 11>,
  239. <&cpu3 6 11>,
  240. <&cpu4 6 7>,
  241. <&cpu5 6 7>,
  242. <&cpu6 6 7>,
  243. <&cpu7 6 7>;
  244. };
  245. };
  246. };
  247. &cpu3_thermal {
  248. trips {
  249. cpu3_alert0: cpu-alert-0 {
  250. temperature = <60000>; /* millicelsius */
  251. hysteresis = <5000>; /* millicelsius */
  252. type = "passive";
  253. };
  254. cpu3_alert1: cpu-alert-1 {
  255. temperature = <80000>; /* millicelsius */
  256. hysteresis = <10000>; /* millicelsius */
  257. type = "passive";
  258. };
  259. cpu3_alert2: cpu-alert-2 {
  260. temperature = <110000>; /* millicelsius */
  261. hysteresis = <10000>; /* millicelsius */
  262. type = "passive";
  263. };
  264. cpu3_crit0: cpu-crit-0 {
  265. temperature = <120000>; /* millicelsius */
  266. hysteresis = <0>; /* millicelsius */
  267. type = "critical";
  268. };
  269. };
  270. cooling-maps {
  271. map0 {
  272. trip = <&cpu3_alert0>;
  273. cooling-device = <&cpu0 0 2>,
  274. <&cpu1 0 2>,
  275. <&cpu2 0 2>,
  276. <&cpu3 0 2>,
  277. <&cpu4 0 2>,
  278. <&cpu5 0 2>,
  279. <&cpu6 0 2>,
  280. <&cpu7 0 2>;
  281. };
  282. map1 {
  283. trip = <&cpu3_alert1>;
  284. cooling-device = <&cpu0 3 6>,
  285. <&cpu1 3 6>,
  286. <&cpu2 3 6>,
  287. <&cpu3 3 6>,
  288. <&cpu4 3 5>,
  289. <&cpu5 3 5>,
  290. <&cpu6 3 5>,
  291. <&cpu7 3 5>;
  292. };
  293. map2 {
  294. trip = <&cpu3_alert2>;
  295. cooling-device = <&cpu0 6 11>,
  296. <&cpu1 6 11>,
  297. <&cpu2 6 11>,
  298. <&cpu3 6 11>,
  299. <&cpu4 5 7>,
  300. <&cpu5 5 7>,
  301. <&cpu6 5 7>,
  302. <&cpu7 5 7>;
  303. };
  304. };
  305. };
  306. &hdmi {
  307. hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
  308. vdd_osc-supply = <&ldo7_reg>;
  309. vdd_pll-supply = <&ldo6_reg>;
  310. vdd-supply = <&ldo6_reg>;
  311. ddc = <&i2c_2>;
  312. status = "okay";
  313. };
  314. &hsi2c_4 {
  315. status = "okay";
  316. pmic@66 {
  317. compatible = "samsung,s2mps11-pmic";
  318. reg = <0x66>;
  319. interrupt-parent = <&gpx3>;
  320. interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
  321. pinctrl-names = "default";
  322. pinctrl-0 = <&s2mps11_irq>;
  323. wakeup-source;
  324. s2mps11_osc: clocks {
  325. compatible = "samsung,s2mps11-clk";
  326. #clock-cells = <1>;
  327. clock-output-names = "s2mps11_ap",
  328. "s2mps11_cp", "s2mps11_bt";
  329. };
  330. regulators {
  331. ldo1_reg: LDO1 {
  332. regulator-name = "PVDD_ALIVE_1V0";
  333. regulator-min-microvolt = <1000000>;
  334. regulator-max-microvolt = <1000000>;
  335. regulator-always-on;
  336. };
  337. ldo2_reg: LDO2 {
  338. regulator-name = "PVDD_APIO_1V8";
  339. regulator-min-microvolt = <1800000>;
  340. regulator-max-microvolt = <1800000>;
  341. regulator-always-on;
  342. };
  343. ldo3_reg: LDO3 {
  344. regulator-name = "PVDD_APIO_MMCON_1V8";
  345. regulator-min-microvolt = <1800000>;
  346. regulator-max-microvolt = <1800000>;
  347. /*
  348. * Must be always on, even though there is
  349. * a consumer (mmc_0). Otherwise the board
  350. * does not reboot with vendor U-Boot
  351. * (Linaro for Arndale Octa, v2012.07).
  352. */
  353. regulator-always-on;
  354. regulator-state-mem {
  355. regulator-off-in-suspend;
  356. };
  357. };
  358. ldo4_reg: LDO4 {
  359. regulator-name = "PVDD_ADC_1V8";
  360. regulator-min-microvolt = <1800000>;
  361. regulator-max-microvolt = <1800000>;
  362. };
  363. ldo5_reg: LDO5 {
  364. regulator-name = "PVDD_PLL_1V8";
  365. regulator-min-microvolt = <1800000>;
  366. regulator-max-microvolt = <1800000>;
  367. regulator-always-on;
  368. };
  369. ldo6_reg: LDO6 {
  370. regulator-name = "PVDD_ANAIP_1V0";
  371. regulator-min-microvolt = <1000000>;
  372. regulator-max-microvolt = <1000000>;
  373. };
  374. ldo7_reg: LDO7 {
  375. regulator-name = "PVDD_ANAIP_1V8";
  376. regulator-min-microvolt = <1800000>;
  377. regulator-max-microvolt = <1800000>;
  378. regulator-state-mem {
  379. regulator-off-in-suspend;
  380. };
  381. };
  382. ldo8_reg: LDO8 {
  383. regulator-name = "PVDD_ABB_1V8";
  384. regulator-min-microvolt = <1800000>;
  385. regulator-max-microvolt = <1800000>;
  386. regulator-always-on;
  387. };
  388. ldo9_reg: LDO9 {
  389. regulator-name = "PVDD_USB_3V3";
  390. regulator-min-microvolt = <3000000>;
  391. regulator-max-microvolt = <3000000>;
  392. regulator-always-on;
  393. };
  394. ldo10_reg: LDO10 {
  395. regulator-name = "PVDD_PRE_1V8";
  396. regulator-min-microvolt = <1800000>;
  397. regulator-max-microvolt = <1800000>;
  398. regulator-always-on;
  399. };
  400. ldo11_reg: LDO11 {
  401. regulator-name = "PVDD_USB_1V0";
  402. regulator-min-microvolt = <1000000>;
  403. regulator-max-microvolt = <1000000>;
  404. regulator-always-on;
  405. };
  406. ldo12_reg: LDO12 {
  407. regulator-name = "PVDD_HSIC_1V8";
  408. regulator-min-microvolt = <1800000>;
  409. regulator-max-microvolt = <1800000>;
  410. };
  411. ldo13_reg: LDO13 {
  412. regulator-name = "PVDD_APIO_MMCOFF_2V8";
  413. regulator-min-microvolt = <1800000>;
  414. regulator-max-microvolt = <2800000>;
  415. regulator-state-mem {
  416. regulator-off-in-suspend;
  417. };
  418. };
  419. ldo14_reg: LDO14 {
  420. /* Unused */
  421. regulator-name = "PVDD_LDO14";
  422. regulator-min-microvolt = <800000>;
  423. regulator-max-microvolt = <3950000>;
  424. };
  425. ldo15_reg: LDO15 {
  426. regulator-name = "PVDD_PERI_2V8";
  427. regulator-min-microvolt = <3300000>;
  428. regulator-max-microvolt = <3300000>;
  429. regulator-state-mem {
  430. regulator-on-in-suspend;
  431. };
  432. };
  433. ldo16_reg: LDO16 {
  434. regulator-name = "PVDD_PERI_3V3";
  435. regulator-min-microvolt = <2200000>;
  436. regulator-max-microvolt = <2200000>;
  437. regulator-state-mem {
  438. regulator-on-in-suspend;
  439. };
  440. };
  441. ldo17_reg: LDO17 {
  442. /* Unused */
  443. regulator-name = "PVDD_LDO17";
  444. regulator-min-microvolt = <800000>;
  445. regulator-max-microvolt = <3950000>;
  446. };
  447. ldo18_reg: LDO18 {
  448. regulator-name = "PVDD_EMMC_1V8";
  449. regulator-min-microvolt = <1800000>;
  450. regulator-max-microvolt = <1800000>;
  451. /*
  452. * Must stay in "off" mode during shutdown for
  453. * proper eMMC reset. The "off" mode is in
  454. * fact controlled by LDO18EN. The eMMC does
  455. * not have reset pin connected so the reset
  456. * will be triggered by falling edge of
  457. * LDO18EN.
  458. */
  459. regulator-state-mem {
  460. regulator-off-in-suspend;
  461. };
  462. };
  463. ldo19_reg: LDO19 {
  464. regulator-name = "PVDD_TFLASH_2V8";
  465. regulator-min-microvolt = <2800000>;
  466. regulator-max-microvolt = <2800000>;
  467. regulator-state-mem {
  468. regulator-off-in-suspend;
  469. };
  470. };
  471. ldo20_reg: LDO20 {
  472. regulator-name = "PVDD_BTWIFI_1V8";
  473. regulator-min-microvolt = <1800000>;
  474. regulator-max-microvolt = <1800000>;
  475. };
  476. ldo21_reg: LDO21 {
  477. regulator-name = "PVDD_CAM1IO_1V8";
  478. regulator-min-microvolt = <1800000>;
  479. regulator-max-microvolt = <1800000>;
  480. };
  481. ldo22_reg: LDO22 {
  482. /* Unused */
  483. regulator-name = "PVDD_LDO22";
  484. regulator-min-microvolt = <800000>;
  485. regulator-max-microvolt = <2375000>;
  486. };
  487. ldo23_reg: LDO23 {
  488. regulator-name = "PVDD_MIFS_1V1";
  489. regulator-min-microvolt = <800000>;
  490. regulator-max-microvolt = <1100000>;
  491. regulator-always-on;
  492. regulator-state-mem {
  493. regulator-on-in-suspend;
  494. };
  495. };
  496. ldo24_reg: LDO24 {
  497. regulator-name = "PVDD_CAM1_AVDD_2V8";
  498. regulator-min-microvolt = <2800000>;
  499. regulator-max-microvolt = <2800000>;
  500. regulator-state-mem {
  501. regulator-on-in-suspend;
  502. };
  503. };
  504. ldo25_reg: LDO25 {
  505. /* Unused */
  506. regulator-name = "PVDD_LDO25";
  507. regulator-min-microvolt = <800000>;
  508. regulator-max-microvolt = <3950000>;
  509. };
  510. ldo26_reg: LDO26 {
  511. regulator-name = "PVDD_CAM0_AF_2V8";
  512. regulator-min-microvolt = <3000000>;
  513. regulator-max-microvolt = <3000000>;
  514. };
  515. ldo27_reg: LDO27 {
  516. regulator-name = "PVDD_G3DS_1V0";
  517. regulator-min-microvolt = <800000>;
  518. regulator-max-microvolt = <1100000>;
  519. regulator-always-on;
  520. regulator-state-mem {
  521. regulator-on-in-suspend;
  522. };
  523. };
  524. ldo28_reg: LDO28 {
  525. regulator-name = "PVDD_TSP_3V3";
  526. regulator-min-microvolt = <3300000>;
  527. regulator-max-microvolt = <3300000>;
  528. };
  529. ldo29_reg: LDO29 {
  530. regulator-name = "PVDD_AUDIO_1V8";
  531. regulator-min-microvolt = <1800000>;
  532. regulator-max-microvolt = <1800000>;
  533. };
  534. ldo30_reg: LDO30 {
  535. /* Unused */
  536. regulator-name = "PVDD_LDO30";
  537. regulator-min-microvolt = <800000>;
  538. regulator-max-microvolt = <3950000>;
  539. };
  540. ldo31_reg: LDO31 {
  541. regulator-name = "PVDD_PERI_1V8";
  542. regulator-min-microvolt = <1800000>;
  543. regulator-max-microvolt = <1800000>;
  544. };
  545. ldo32_reg: LDO32 {
  546. regulator-name = "PVDD_LCD_1V8";
  547. regulator-min-microvolt = <1800000>;
  548. regulator-max-microvolt = <1800000>;
  549. };
  550. ldo33_reg: LDO33 {
  551. regulator-name = "PVDD_CAM0IO_1V8";
  552. regulator-min-microvolt = <1800000>;
  553. regulator-max-microvolt = <1800000>;
  554. };
  555. ldo34_reg: LDO34 {
  556. /* Unused */
  557. regulator-name = "PVDD_LDO34";
  558. regulator-min-microvolt = <800000>;
  559. regulator-max-microvolt = <3950000>;
  560. };
  561. ldo35_reg: LDO35 {
  562. regulator-name = "PVDD_CAM0_DVDD_1V2";
  563. regulator-min-microvolt = <1200000>;
  564. regulator-max-microvolt = <1200000>;
  565. };
  566. ldo36_reg: LDO36 {
  567. /* Unused */
  568. regulator-name = "PVDD_LDO36";
  569. regulator-min-microvolt = <800000>;
  570. regulator-max-microvolt = <3950000>;
  571. };
  572. ldo37_reg: LDO37 {
  573. /* Unused */
  574. regulator-name = "PVDD_LDO37";
  575. regulator-min-microvolt = <800000>;
  576. regulator-max-microvolt = <3950000>;
  577. };
  578. ldo38_reg: LDO38 {
  579. regulator-name = "PVDD_CAM0_AVDD_2V8";
  580. regulator-min-microvolt = <2800000>;
  581. regulator-max-microvolt = <2800000>;
  582. };
  583. buck1_reg: BUCK1 {
  584. regulator-name = "PVDD_MIF_1V1";
  585. regulator-min-microvolt = <800000>;
  586. regulator-max-microvolt = <1300000>;
  587. regulator-always-on;
  588. regulator-state-mem {
  589. regulator-off-in-suspend;
  590. };
  591. };
  592. buck2_reg: BUCK2 {
  593. regulator-name = "PVDD_ARM_1V0";
  594. regulator-min-microvolt = <800000>;
  595. regulator-max-microvolt = <1500000>;
  596. regulator-always-on;
  597. regulator-state-mem {
  598. regulator-off-in-suspend;
  599. };
  600. };
  601. buck3_reg: BUCK3 {
  602. regulator-name = "PVDD_INT_1V0";
  603. regulator-min-microvolt = <800000>;
  604. regulator-max-microvolt = <1400000>;
  605. regulator-always-on;
  606. regulator-state-mem {
  607. regulator-off-in-suspend;
  608. };
  609. };
  610. buck4_reg: BUCK4 {
  611. regulator-name = "PVDD_G3D_1V0";
  612. regulator-min-microvolt = <800000>;
  613. regulator-max-microvolt = <1400000>;
  614. regulator-always-on;
  615. regulator-state-mem {
  616. regulator-off-in-suspend;
  617. };
  618. };
  619. buck5_reg: BUCK5 {
  620. regulator-name = "PVDD_LPDDR3_1V2";
  621. regulator-min-microvolt = <800000>;
  622. regulator-max-microvolt = <1400000>;
  623. regulator-always-on;
  624. };
  625. buck6_reg: BUCK6 {
  626. regulator-name = "PVDD_KFC_1V0";
  627. regulator-min-microvolt = <800000>;
  628. regulator-max-microvolt = <1500000>;
  629. regulator-always-on;
  630. regulator-state-mem {
  631. regulator-off-in-suspend;
  632. };
  633. };
  634. buck7_reg: BUCK7 {
  635. regulator-name = "VIN_LLDO_1V4";
  636. regulator-min-microvolt = <1200000>;
  637. regulator-max-microvolt = <1500000>;
  638. regulator-always-on;
  639. };
  640. buck8_reg: BUCK8 {
  641. regulator-name = "VIN_MLDO_2V0";
  642. regulator-min-microvolt = <1800000>;
  643. regulator-max-microvolt = <2100000>;
  644. regulator-always-on;
  645. };
  646. buck9_reg: BUCK9 {
  647. regulator-name = "VIN_HLDO_3V5";
  648. regulator-min-microvolt = <3000000>;
  649. regulator-max-microvolt = <3500000>;
  650. regulator-always-on;
  651. };
  652. buck10_reg: BUCK10 {
  653. regulator-name = "PVDD_EMMCF_2V8";
  654. regulator-min-microvolt = <2800000>;
  655. regulator-max-microvolt = <2800000>;
  656. /*
  657. * Must stay in "off" mode during shutdown for
  658. * proper eMMC reset. The "off" mode is in
  659. * fact controlled by BUCK10EN. The eMMC does
  660. * not have reset pin connected so the reset
  661. * will be triggered by falling edge of
  662. * BUCK10EN.
  663. */
  664. regulator-state-mem {
  665. regulator-off-in-suspend;
  666. };
  667. };
  668. };
  669. };
  670. };
  671. &i2c_2 {
  672. status = "okay";
  673. };
  674. &mixer {
  675. status = "okay";
  676. };
  677. &mmc_0 {
  678. status = "okay";
  679. non-removable;
  680. card-detect-delay = <200>;
  681. samsung,dw-mshc-ciu-div = <3>;
  682. samsung,dw-mshc-sdr-timing = <0 4>;
  683. samsung,dw-mshc-ddr-timing = <0 2>;
  684. pinctrl-names = "default";
  685. pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
  686. vmmc-supply = <&ldo18_reg>;
  687. vqmmc-supply = <&ldo3_reg>;
  688. bus-width = <8>;
  689. cap-mmc-highspeed;
  690. mmc-hs200-1_8v;
  691. };
  692. &mmc_2 {
  693. status = "okay";
  694. card-detect-delay = <200>;
  695. samsung,dw-mshc-ciu-div = <3>;
  696. samsung,dw-mshc-sdr-timing = <0 4>;
  697. samsung,dw-mshc-ddr-timing = <0 2>;
  698. pinctrl-names = "default";
  699. pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
  700. vmmc-supply = <&ldo19_reg>;
  701. vqmmc-supply = <&ldo13_reg>;
  702. bus-width = <4>;
  703. cap-sd-highspeed;
  704. sd-uhs-sdr50;
  705. sd-uhs-sdr104;
  706. sd-uhs-ddr50;
  707. };
  708. &pinctrl_0 {
  709. s2mps11_irq: s2mps11-irq-pins {
  710. samsung,pins = "gpx3-2";
  711. samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
  712. samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
  713. samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  714. };
  715. };
  716. &rtc {
  717. status = "okay";
  718. clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
  719. clock-names = "rtc", "rtc_src";
  720. };
  721. &usbdrd_dwc3_1 {
  722. dr_mode = "host";
  723. };
  724. &usbdrd3_0 {
  725. vdd10-supply = <&ldo11_reg>;
  726. vdd33-supply = <&ldo9_reg>;
  727. };
  728. &usbdrd3_1 {
  729. vdd10-supply = <&ldo11_reg>;
  730. vdd33-supply = <&ldo9_reg>;
  731. };