bcm958625-meraki-alamo.dtsi 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Device Tree Bindings for Cisco Meraki MX65 series (Alamo).
  4. *
  5. * Copyright (C) 2020-2021 Matthew Hagan <[email protected]>
  6. */
  7. #include "bcm958625-meraki-mx6x-common.dtsi"
  8. / {
  9. keys {
  10. compatible = "gpio-keys-polled";
  11. autorepeat;
  12. poll-interval = <20>;
  13. button-reset {
  14. label = "reset";
  15. linux,code = <KEY_RESTART>;
  16. gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
  17. };
  18. };
  19. leds {
  20. compatible = "gpio-leds";
  21. led-0 {
  22. /* green:wan1-left */
  23. function = LED_FUNCTION_ACTIVITY;
  24. function-enumerator = <0>;
  25. color = <LED_COLOR_ID_GREEN>;
  26. gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
  27. };
  28. led-1 {
  29. /* green:wan1-right */
  30. function = LED_FUNCTION_ACTIVITY;
  31. function-enumerator = <1>;
  32. color = <LED_COLOR_ID_GREEN>;
  33. gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
  34. };
  35. led-2 {
  36. /* green:wan2-left */
  37. function = LED_FUNCTION_ACTIVITY;
  38. function-enumerator = <2>;
  39. color = <LED_COLOR_ID_GREEN>;
  40. gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
  41. };
  42. led-3 {
  43. /* green:wan2-right */
  44. function = LED_FUNCTION_ACTIVITY;
  45. function-enumerator = <3>;
  46. color = <LED_COLOR_ID_GREEN>;
  47. gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
  48. };
  49. led-4 {
  50. /* amber:power */
  51. function = LED_FUNCTION_FAULT;
  52. color = <LED_COLOR_ID_AMBER>;
  53. gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
  54. };
  55. led-5 {
  56. /* white:status */
  57. function = LED_FUNCTION_STATUS;
  58. color = <LED_COLOR_ID_WHITE>;
  59. gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
  60. };
  61. };
  62. };
  63. &axi {
  64. mdio-mux@3f1c0 {
  65. compatible = "mdio-mux-mmioreg", "mdio-mux";
  66. reg = <0x3f1c0 0x4>;
  67. mux-mask = <0x2000>;
  68. mdio-parent-bus = <&mdio_ext>;
  69. #address-cells = <1>;
  70. #size-cells = <0>;
  71. mdio@0 {
  72. reg = <0x0>;
  73. #address-cells = <1>;
  74. #size-cells = <0>;
  75. phy_port6: phy@0 {
  76. reg = <0>;
  77. };
  78. phy_port7: phy@1 {
  79. reg = <1>;
  80. };
  81. phy_port8: phy@2 {
  82. reg = <2>;
  83. };
  84. phy_port9: phy@3 {
  85. reg = <3>;
  86. };
  87. phy_port10: phy@4 {
  88. reg = <4>;
  89. };
  90. switch@10 {
  91. compatible = "qca,qca8337";
  92. reg = <0x10>;
  93. dsa,member = <1 0>;
  94. ports {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. port@0 {
  98. reg = <0>;
  99. ethernet = <&sgmii1>;
  100. phy-mode = "sgmii";
  101. qca,sgmii-enable-pll;
  102. qca,sgmii-txclk-falling-edge;
  103. fixed-link {
  104. speed = <1000>;
  105. full-duplex;
  106. };
  107. };
  108. port@1 {
  109. reg = <1>;
  110. label = "lan8";
  111. phy-handle = <&phy_port6>;
  112. };
  113. port@2 {
  114. reg = <2>;
  115. label = "lan9";
  116. phy-handle = <&phy_port7>;
  117. };
  118. port@3 {
  119. reg = <3>;
  120. label = "lan10";
  121. phy-handle = <&phy_port8>;
  122. };
  123. port@4 {
  124. reg = <4>;
  125. label = "lan11";
  126. phy-handle = <&phy_port9>;
  127. };
  128. port@5 {
  129. reg = <5>;
  130. label = "lan12";
  131. phy-handle = <&phy_port10>;
  132. };
  133. };
  134. };
  135. };
  136. mdio-mii@2000 {
  137. reg = <0x2000>;
  138. #address-cells = <1>;
  139. #size-cells = <0>;
  140. phy_port1: phy@0 {
  141. reg = <0>;
  142. };
  143. phy_port2: phy@1 {
  144. reg = <1>;
  145. };
  146. phy_port3: phy@2 {
  147. reg = <2>;
  148. };
  149. phy_port4: phy@3 {
  150. reg = <3>;
  151. };
  152. phy_port5: phy@4 {
  153. reg = <4>;
  154. };
  155. switch@10 {
  156. compatible = "qca,qca8337";
  157. reg = <0x10>;
  158. dsa,member = <2 0>;
  159. ports {
  160. #address-cells = <1>;
  161. #size-cells = <0>;
  162. port@0 {
  163. reg = <0>;
  164. ethernet = <&sgmii0>;
  165. phy-mode = "sgmii";
  166. qca,sgmii-enable-pll;
  167. qca,sgmii-txclk-falling-edge;
  168. fixed-link {
  169. speed = <1000>;
  170. full-duplex;
  171. };
  172. };
  173. port@1 {
  174. reg = <1>;
  175. label = "lan3";
  176. phy-handle = <&phy_port1>;
  177. };
  178. port@2 {
  179. reg = <2>;
  180. label = "lan4";
  181. phy-handle = <&phy_port2>;
  182. };
  183. port@3 {
  184. reg = <3>;
  185. label = "lan5";
  186. phy-handle = <&phy_port3>;
  187. };
  188. port@4 {
  189. reg = <4>;
  190. label = "lan6";
  191. phy-handle = <&phy_port4>;
  192. };
  193. port@5 {
  194. reg = <5>;
  195. label = "lan7";
  196. phy-handle = <&phy_port5>;
  197. };
  198. };
  199. };
  200. };
  201. };
  202. };
  203. &srab {
  204. compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
  205. status = "okay";
  206. dsa,member = <0 0>;
  207. ports {
  208. port@0 {
  209. label = "wan1";
  210. reg = <0>;
  211. };
  212. port@1 {
  213. label = "wan2";
  214. reg = <1>;
  215. };
  216. sgmii0: port@4 {
  217. label = "sw0";
  218. reg = <4>;
  219. fixed-link {
  220. speed = <1000>;
  221. full-duplex;
  222. };
  223. };
  224. sgmii1: port@5 {
  225. label = "sw1";
  226. reg = <5>;
  227. fixed-link {
  228. speed = <1000>;
  229. full-duplex;
  230. };
  231. };
  232. port@8 {
  233. ethernet = <&amac2>;
  234. reg = <8>;
  235. fixed-link {
  236. speed = <1000>;
  237. full-duplex;
  238. };
  239. };
  240. };
  241. };