at91-sama5d27_wlsom1.dtsi 7.9 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
  4. *
  5. * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
  6. *
  7. * Author: Nicolas Ferre <[email protected]>
  8. * Author: Eugen Hristev <[email protected]>
  9. */
  10. #include "sama5d2.dtsi"
  11. #include "sama5d2-pinfunc.h"
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include <dt-bindings/mfd/atmel-flexcom.h>
  14. #include <dt-bindings/pinctrl/at91.h>
  15. / {
  16. model = "Microchip SAMA5D27 WLSOM1";
  17. compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
  18. aliases {
  19. i2c0 = &i2c0;
  20. };
  21. clocks {
  22. slow_xtal {
  23. clock-frequency = <32768>;
  24. };
  25. main_xtal {
  26. clock-frequency = <24000000>;
  27. };
  28. };
  29. wifi_pwrseq: wifi_pwrseq {
  30. compatible = "mmc-pwrseq-wilc1000";
  31. reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
  32. powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>;
  33. pinctrl-0 = <&pinctrl_wilc_pwrseq>;
  34. pinctrl-names = "default";
  35. };
  36. };
  37. &flx1 {
  38. atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
  39. uart6: serial@200 {
  40. pinctrl-0 = <&pinctrl_flx1_default>;
  41. pinctrl-names = "default";
  42. };
  43. };
  44. &i2c0 {
  45. pinctrl-0 = <&pinctrl_i2c0_default>;
  46. pinctrl-1 = <&pinctrl_i2c0_gpio>;
  47. pinctrl-names = "default", "gpio";
  48. sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
  49. scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  50. status = "okay";
  51. };
  52. &i2c1 {
  53. dmas = <0>, <0>;
  54. pinctrl-names = "default", "gpio";
  55. pinctrl-0 = <&pinctrl_i2c1_default>;
  56. pinctrl-1 = <&pinctrl_i2c1_gpio>;
  57. sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
  58. scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
  59. status = "okay";
  60. mcp16502@5b {
  61. compatible = "microchip,mcp16502";
  62. reg = <0x5b>;
  63. status = "okay";
  64. lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
  65. regulators {
  66. vdd_3v3: VDD_IO {
  67. regulator-name = "VDD_IO";
  68. regulator-min-microvolt = <3300000>;
  69. regulator-max-microvolt = <3300000>;
  70. regulator-initial-mode = <2>;
  71. regulator-allowed-modes = <2>, <4>;
  72. regulator-always-on;
  73. regulator-state-standby {
  74. regulator-on-in-suspend;
  75. regulator-mode = <4>;
  76. };
  77. regulator-state-mem {
  78. regulator-off-in-suspend;
  79. regulator-mode = <4>;
  80. };
  81. };
  82. vddio_ddr: VDD_DDR {
  83. regulator-name = "VDD_DDR";
  84. regulator-min-microvolt = <1200000>;
  85. regulator-max-microvolt = <1200000>;
  86. regulator-initial-mode = <2>;
  87. regulator-allowed-modes = <2>, <4>;
  88. regulator-always-on;
  89. regulator-state-standby {
  90. regulator-on-in-suspend;
  91. regulator-suspend-microvolt = <1200000>;
  92. regulator-changeable-in-suspend;
  93. regulator-mode = <4>;
  94. };
  95. regulator-state-mem {
  96. regulator-on-in-suspend;
  97. regulator-suspend-microvolt = <1200000>;
  98. regulator-changeable-in-suspend;
  99. regulator-mode = <4>;
  100. };
  101. };
  102. vdd_core: VDD_CORE {
  103. regulator-name = "VDD_CORE";
  104. regulator-min-microvolt = <1250000>;
  105. regulator-max-microvolt = <1250000>;
  106. regulator-initial-mode = <2>;
  107. regulator-allowed-modes = <2>, <4>;
  108. regulator-always-on;
  109. regulator-state-standby {
  110. regulator-on-in-suspend;
  111. regulator-mode = <4>;
  112. };
  113. regulator-state-mem {
  114. regulator-off-in-suspend;
  115. regulator-mode = <4>;
  116. };
  117. };
  118. vdd_ddr: VDD_OTHER {
  119. regulator-name = "VDD_OTHER";
  120. regulator-min-microvolt = <1800000>;
  121. regulator-max-microvolt = <1800000>;
  122. regulator-initial-mode = <2>;
  123. regulator-allowed-modes = <2>, <4>;
  124. regulator-always-on;
  125. regulator-state-standby {
  126. regulator-on-in-suspend;
  127. regulator-suspend-microvolt = <1800000>;
  128. regulator-changeable-in-suspend;
  129. regulator-mode = <4>;
  130. };
  131. regulator-state-mem {
  132. regulator-on-in-suspend;
  133. regulator-suspend-microvolt = <1800000>;
  134. regulator-changeable-in-suspend;
  135. regulator-mode = <4>;
  136. };
  137. };
  138. LDO1 {
  139. regulator-name = "LDO1";
  140. regulator-min-microvolt = <3300000>;
  141. regulator-max-microvolt = <3300000>;
  142. regulator-always-on;
  143. regulator-state-standby {
  144. regulator-on-in-suspend;
  145. };
  146. regulator-state-mem {
  147. regulator-off-in-suspend;
  148. };
  149. };
  150. LDO2 {
  151. regulator-name = "LDO2";
  152. regulator-min-microvolt = <1800000>;
  153. regulator-max-microvolt = <3300000>;
  154. regulator-state-standby {
  155. regulator-on-in-suspend;
  156. };
  157. regulator-state-mem {
  158. regulator-off-in-suspend;
  159. };
  160. };
  161. };
  162. };
  163. };
  164. &macb0 {
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&pinctrl_macb0_default>;
  167. #address-cells = <1>;
  168. #size-cells = <0>;
  169. phy-mode = "rmii";
  170. ethernet-phy@0 {
  171. reg = <0x0>;
  172. interrupt-parent = <&pioA>;
  173. interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&pinctrl_macb0_phy_irq>;
  176. };
  177. };
  178. &pmc {
  179. atmel,osc-bypass;
  180. };
  181. &qspi1 {
  182. pinctrl-names = "default";
  183. pinctrl-0 = <&pinctrl_qspi1_default>;
  184. status = "disabled";
  185. qspi1_flash: flash@0 {
  186. #address-cells = <1>;
  187. #size-cells = <1>;
  188. compatible = "jedec,spi-nor";
  189. reg = <0>;
  190. spi-max-frequency = <80000000>;
  191. spi-rx-bus-width = <4>;
  192. spi-tx-bus-width = <4>;
  193. m25p,fast-read;
  194. status = "disabled";
  195. at91bootstrap@0 {
  196. label = "at91bootstrap";
  197. reg = <0x0 0x40000>;
  198. };
  199. bootloader@40000 {
  200. label = "bootloader";
  201. reg = <0x40000 0xc0000>;
  202. };
  203. bootloaderenvred@100000 {
  204. label = "bootloader env redundant";
  205. reg = <0x100000 0x40000>;
  206. };
  207. bootloaderenv@140000 {
  208. label = "bootloader env";
  209. reg = <0x140000 0x40000>;
  210. };
  211. dtb@180000 {
  212. label = "device tree";
  213. reg = <0x180000 0x80000>;
  214. };
  215. kernel@200000 {
  216. label = "kernel";
  217. reg = <0x200000 0x600000>;
  218. };
  219. };
  220. };
  221. &pioA {
  222. pinctrl_flx1_default: flx1_usart_default {
  223. pinmux = <PIN_PA24__FLEXCOM1_IO0>,
  224. <PIN_PA23__FLEXCOM1_IO1>,
  225. <PIN_PA25__FLEXCOM1_IO3>,
  226. <PIN_PA26__FLEXCOM1_IO4>;
  227. bias-disable;
  228. };
  229. pinctrl_i2c0_default: i2c0_default {
  230. pinmux = <PIN_PD21__TWD0>,
  231. <PIN_PD22__TWCK0>;
  232. bias-disable;
  233. };
  234. pinctrl_i2c0_gpio: i2c0_gpio {
  235. pinmux = <PIN_PD21__GPIO>,
  236. <PIN_PD22__GPIO>;
  237. bias-disable;
  238. };
  239. pinctrl_i2c1_default: i2c1_default {
  240. pinmux = <PIN_PD19__TWD1>,
  241. <PIN_PD20__TWCK1>;
  242. bias-disable;
  243. };
  244. pinctrl_i2c1_gpio: i2c1_gpio {
  245. pinmux = <PIN_PD19__GPIO>,
  246. <PIN_PD20__GPIO>;
  247. bias-disable;
  248. };
  249. pinctrl_macb0_default: macb0_default {
  250. pinmux = <PIN_PB14__GTXCK>,
  251. <PIN_PB15__GTXEN>,
  252. <PIN_PB16__GRXDV>,
  253. <PIN_PB17__GRXER>,
  254. <PIN_PB18__GRX0>,
  255. <PIN_PB19__GRX1>,
  256. <PIN_PB20__GTX0>,
  257. <PIN_PB21__GTX1>,
  258. <PIN_PB22__GMDC>,
  259. <PIN_PB23__GMDIO>;
  260. bias-disable;
  261. };
  262. pinctrl_macb0_phy_irq: macb0_phy_irq {
  263. pinmux = <PIN_PB24__GPIO>;
  264. bias-disable;
  265. };
  266. pinctrl_qspi1_default: qspi1_default {
  267. pinmux = <PIN_PB5__QSPI1_SCK>,
  268. <PIN_PB6__QSPI1_CS>,
  269. <PIN_PB7__QSPI1_IO0>,
  270. <PIN_PB8__QSPI1_IO1>,
  271. <PIN_PB9__QSPI1_IO2>,
  272. <PIN_PB10__QSPI1_IO3>;
  273. bias-pull-up;
  274. };
  275. pinctrl_sdmmc1_default: sdmmc1_default {
  276. cmd-data {
  277. pinmux = <PIN_PA28__SDMMC1_CMD>,
  278. <PIN_PA18__SDMMC1_DAT0>,
  279. <PIN_PA19__SDMMC1_DAT1>,
  280. <PIN_PA20__SDMMC1_DAT2>,
  281. <PIN_PA21__SDMMC1_DAT3>;
  282. bias-disable;
  283. };
  284. conf-ck {
  285. pinmux = <PIN_PA22__SDMMC1_CK>;
  286. bias-disable;
  287. };
  288. };
  289. pinctrl_wilc_default: wilc_default {
  290. conf-irq {
  291. pinmux = <PIN_PB25__GPIO>;
  292. bias-disable;
  293. };
  294. };
  295. pinctrl_wilc_pwrseq: wilc_pwrseq {
  296. conf-ce-nrst {
  297. pinmux = <PIN_PA27__GPIO>,
  298. <PIN_PA29__GPIO>;
  299. bias-disable;
  300. };
  301. conf-rtcclk {
  302. pinmux = <PIN_PB13__PCK1>;
  303. bias-disable;
  304. };
  305. };
  306. };
  307. &sdmmc1 {
  308. #address-cells = <1>;
  309. #size-cells = <0>;
  310. bus-width = <4>;
  311. pinctrl-names = "default";
  312. pinctrl-0 = <&pinctrl_sdmmc1_default>;
  313. mmc-pwrseq = <&wifi_pwrseq>;
  314. no-1-8-v;
  315. non-removable;
  316. bus-width = <4>;
  317. status = "okay";
  318. wilc: wifi@0 {
  319. reg = <0>;
  320. compatible = "microchip,wilc1000";
  321. pinctrl-names = "default";
  322. pinctrl-0 = <&pinctrl_wilc_default>;
  323. clocks = <&pmc PMC_TYPE_SYSTEM 9>;
  324. clock-names = "rtc";
  325. interrupts = <PIN_PB25 IRQ_TYPE_NONE>;
  326. interrupt-parent = <&pioA>;
  327. assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
  328. assigned-clock-rates = <32768>;
  329. };
  330. };