aspeed-bmc-opp-tacoma.dts 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. // Copyright 2019 IBM Corp.
  3. /dts-v1/;
  4. #include "aspeed-g6.dtsi"
  5. #include <dt-bindings/gpio/aspeed-gpio.h>
  6. #include <dt-bindings/i2c/i2c.h>
  7. #include <dt-bindings/leds/leds-pca955x.h>
  8. / {
  9. model = "Tacoma";
  10. compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
  11. chosen {
  12. stdout-path = &uart5;
  13. bootargs = "console=ttyS4,115200n8 earlycon";
  14. };
  15. memory@80000000 {
  16. device_type = "memory";
  17. reg = <0x80000000 0x40000000>;
  18. };
  19. reserved-memory {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. ranges;
  23. flash_memory: region@b8000000 {
  24. no-map;
  25. reg = <0xb8000000 0x4000000>; /* 64M */
  26. };
  27. ramoops@bc000000 {
  28. compatible = "ramoops";
  29. reg = <0xbc000000 0x180000>; /* 16 * (3 * 0x8000) */
  30. record-size = <0x8000>;
  31. console-size = <0x8000>;
  32. pmsg-size = <0x8000>;
  33. max-reason = <3>; /* KMSG_DUMP_EMERG */
  34. };
  35. vga_memory: region@bf000000 {
  36. no-map;
  37. compatible = "shared-dma-pool";
  38. reg = <0xbf000000 0x01000000>; /* 16M */
  39. };
  40. };
  41. gpio-keys {
  42. compatible = "gpio-keys";
  43. event-ps0-presence {
  44. label = "ps0-presence";
  45. gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
  46. linux,code = <ASPEED_GPIO(H, 3)>;
  47. };
  48. event-ps1-presence {
  49. label = "ps1-presence";
  50. gpios = <&gpio0 ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>;
  51. linux,code = <ASPEED_GPIO(E, 5)>;
  52. };
  53. };
  54. gpio-keys-polled {
  55. compatible = "gpio-keys-polled";
  56. poll-interval = <1000>;
  57. event-fan0-presence {
  58. label = "fan0-presence";
  59. gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
  60. linux,code = <4>;
  61. };
  62. event-fan1-presence {
  63. label = "fan1-presence";
  64. gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
  65. linux,code = <5>;
  66. };
  67. event-fan2-presence {
  68. label = "fan2-presence";
  69. gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
  70. linux,code = <6>;
  71. };
  72. event-fan3-presence {
  73. label = "fan3-presence";
  74. gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
  75. linux,code = <7>;
  76. };
  77. };
  78. iio-hwmon-dps310 {
  79. compatible = "iio-hwmon";
  80. io-channels = <&dps 0>;
  81. };
  82. iio-hwmon-bmp280 {
  83. compatible = "iio-hwmon";
  84. io-channels = <&bmp 1>;
  85. };
  86. };
  87. &ehci1 {
  88. status = "okay";
  89. };
  90. &gpio0 {
  91. gpio-line-names =
  92. /*A0-A7*/ "","","","","","","","",
  93. /*B0-B7*/ "fsi-mux","","","","","","","",
  94. /*C0-C7*/ "","","","","","","","",
  95. /*D0-D7*/ "","","","","","","","",
  96. /*E0-E7*/ "power-button","","","checkstop","","presence-ps1","","led-rear-fault",
  97. /*F0-F7*/ "","","","","","","","",
  98. /*G0-G7*/ "","","","","","","","",
  99. /*H0-H7*/ "","","","presence-ps0","","","","",
  100. /*I0-I7*/ "","","","","","","","",
  101. /*J0-J7*/ "","","","","","","","",
  102. /*K0-K7*/ "","","","","","","","",
  103. /*L0-L7*/ "","","","","","","","",
  104. /*M0-M7*/ "","","","","","","","",
  105. /*N0-N7*/ "","","","","","","","",
  106. /*O0-O7*/ "led-rear-power","led-rear-id","","usb-power","","","","",
  107. /*P0-P7*/ "","","","","","bmc-tpm-reset","","",
  108. /*Q0-Q7*/ "cfam-reset","","","","","","","fsi-routing",
  109. /*R0-R7*/ "","","","","","","","",
  110. /*S0-S7*/ "","","","","","","","",
  111. /*T0-T7*/ "","","","","","","","",
  112. /*U0-U7*/ "","","","","","","","",
  113. /*V0-V7*/ "","","","","","","","",
  114. /*W0-W7*/ "","","","","","","","",
  115. /*X0-X7*/ "","","","","","","","",
  116. /*Y0-Y7*/ "","","","","","","","",
  117. /*Z0-Z7*/ "","","","","","","","";
  118. };
  119. &fmc {
  120. status = "okay";
  121. flash@0 {
  122. status = "okay";
  123. m25p,fast-read;
  124. label = "bmc";
  125. spi-max-frequency = <50000000>;
  126. #include "openbmc-flash-layout-128.dtsi"
  127. };
  128. flash@1 {
  129. status = "okay";
  130. m25p,fast-read;
  131. label = "alt-bmc";
  132. spi-max-frequency = <50000000>;
  133. };
  134. };
  135. &spi1 {
  136. status = "okay";
  137. pinctrl-names = "default";
  138. pinctrl-0 = <&pinctrl_spi1_default>;
  139. flash@0 {
  140. status = "okay";
  141. m25p,fast-read;
  142. label = "pnor";
  143. spi-max-frequency = <100000000>;
  144. };
  145. };
  146. &mac2 {
  147. status = "okay";
  148. pinctrl-names = "default";
  149. pinctrl-0 = <&pinctrl_rmii3_default>;
  150. clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
  151. <&syscon ASPEED_CLK_MAC3RCLK>;
  152. clock-names = "MACCLK", "RCLK";
  153. use-ncsi;
  154. };
  155. &emmc_controller {
  156. status = "okay";
  157. };
  158. &emmc {
  159. status = "okay";
  160. clk-phase-mmc-hs200 = <36>, <270>;
  161. };
  162. &fsim0 {
  163. status = "okay";
  164. #address-cells = <2>;
  165. #size-cells = <0>;
  166. fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
  167. fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
  168. cfam@0,0 {
  169. reg = <0 0>;
  170. #address-cells = <1>;
  171. #size-cells = <1>;
  172. chip-id = <0>;
  173. scom@1000 {
  174. compatible = "ibm,fsi2pib";
  175. reg = <0x1000 0x400>;
  176. };
  177. i2c@1800 {
  178. compatible = "ibm,fsi-i2c-master";
  179. reg = <0x1800 0x400>;
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. cfam0_i2c0: i2c-bus@0 {
  183. reg = <0>;
  184. };
  185. cfam0_i2c1: i2c-bus@1 {
  186. reg = <1>;
  187. };
  188. cfam0_i2c2: i2c-bus@2 {
  189. reg = <2>;
  190. };
  191. cfam0_i2c3: i2c-bus@3 {
  192. reg = <3>;
  193. };
  194. cfam0_i2c4: i2c-bus@4 {
  195. reg = <4>;
  196. };
  197. cfam0_i2c5: i2c-bus@5 {
  198. reg = <5>;
  199. };
  200. cfam0_i2c6: i2c-bus@6 {
  201. reg = <6>;
  202. };
  203. cfam0_i2c7: i2c-bus@7 {
  204. reg = <7>;
  205. };
  206. cfam0_i2c8: i2c-bus@8 {
  207. reg = <8>;
  208. };
  209. cfam0_i2c9: i2c-bus@9 {
  210. reg = <9>;
  211. };
  212. cfam0_i2c10: i2c-bus@a {
  213. reg = <10>;
  214. };
  215. cfam0_i2c11: i2c-bus@b {
  216. reg = <11>;
  217. };
  218. cfam0_i2c12: i2c-bus@c {
  219. reg = <12>;
  220. };
  221. cfam0_i2c13: i2c-bus@d {
  222. reg = <13>;
  223. };
  224. cfam0_i2c14: i2c-bus@e {
  225. reg = <14>;
  226. };
  227. };
  228. sbefifo@2400 {
  229. compatible = "ibm,p9-sbefifo";
  230. reg = <0x2400 0x400>;
  231. #address-cells = <1>;
  232. #size-cells = <0>;
  233. fsi_occ0: occ {
  234. compatible = "ibm,p9-occ";
  235. };
  236. };
  237. fsi_hub0: hub@3400 {
  238. compatible = "fsi-master-hub";
  239. reg = <0x3400 0x400>;
  240. #address-cells = <2>;
  241. #size-cells = <0>;
  242. no-scan-on-init;
  243. };
  244. };
  245. };
  246. &fsi_hub0 {
  247. cfam@1,0 {
  248. reg = <1 0>;
  249. #address-cells = <1>;
  250. #size-cells = <1>;
  251. chip-id = <1>;
  252. scom@1000 {
  253. compatible = "ibm,fsi2pib";
  254. reg = <0x1000 0x400>;
  255. };
  256. i2c@1800 {
  257. compatible = "ibm,fsi-i2c-master";
  258. reg = <0x1800 0x400>;
  259. #address-cells = <1>;
  260. #size-cells = <0>;
  261. cfam1_i2c0: i2c-bus@0 {
  262. reg = <0>;
  263. };
  264. cfam1_i2c1: i2c-bus@1 {
  265. reg = <1>;
  266. };
  267. cfam1_i2c2: i2c-bus@2 {
  268. reg = <2>;
  269. };
  270. cfam1_i2c3: i2c-bus@3 {
  271. reg = <3>;
  272. };
  273. cfam1_i2c4: i2c-bus@4 {
  274. reg = <4>;
  275. };
  276. cfam1_i2c5: i2c-bus@5 {
  277. reg = <5>;
  278. };
  279. cfam1_i2c6: i2c-bus@6 {
  280. reg = <6>;
  281. };
  282. cfam1_i2c7: i2c-bus@7 {
  283. reg = <7>;
  284. };
  285. cfam1_i2c8: i2c-bus@8 {
  286. reg = <8>;
  287. };
  288. cfam1_i2c9: i2c-bus@9 {
  289. reg = <9>;
  290. };
  291. cfam1_i2c10: i2c-bus@a {
  292. reg = <10>;
  293. };
  294. cfam1_i2c11: i2c-bus@b {
  295. reg = <11>;
  296. };
  297. cfam1_i2c12: i2c-bus@c {
  298. reg = <12>;
  299. };
  300. cfam1_i2c13: i2c-bus@d {
  301. reg = <13>;
  302. };
  303. cfam1_i2c14: i2c-bus@e {
  304. reg = <14>;
  305. };
  306. };
  307. sbefifo@2400 {
  308. compatible = "ibm,p9-sbefifo";
  309. reg = <0x2400 0x400>;
  310. #address-cells = <1>;
  311. #size-cells = <0>;
  312. fsi_occ1: occ {
  313. compatible = "ibm,p9-occ";
  314. };
  315. };
  316. fsi_hub1: hub@3400 {
  317. compatible = "fsi-master-hub";
  318. reg = <0x3400 0x400>;
  319. #address-cells = <2>;
  320. #size-cells = <0>;
  321. no-scan-on-init;
  322. };
  323. };
  324. };
  325. /* Legacy OCC numbering (to get rid of when userspace is fixed) */
  326. &fsi_occ0 {
  327. reg = <1>;
  328. };
  329. &fsi_occ1 {
  330. reg = <2>;
  331. };
  332. / {
  333. aliases {
  334. i2c100 = &cfam0_i2c0;
  335. i2c101 = &cfam0_i2c1;
  336. i2c102 = &cfam0_i2c2;
  337. i2c103 = &cfam0_i2c3;
  338. i2c104 = &cfam0_i2c4;
  339. i2c105 = &cfam0_i2c5;
  340. i2c106 = &cfam0_i2c6;
  341. i2c107 = &cfam0_i2c7;
  342. i2c108 = &cfam0_i2c8;
  343. i2c109 = &cfam0_i2c9;
  344. i2c110 = &cfam0_i2c10;
  345. i2c111 = &cfam0_i2c11;
  346. i2c112 = &cfam0_i2c12;
  347. i2c113 = &cfam0_i2c13;
  348. i2c114 = &cfam0_i2c14;
  349. i2c200 = &cfam1_i2c0;
  350. i2c201 = &cfam1_i2c1;
  351. i2c202 = &cfam1_i2c2;
  352. i2c203 = &cfam1_i2c3;
  353. i2c204 = &cfam1_i2c4;
  354. i2c205 = &cfam1_i2c5;
  355. i2c206 = &cfam1_i2c6;
  356. i2c207 = &cfam1_i2c7;
  357. i2c208 = &cfam1_i2c8;
  358. i2c209 = &cfam1_i2c9;
  359. i2c210 = &cfam1_i2c10;
  360. i2c211 = &cfam1_i2c11;
  361. i2c212 = &cfam1_i2c12;
  362. i2c213 = &cfam1_i2c13;
  363. i2c214 = &cfam1_i2c14;
  364. };
  365. };
  366. &i2c0 {
  367. multi-master;
  368. status = "okay";
  369. ibm-panel@62 {
  370. compatible = "ibm,op-panel";
  371. reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
  372. };
  373. };
  374. &i2c1 {
  375. status = "okay";
  376. tpm: tpm@2e {
  377. compatible = "tcg,tpm-tis-i2c";
  378. reg = <0x2e>;
  379. };
  380. };
  381. &i2c2 {
  382. status = "okay";
  383. };
  384. &i2c3 {
  385. status = "okay";
  386. bmp: bmp280@77 {
  387. compatible = "bosch,bmp280";
  388. reg = <0x77>;
  389. #io-channel-cells = <1>;
  390. };
  391. max31785@52 {
  392. compatible = "maxim,max31785a";
  393. reg = <0x52>;
  394. #address-cells = <1>;
  395. #size-cells = <0>;
  396. fan@0 {
  397. compatible = "pmbus-fan";
  398. reg = <0>;
  399. tach-pulses = <2>;
  400. maxim,fan-rotor-input = "tach";
  401. maxim,fan-pwm-freq = <25000>;
  402. maxim,fan-dual-tach;
  403. maxim,fan-no-watchdog;
  404. maxim,fan-no-fault-ramp;
  405. maxim,fan-ramp = <2>;
  406. maxim,fan-fault-pin-mon;
  407. };
  408. fan@1 {
  409. compatible = "pmbus-fan";
  410. reg = <1>;
  411. tach-pulses = <2>;
  412. maxim,fan-rotor-input = "tach";
  413. maxim,fan-pwm-freq = <25000>;
  414. maxim,fan-dual-tach;
  415. maxim,fan-no-watchdog;
  416. maxim,fan-no-fault-ramp;
  417. maxim,fan-ramp = <2>;
  418. maxim,fan-fault-pin-mon;
  419. };
  420. fan@2 {
  421. compatible = "pmbus-fan";
  422. reg = <2>;
  423. tach-pulses = <2>;
  424. maxim,fan-rotor-input = "tach";
  425. maxim,fan-pwm-freq = <25000>;
  426. maxim,fan-dual-tach;
  427. maxim,fan-no-watchdog;
  428. maxim,fan-no-fault-ramp;
  429. maxim,fan-ramp = <2>;
  430. maxim,fan-fault-pin-mon;
  431. };
  432. fan@3 {
  433. compatible = "pmbus-fan";
  434. reg = <3>;
  435. tach-pulses = <2>;
  436. maxim,fan-rotor-input = "tach";
  437. maxim,fan-pwm-freq = <25000>;
  438. maxim,fan-dual-tach;
  439. maxim,fan-no-watchdog;
  440. maxim,fan-no-fault-ramp;
  441. maxim,fan-ramp = <2>;
  442. maxim,fan-fault-pin-mon;
  443. };
  444. };
  445. dps: dps310@76 {
  446. compatible = "infineon,dps310";
  447. reg = <0x76>;
  448. #io-channel-cells = <0>;
  449. };
  450. pca0: pca9552@60 {
  451. compatible = "nxp,pca9552";
  452. reg = <0x60>;
  453. #address-cells = <1>;
  454. #size-cells = <0>;
  455. gpio-controller;
  456. #gpio-cells = <2>;
  457. gpio@0 {
  458. reg = <0>;
  459. type = <PCA955X_TYPE_GPIO>;
  460. };
  461. gpio@1 {
  462. reg = <1>;
  463. type = <PCA955X_TYPE_GPIO>;
  464. };
  465. gpio@2 {
  466. reg = <2>;
  467. type = <PCA955X_TYPE_GPIO>;
  468. };
  469. gpio@3 {
  470. reg = <3>;
  471. type = <PCA955X_TYPE_GPIO>;
  472. };
  473. gpio@4 {
  474. reg = <4>;
  475. type = <PCA955X_TYPE_GPIO>;
  476. };
  477. gpio@5 {
  478. reg = <5>;
  479. type = <PCA955X_TYPE_GPIO>;
  480. };
  481. gpio@6 {
  482. reg = <6>;
  483. type = <PCA955X_TYPE_GPIO>;
  484. };
  485. gpio@7 {
  486. reg = <7>;
  487. type = <PCA955X_TYPE_GPIO>;
  488. };
  489. gpio@8 {
  490. reg = <8>;
  491. type = <PCA955X_TYPE_GPIO>;
  492. };
  493. gpio@9 {
  494. reg = <9>;
  495. type = <PCA955X_TYPE_GPIO>;
  496. };
  497. gpio@10 {
  498. reg = <10>;
  499. type = <PCA955X_TYPE_GPIO>;
  500. };
  501. gpio@11 {
  502. reg = <11>;
  503. type = <PCA955X_TYPE_GPIO>;
  504. };
  505. gpio@12 {
  506. reg = <12>;
  507. type = <PCA955X_TYPE_GPIO>;
  508. };
  509. gpio@13 {
  510. reg = <13>;
  511. type = <PCA955X_TYPE_GPIO>;
  512. };
  513. gpio@14 {
  514. reg = <14>;
  515. type = <PCA955X_TYPE_GPIO>;
  516. };
  517. gpio@15 {
  518. reg = <15>;
  519. type = <PCA955X_TYPE_GPIO>;
  520. };
  521. };
  522. power-supply@68 {
  523. compatible = "ibm,cffps1";
  524. reg = <0x68>;
  525. };
  526. power-supply@69 {
  527. compatible = "ibm,cffps1";
  528. reg = <0x69>;
  529. };
  530. };
  531. &i2c4 {
  532. status = "okay";
  533. tmp423a@4c {
  534. compatible = "ti,tmp423";
  535. reg = <0x4c>;
  536. };
  537. ir35221@70 {
  538. compatible = "infineon,ir35221";
  539. reg = <0x70>;
  540. };
  541. ir35221@71 {
  542. compatible = "infineon,ir35221";
  543. reg = <0x71>;
  544. };
  545. };
  546. &i2c5 {
  547. status = "okay";
  548. tmp423a@4c {
  549. compatible = "ti,tmp423";
  550. reg = <0x4c>;
  551. };
  552. ir35221@70 {
  553. compatible = "infineon,ir35221";
  554. reg = <0x70>;
  555. };
  556. ir35221@71 {
  557. compatible = "infineon,ir35221";
  558. reg = <0x71>;
  559. };
  560. };
  561. &i2c7 {
  562. status = "okay";
  563. };
  564. &i2c9 {
  565. status = "okay";
  566. tmp275@4a {
  567. compatible = "ti,tmp275";
  568. reg = <0x4a>;
  569. };
  570. };
  571. &i2c10 {
  572. status = "okay";
  573. };
  574. &i2c11 {
  575. status = "okay";
  576. pca9552: pca9552@60 {
  577. compatible = "nxp,pca9552";
  578. reg = <0x60>;
  579. #address-cells = <1>;
  580. #size-cells = <0>;
  581. gpio-controller;
  582. #gpio-cells = <2>;
  583. gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
  584. "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
  585. "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
  586. "GPU4_TH_OVERT_N_BUFF", "GPU5_TH_OVERT_N_BUFF",
  587. "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
  588. "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
  589. "GPU4_PWR_GOOD_BUFF", "GPU5_PWR_GOOD_BUFF",
  590. "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
  591. gpio@0 {
  592. reg = <0>;
  593. type = <PCA955X_TYPE_GPIO>;
  594. };
  595. gpio@1 {
  596. reg = <1>;
  597. type = <PCA955X_TYPE_GPIO>;
  598. };
  599. gpio@2 {
  600. reg = <2>;
  601. type = <PCA955X_TYPE_GPIO>;
  602. };
  603. gpio@3 {
  604. reg = <3>;
  605. type = <PCA955X_TYPE_GPIO>;
  606. };
  607. gpio@4 {
  608. reg = <4>;
  609. type = <PCA955X_TYPE_GPIO>;
  610. };
  611. gpio@5 {
  612. reg = <5>;
  613. type = <PCA955X_TYPE_GPIO>;
  614. };
  615. gpio@6 {
  616. reg = <6>;
  617. type = <PCA955X_TYPE_GPIO>;
  618. };
  619. gpio@7 {
  620. reg = <7>;
  621. type = <PCA955X_TYPE_GPIO>;
  622. };
  623. gpio@8 {
  624. reg = <8>;
  625. type = <PCA955X_TYPE_GPIO>;
  626. };
  627. gpio@9 {
  628. reg = <9>;
  629. type = <PCA955X_TYPE_GPIO>;
  630. };
  631. gpio@10 {
  632. reg = <10>;
  633. type = <PCA955X_TYPE_GPIO>;
  634. };
  635. gpio@11 {
  636. reg = <11>;
  637. type = <PCA955X_TYPE_GPIO>;
  638. };
  639. gpio@12 {
  640. reg = <12>;
  641. type = <PCA955X_TYPE_GPIO>;
  642. };
  643. gpio@13 {
  644. reg = <13>;
  645. type = <PCA955X_TYPE_GPIO>;
  646. };
  647. gpio@14 {
  648. reg = <14>;
  649. type = <PCA955X_TYPE_GPIO>;
  650. };
  651. gpio@15 {
  652. reg = <15>;
  653. type = <PCA955X_TYPE_GPIO>;
  654. };
  655. };
  656. rtc@32 {
  657. compatible = "epson,rx8900";
  658. reg = <0x32>;
  659. };
  660. eeprom@51 {
  661. compatible = "atmel,24c64";
  662. reg = <0x51>;
  663. };
  664. ucd90160@64 {
  665. compatible = "ti,ucd90160";
  666. reg = <0x64>;
  667. };
  668. };
  669. &i2c12 {
  670. status = "okay";
  671. };
  672. &i2c13 {
  673. status = "okay";
  674. };
  675. &ibt {
  676. status = "okay";
  677. };
  678. &uart1 {
  679. status = "okay";
  680. // Workaround for A0
  681. compatible = "snps,dw-apb-uart";
  682. };
  683. &uart5 {
  684. // Workaround for A0
  685. compatible = "snps,dw-apb-uart";
  686. };
  687. &vuart1 {
  688. status = "okay";
  689. };
  690. &vuart2 {
  691. status = "okay";
  692. };
  693. &lpc_ctrl {
  694. status = "okay";
  695. memory-region = <&flash_memory>;
  696. flash = <&spi1>;
  697. };
  698. &wdt1 {
  699. aspeed,reset-type = "none";
  700. aspeed,external-signal;
  701. aspeed,ext-push-pull;
  702. aspeed,ext-active-high;
  703. pinctrl-names = "default";
  704. pinctrl-0 = <&pinctrl_wdtrst1_default>;
  705. };
  706. &wdt2 {
  707. status = "okay";
  708. };
  709. &pinctrl {
  710. /* Hog these as no driver is probed for the entire LPC block */
  711. pinctrl-names = "default";
  712. pinctrl-0 = <&pinctrl_lpc_default>,
  713. <&pinctrl_lsirq_default>;
  714. };
  715. &xdma {
  716. status = "okay";
  717. memory-region = <&vga_memory>;
  718. };
  719. &kcs2 {
  720. status = "okay";
  721. aspeed,lpc-io-reg = <0xca8 0xcac>;
  722. };
  723. &kcs3 {
  724. status = "okay";
  725. aspeed,lpc-io-reg = <0xca2>;
  726. aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
  727. };