aspeed-bmc-opp-palmetto.dts 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /dts-v1/;
  3. #include "aspeed-g4.dtsi"
  4. #include <dt-bindings/gpio/aspeed-gpio.h>
  5. / {
  6. model = "Palmetto BMC";
  7. compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
  8. chosen {
  9. stdout-path = &uart5;
  10. bootargs = "console=ttyS4,115200 earlycon";
  11. };
  12. memory@40000000 {
  13. reg = <0x40000000 0x20000000>;
  14. };
  15. reserved-memory {
  16. #address-cells = <1>;
  17. #size-cells = <1>;
  18. ranges;
  19. vga_memory: framebuffer@5f000000 {
  20. no-map;
  21. reg = <0x5f000000 0x01000000>; /* 16M */
  22. };
  23. coldfire_memory: codefire_memory@5ee00000 {
  24. reg = <0x5ee00000 0x00200000>;
  25. no-map;
  26. };
  27. flash_memory: region@5c000000 {
  28. no-map;
  29. reg = <0x5C000000 0x02000000>; /* 32MB */
  30. };
  31. };
  32. leds {
  33. compatible = "gpio-leds";
  34. heartbeat {
  35. gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
  36. };
  37. power {
  38. gpios = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_LOW>;
  39. };
  40. identify {
  41. gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
  42. };
  43. };
  44. fsi: gpio-fsi {
  45. compatible = "aspeed,ast2400-cf-fsi-master", "fsi-master";
  46. #address-cells = <2>;
  47. #size-cells = <0>;
  48. memory-region = <&coldfire_memory>;
  49. aspeed,sram = <&sram>;
  50. aspeed,cvic = <&cvic>;
  51. clock-gpios = <&gpio ASPEED_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
  52. data-gpios = <&gpio ASPEED_GPIO(A, 5) GPIO_ACTIVE_HIGH>;
  53. mux-gpios = <&gpio ASPEED_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
  54. enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
  55. trans-gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
  56. };
  57. gpio-keys {
  58. compatible = "gpio-keys";
  59. event-checkstop {
  60. label = "checkstop";
  61. gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>;
  62. linux,code = <ASPEED_GPIO(P, 5)>;
  63. };
  64. };
  65. };
  66. &fmc {
  67. status = "okay";
  68. flash@0 {
  69. status = "okay";
  70. m25p,fast-read;
  71. label = "bmc";
  72. spi-max-frequency = <50000000>;
  73. #include "openbmc-flash-layout.dtsi"
  74. };
  75. };
  76. &spi {
  77. status = "okay";
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&pinctrl_spi1debug_default>;
  80. flash@0 {
  81. status = "okay";
  82. m25p,fast-read;
  83. spi-max-frequency = <50000000>;
  84. label = "pnor";
  85. };
  86. };
  87. &pinctrl {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_flbusy_default &pinctrl_flwp_default
  90. &pinctrl_vgahs_default &pinctrl_vgavs_default
  91. &pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
  92. };
  93. &uart1 {
  94. /* Rear RS-232 connector */
  95. status = "okay";
  96. pinctrl-names = "default";
  97. pinctrl-0 = <&pinctrl_txd1_default
  98. &pinctrl_rxd1_default
  99. &pinctrl_nrts1_default
  100. &pinctrl_ndtr1_default
  101. &pinctrl_ndsr1_default
  102. &pinctrl_ncts1_default
  103. &pinctrl_ndcd1_default
  104. &pinctrl_nri1_default>;
  105. };
  106. &uart5 {
  107. status = "okay";
  108. };
  109. &mac0 {
  110. status = "okay";
  111. use-ncsi;
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&pinctrl_rmii1_default>;
  114. };
  115. &i2c0 {
  116. status = "okay";
  117. eeprom@50 {
  118. compatible = "atmel,24c256";
  119. reg = <0x50>;
  120. pagesize = <64>;
  121. };
  122. rtc@68 {
  123. compatible = "dallas,ds3231";
  124. reg = <0x68>;
  125. };
  126. };
  127. &i2c1 {
  128. status = "okay";
  129. };
  130. &i2c2 {
  131. status = "okay";
  132. tmp423@4c {
  133. compatible = "ti,tmp423";
  134. reg = <0x4c>;
  135. };
  136. };
  137. &i2c3 {
  138. status = "okay";
  139. occ-hwmon@50 {
  140. compatible = "ibm,p8-occ-hwmon";
  141. reg = <0x50>;
  142. };
  143. };
  144. &i2c4 {
  145. status = "okay";
  146. };
  147. &i2c5 {
  148. status = "okay";
  149. };
  150. &i2c6 {
  151. status = "okay";
  152. };
  153. &i2c7 {
  154. status = "okay";
  155. };
  156. &vuart {
  157. status = "okay";
  158. };
  159. &ibt {
  160. status = "okay";
  161. };
  162. &lpc_ctrl {
  163. status = "okay";
  164. memory-region = <&flash_memory>;
  165. flash = <&spi>;
  166. };
  167. &gpio {
  168. pin_func_mode0 {
  169. gpio-hog;
  170. gpios = <ASPEED_GPIO(C, 4) GPIO_ACTIVE_HIGH>;
  171. output-low;
  172. line-name = "func_mode0";
  173. };
  174. pin_func_mode1 {
  175. gpio-hog;
  176. gpios = <ASPEED_GPIO(C, 5) GPIO_ACTIVE_HIGH>;
  177. output-low;
  178. line-name = "func_mode1";
  179. };
  180. pin_func_mode2 {
  181. gpio-hog;
  182. gpios = <ASPEED_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
  183. output-low;
  184. line-name = "func_mode2";
  185. };
  186. pin_gpio_a0 {
  187. gpio-hog;
  188. gpios = <ASPEED_GPIO(A, 0) GPIO_ACTIVE_HIGH>;
  189. input;
  190. line-name = "BMC_FAN_RESERVED_N";
  191. };
  192. pin_gpio_a1 {
  193. gpio-hog;
  194. gpios = <ASPEED_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
  195. output-high;
  196. line-name = "APSS_WDT_N";
  197. };
  198. pin_gpio_b1 {
  199. gpio-hog;
  200. gpios = <ASPEED_GPIO(B, 1) GPIO_ACTIVE_HIGH>;
  201. output-high;
  202. line-name = "APSS_BOOT_MODE";
  203. };
  204. pin_gpio_b2 {
  205. gpio-hog;
  206. gpios = <ASPEED_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
  207. output-high;
  208. line-name = "APSS_RESET_N";
  209. };
  210. pin_gpio_b7 {
  211. gpio-hog;
  212. gpios = <ASPEED_GPIO(B, 7) GPIO_ACTIVE_HIGH>;
  213. output-high;
  214. line-name = "SPIVID_STBY_RESET_N";
  215. };
  216. pin_gpio_d1 {
  217. gpio-hog;
  218. gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
  219. output-high;
  220. line-name = "BMC_POWER_UP";
  221. };
  222. pin_gpio_f1 {
  223. gpio-hog;
  224. gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH>;
  225. input;
  226. line-name = "BMC_BATTERY_TEST";
  227. };
  228. pin_gpio_f4 {
  229. gpio-hog;
  230. gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
  231. input;
  232. line-name = "AST_HW_FAULT_N";
  233. };
  234. pin_gpio_f5 {
  235. gpio-hog;
  236. gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
  237. input;
  238. line-name = "AST_SYS_FAULT_N";
  239. };
  240. pin_gpio_f7 {
  241. gpio-hog;
  242. gpios = <ASPEED_GPIO(F, 7) GPIO_ACTIVE_HIGH>;
  243. output-high;
  244. line-name = "BMC_FULL_SPEED_N";
  245. };
  246. pin_gpio_g3 {
  247. gpio-hog;
  248. gpios = <ASPEED_GPIO(G, 3) GPIO_ACTIVE_HIGH>;
  249. output-high;
  250. line-name = "BMC_FAN_ERROR_N";
  251. };
  252. pin_gpio_g4 {
  253. gpio-hog;
  254. gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
  255. input;
  256. line-name = "BMC_WDT_RST1_P";
  257. };
  258. pin_gpio_g5 {
  259. gpio-hog;
  260. gpios = <ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>;
  261. input;
  262. line-name = "BMC_WDT_RST2_P";
  263. };
  264. pin_gpio_h0 {
  265. gpio-hog;
  266. gpios = <ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
  267. input;
  268. line-name = "PE_SLOT_TEST_EN_N";
  269. };
  270. pin_gpio_h1 {
  271. gpio-hog;
  272. gpios = <ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
  273. input;
  274. line-name = "BMC_RTCRST_N";
  275. };
  276. pin_gpio_h2 {
  277. gpio-hog;
  278. gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
  279. output-high;
  280. line-name = "SYS_PWROK_BMC";
  281. };
  282. pin_gpio_h7 {
  283. gpio-hog;
  284. gpios = <ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
  285. output-high;
  286. line-name = "BMC_TPM_INT_N";
  287. };
  288. };
  289. &fsi {
  290. cfam@0,0 {
  291. reg = <0 0>;
  292. #address-cells = <1>;
  293. #size-cells = <1>;
  294. chip-id = <0>;
  295. scom@1000 {
  296. compatible = "ibm,fsi2pib";
  297. reg = <0x1000 0x400>;
  298. };
  299. fsi_hub0: hub@3400 {
  300. compatible = "ibm,fsi-master-hub";
  301. reg = <0x3400 0x400>;
  302. #address-cells = <2>;
  303. #size-cells = <0>;
  304. no-scan-on-init;
  305. };
  306. };
  307. };