aspeed-bmc-lenovo-hr855xg2.dts 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Device Tree file for Lenovo Hr855xg2 platform
  4. *
  5. * Copyright (C) 2019-present Lenovo
  6. */
  7. /dts-v1/;
  8. #include "aspeed-g5.dtsi"
  9. #include <dt-bindings/gpio/aspeed-gpio.h>
  10. / {
  11. model = "HR855XG2 BMC";
  12. compatible = "lenovo,hr855xg2-bmc", "aspeed,ast2500";
  13. aliases {
  14. i2c14 = &i2c_riser1;
  15. i2c15 = &i2c_riser2;
  16. i2c16 = &i2c_riser3;
  17. i2c17 = &i2c_M2;
  18. i2c18 = &channel_0;
  19. i2c19 = &channel_1;
  20. i2c20 = &channel_2;
  21. i2c21 = &channel_3;
  22. };
  23. chosen {
  24. stdout-path = &uart5;
  25. bootargs = "console=tty0 console=ttyS4,115200 earlycon";
  26. };
  27. memory@80000000 {
  28. device_type = "memory";
  29. reg = <0x80000000 0x20000000>;
  30. };
  31. reserved-memory {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. ranges;
  35. flash_memory: region@98000000 {
  36. no-map;
  37. reg = <0x98000000 0x00100000>; /* 1M */
  38. };
  39. gfx_memory: framebuffer {
  40. size = <0x01000000>;
  41. alignment = <0x01000000>;
  42. compatible = "shared-dma-pool";
  43. reusable;
  44. };
  45. };
  46. leds {
  47. compatible = "gpio-leds";
  48. heartbeat {
  49. gpios = <&gpio ASPEED_GPIO(C, 7) GPIO_ACTIVE_LOW>;
  50. };
  51. fault {
  52. gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
  53. };
  54. };
  55. iio-hwmon {
  56. compatible = "iio-hwmon";
  57. io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
  58. <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
  59. <&adc 8>, <&adc 9>, <&adc 10>,<&adc 11>,
  60. <&adc 12>,<&adc 13>,<&adc 14>;
  61. };
  62. iio-hwmon-battery {
  63. compatible = "iio-hwmon";
  64. io-channels = <&adc 15>;
  65. };
  66. };
  67. &fmc {
  68. status = "okay";
  69. flash@0 {
  70. status = "okay";
  71. m25p,fast-read;
  72. label = "bmc";
  73. spi-max-frequency = <50000000>;
  74. #include "openbmc-flash-layout.dtsi"
  75. };
  76. };
  77. &lpc_ctrl {
  78. status = "okay";
  79. memory-region = <&flash_memory>;
  80. flash = <&spi1>;
  81. };
  82. &lpc_snoop {
  83. status = "okay";
  84. snoop-ports = <0x80>;
  85. };
  86. &uart1 {
  87. status = "okay";
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_txd1_default
  90. &pinctrl_rxd1_default>;
  91. };
  92. &uart2 {
  93. /* Rear RS-232 connector */
  94. status = "okay";
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_txd2_default
  97. &pinctrl_rxd2_default
  98. &pinctrl_nrts2_default
  99. &pinctrl_ndtr2_default
  100. &pinctrl_ndsr2_default
  101. &pinctrl_ncts2_default
  102. &pinctrl_ndcd2_default
  103. &pinctrl_nri2_default>;
  104. };
  105. &uart3 {
  106. status = "okay";
  107. };
  108. &uart5 {
  109. status = "okay";
  110. };
  111. &ibt {
  112. status = "okay";
  113. };
  114. &mac0 {
  115. status = "okay";
  116. pinctrl-names = "default";
  117. pinctrl-0 = <&pinctrl_rmii1_default>;
  118. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  119. <&syscon ASPEED_CLK_MAC1RCLK>;
  120. clock-names = "MACCLK", "RCLK";
  121. use-ncsi;
  122. };
  123. &mac1 {
  124. status = "okay";
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
  127. };
  128. &adc{
  129. status = "okay";
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_adc0_default
  132. &pinctrl_adc1_default
  133. &pinctrl_adc2_default
  134. &pinctrl_adc3_default
  135. &pinctrl_adc4_default
  136. &pinctrl_adc5_default
  137. &pinctrl_adc6_default
  138. &pinctrl_adc7_default
  139. &pinctrl_adc8_default
  140. &pinctrl_adc9_default
  141. &pinctrl_adc10_default
  142. &pinctrl_adc11_default
  143. &pinctrl_adc12_default
  144. &pinctrl_adc13_default
  145. &pinctrl_adc14_default
  146. &pinctrl_adc15_default>;
  147. };
  148. &i2c0 {
  149. status = "okay";
  150. i2c-switch@70 {
  151. compatible = "nxp,pca9545";
  152. reg = <0x70>;
  153. #address-cells = <1>;
  154. #size-cells = <0>;
  155. i2c_riser1: i2c@0 {
  156. #address-cells = <1>;
  157. #size-cells = <0>;
  158. reg = <0>;
  159. };
  160. i2c_riser2: i2c@1 {
  161. #address-cells = <1>;
  162. #size-cells = <0>;
  163. reg = <1>;
  164. };
  165. i2c_riser3: i2c@2 {
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. reg = <2>;
  169. };
  170. i2c_M2: i2c@3 {
  171. #address-cells = <1>;
  172. #size-cells = <0>;
  173. reg = <3>;
  174. };
  175. };
  176. };
  177. &i2c1 {
  178. status = "okay";
  179. bus-frequency = <90000>;
  180. HotSwap@10 {
  181. compatible = "adm1272";
  182. reg = <0x10>;
  183. };
  184. VR@45 {
  185. compatible = "pmbus";
  186. reg = <0x45>;
  187. };
  188. };
  189. &i2c2 {
  190. status = "okay";
  191. };
  192. &i2c3 {
  193. status = "okay";
  194. i2c-switch@70 {
  195. compatible = "nxp,pca9546";
  196. reg = <0x70>;
  197. #address-cells = <1>;
  198. #size-cells = <0>;
  199. channel_0: i2c@0 {
  200. #address-cells = <1>;
  201. #size-cells = <0>;
  202. reg = <0>;
  203. };
  204. channel_1: i2c@1 {
  205. #address-cells = <1>;
  206. #size-cells = <0>;
  207. reg = <1>;
  208. };
  209. channel_2: i2c@2 {
  210. #address-cells = <1>;
  211. #size-cells = <0>;
  212. reg = <2>;
  213. };
  214. channel_3: i2c@3 {
  215. #address-cells = <1>;
  216. #size-cells = <0>;
  217. reg = <3>;
  218. };
  219. };
  220. };
  221. &i2c4 {
  222. status = "okay";
  223. };
  224. &i2c5 {
  225. status = "okay";
  226. };
  227. &i2c6 {
  228. status = "okay";
  229. /* temp1 */
  230. tmp75@49 {
  231. compatible = "national,lm75";
  232. reg = <0x49>;
  233. };
  234. /* temp2 */
  235. tmp75@4d {
  236. compatible = "national,lm75";
  237. reg = <0x4d>;
  238. };
  239. eeprom@54 {
  240. compatible = "atmel,24c256";
  241. reg = <0x54>;
  242. pagesize = <16>;
  243. };
  244. };
  245. &i2c7 {
  246. status = "okay";
  247. };
  248. &i2c8 {
  249. status = "okay";
  250. };
  251. &i2c9 {
  252. status = "okay";
  253. };
  254. &i2c10 {
  255. status = "okay";
  256. };
  257. &i2c11 {
  258. status = "okay";
  259. };
  260. &i2c13 {
  261. status = "okay";
  262. };
  263. &ehci1 {
  264. status = "okay";
  265. };
  266. &uhci {
  267. status = "okay";
  268. };
  269. &gfx {
  270. status = "okay";
  271. memory-region = <&gfx_memory>;
  272. };
  273. &pwm_tacho {
  274. status = "okay";
  275. pinctrl-names = "default";
  276. pinctrl-0 = <&pinctrl_pwm0_default
  277. &pinctrl_pwm1_default
  278. &pinctrl_pwm2_default
  279. &pinctrl_pwm3_default
  280. &pinctrl_pwm4_default
  281. &pinctrl_pwm5_default
  282. &pinctrl_pwm6_default
  283. &pinctrl_pwm7_default>;
  284. fan@0 {
  285. reg = <0x00>;
  286. aspeed,fan-tach-ch = /bits/ 8 <0x00>;
  287. };
  288. fan@1 {
  289. reg = <0x00>;
  290. aspeed,fan-tach-ch = /bits/ 8 <0x01>;
  291. };
  292. fan@2 {
  293. reg = <0x01>;
  294. aspeed,fan-tach-ch = /bits/ 8 <0x02>;
  295. };
  296. fan@3 {
  297. reg = <0x01>;
  298. aspeed,fan-tach-ch = /bits/ 8 <0x03>;
  299. };
  300. fan@4 {
  301. reg = <0x02>;
  302. aspeed,fan-tach-ch = /bits/ 8 <0x04>;
  303. };
  304. fan@5 {
  305. reg = <0x02>;
  306. aspeed,fan-tach-ch = /bits/ 8 <0x05>;
  307. };
  308. fan@6 {
  309. reg = <0x03>;
  310. aspeed,fan-tach-ch = /bits/ 8 <0x06>;
  311. };
  312. fan@7 {
  313. reg = <0x03>;
  314. aspeed,fan-tach-ch = /bits/ 8 <0x07>;
  315. };
  316. fan@8 {
  317. reg = <0x04>;
  318. aspeed,fan-tach-ch = /bits/ 8 <0x08>;
  319. };
  320. fan@9 {
  321. reg = <0x04>;
  322. aspeed,fan-tach-ch = /bits/ 8 <0x09>;
  323. };
  324. fan@10 {
  325. reg = <0x05>;
  326. aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
  327. };
  328. fan@11 {
  329. reg = <0x05>;
  330. aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
  331. };
  332. fan@12 {
  333. reg = <0x06>;
  334. aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
  335. };
  336. fan@13 {
  337. reg = <0x06>;
  338. aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
  339. };
  340. fan@14 {
  341. reg = <0x07>;
  342. aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
  343. };
  344. fan@15 {
  345. reg = <0x07>;
  346. aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
  347. };
  348. fan@16 {
  349. reg = <0x07>;
  350. aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
  351. };
  352. };
  353. &gpio {
  354. pin_gpio_a1 {
  355. gpio-hog;
  356. gpios = <ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
  357. output-high;
  358. line-name = "BMC_EMMC_RST_N";
  359. };
  360. pin_gpio_a3 {
  361. gpio-hog;
  362. gpios = <ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
  363. output-high;
  364. line-name = "PCH_PWROK_BMC_FPGA";
  365. };
  366. pin_gpio_b5 {
  367. gpio-hog;
  368. gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
  369. output-high;
  370. line-name = "IRQ_BMC_PCH_SMI_LPC_N";
  371. };
  372. pin_gpio_b7 {
  373. gpio-hog;
  374. gpios = <ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>;
  375. output-low;
  376. line-name = "CPU_SM_WP";
  377. };
  378. pin_gpio_e0 {
  379. gpio-hog;
  380. gpios = <ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
  381. input;
  382. line-name = "PDB_PSU_SEL";
  383. };
  384. pin_gpio_e2 {
  385. gpio-hog;
  386. gpios = <ASPEED_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
  387. output-high;
  388. line-name = "LOCATOR_LED_N";
  389. };
  390. pin_gpio_e5 {
  391. gpio-hog;
  392. gpios = <ASPEED_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
  393. output-high;
  394. line-name = "FM_BMC_DBP_PRESENT_R1_N";
  395. };
  396. pin_gpio_e6 {
  397. gpio-hog;
  398. gpios = <ASPEED_GPIO(E, 6) GPIO_ACTIVE_HIGH>;
  399. output-high;
  400. line-name = "BMC_ME_SECURITY_OVERRIDE_N";
  401. };
  402. pin_gpio_f0 {
  403. gpio-hog;
  404. gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
  405. output-high;
  406. line-name = "IRQ_BMC_PCH_NMI_R";
  407. };
  408. pin_gpio_f1 {
  409. gpio-hog;
  410. gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_HIGH>;
  411. input;
  412. line-name = "CPU2_PROCDIS_BMC_N";
  413. };
  414. pin_gpio_f2 {
  415. gpio-hog;
  416. gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_HIGH>;
  417. output-high;
  418. line-name = "RM_THROTTLE_EN_N";
  419. };
  420. pin_gpio_f3 {
  421. gpio-hog;
  422. gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
  423. output-low;
  424. line-name = "FM_PMBUS_ALERT_B_EN";
  425. };
  426. pin_gpio_f4 {
  427. gpio-hog;
  428. gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
  429. output-high;
  430. line-name = "BMC_FORCE_NM_THROTTLE_N";
  431. };
  432. pin_gpio_f6 {
  433. gpio-hog;
  434. gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_HIGH>;
  435. output-high;
  436. line-name = "FM_BMC_CPU_PWR_DEBUG_N";
  437. };
  438. pin_gpio_g7 {
  439. gpio-hog;
  440. gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
  441. output-high;
  442. line-name = "BMC_PCIE_I2C_MUX_RST_N";
  443. };
  444. pin_gpio_h6 {
  445. gpio-hog;
  446. gpios = <ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
  447. output-high;
  448. line-name = "FM_BMC_DBP_PRESENT_R2_N";
  449. };
  450. pin_gpio_i3 {
  451. gpio-hog;
  452. gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
  453. output-high;
  454. line-name = "SPI_BMC_BIOS_WP_N";
  455. };
  456. pin_gpio_j1 {
  457. gpio-hog;
  458. gpios = <ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
  459. output-high;
  460. line-name = "BMC_USB_SEL";
  461. };
  462. pin_gpio_j2 {
  463. gpio-hog;
  464. gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
  465. output-high;
  466. line-name = "PDB_SMB_RST_N";
  467. };
  468. pin_gpio_j3 {
  469. gpio-hog;
  470. gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
  471. output-high;
  472. line-name = "SPI_BMC_BIOS_HOLD_N";
  473. };
  474. pin_gpio_l0 {
  475. gpio-hog;
  476. gpios = <ASPEED_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
  477. output-high;
  478. line-name = "PDB_FAN_TACH_SEL";
  479. };
  480. pin_gpio_l1 {
  481. gpio-hog;
  482. gpios = <ASPEED_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
  483. output-high;
  484. line-name = "SYS_RESET_BMC_FPGA_N";
  485. };
  486. pin_gpio_l4 {
  487. gpio-hog;
  488. gpios = <ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
  489. output-high;
  490. line-name = "FM_EFUSE_FAN_G1_EN";
  491. };
  492. pin_gpio_l5 {
  493. gpio-hog;
  494. gpios = <ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
  495. output-high;
  496. line-name = "FM_EFUSE_FAN_G2_EN";
  497. };
  498. pin_gpio_r6 {
  499. gpio-hog;
  500. gpios = <ASPEED_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
  501. input;
  502. line-name = "CPU3_PROCDIS_BMC_N";
  503. };
  504. pin_gpio_r7 {
  505. gpio-hog;
  506. gpios = <ASPEED_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
  507. input;
  508. line-name = "CPU4_PROCDIS_BMC_N";
  509. };
  510. pin_gpio_s1 {
  511. gpio-hog;
  512. gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_HIGH>;
  513. output-low;
  514. line-name = "DBP_SYSPWROK_BMC";
  515. };
  516. pin_gpio_s2 {
  517. gpio-hog;
  518. gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
  519. output-high;
  520. line-name = "PCH_RST_RSMRST_N";
  521. };
  522. pin_gpio_s6 {
  523. gpio-hog;
  524. gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
  525. output-high;
  526. line-name = "BMC_HW_STRAP_5";
  527. };
  528. pin_gpio_z3 {
  529. gpio-hog;
  530. gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
  531. output-high;
  532. line-name = "FM_BMC_PCH_SCI_LPC_N";
  533. };
  534. pin_gpio_aa0 {
  535. gpio-hog;
  536. gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
  537. output-low;
  538. line-name = "FW_PSU_ALERT_EN_N";
  539. };
  540. pin_gpio_aa4 {
  541. gpio-hog;
  542. gpios = <ASPEED_GPIO(AA, 4) GPIO_ACTIVE_HIGH>;
  543. output-high;
  544. line-name = "DBP_CPU_PREQ_N";
  545. };
  546. pin_gpio_ab3 {
  547. gpio-hog;
  548. gpios = <ASPEED_GPIO(AB, 3) GPIO_ACTIVE_HIGH>;
  549. output-low;
  550. line-name = "BMC_WDTRST";
  551. };
  552. pin_gpio_ac6 {
  553. gpio-hog;
  554. gpios = <ASPEED_GPIO(AC, 6) GPIO_ACTIVE_HIGH>;
  555. output-high;
  556. line-name = "ESPI_BMC_ALERT_N";
  557. };
  558. };