aspeed-bmc-amd-ethanolx.dts 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2020 AMD Inc.
  3. // Author: Supreeth Venkatesh <[email protected]>
  4. /dts-v1/;
  5. #include "aspeed-g5.dtsi"
  6. #include <dt-bindings/gpio/aspeed-gpio.h>
  7. / {
  8. model = "AMD EthanolX BMC";
  9. compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
  10. memory@80000000 {
  11. reg = <0x80000000 0x20000000>;
  12. };
  13. reserved-memory {
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. ranges;
  17. video_engine_memory: jpegbuffer {
  18. size = <0x02000000>; /* 32M */
  19. alignment = <0x01000000>;
  20. compatible = "shared-dma-pool";
  21. reusable;
  22. };
  23. };
  24. aliases {
  25. serial0 = &uart1;
  26. serial4 = &uart5;
  27. };
  28. chosen {
  29. stdout-path = &uart5;
  30. bootargs = "console=ttyS4,115200 earlycon";
  31. };
  32. leds {
  33. compatible = "gpio-leds";
  34. fault {
  35. gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
  36. };
  37. identify {
  38. gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
  39. };
  40. };
  41. iio-hwmon {
  42. compatible = "iio-hwmon";
  43. io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
  44. };
  45. };
  46. &fmc {
  47. status = "okay";
  48. flash@0 {
  49. status = "okay";
  50. m25p,fast-read;
  51. #include "openbmc-flash-layout.dtsi"
  52. };
  53. };
  54. &mac0 {
  55. status = "okay";
  56. pinctrl-names = "default";
  57. pinctrl-0 = <&pinctrl_rmii1_default>;
  58. clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
  59. <&syscon ASPEED_CLK_MAC1RCLK>;
  60. clock-names = "MACCLK", "RCLK";
  61. };
  62. &uart1 {
  63. //Host Console
  64. status = "okay";
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&pinctrl_txd1_default
  67. &pinctrl_rxd1_default>;
  68. };
  69. &uart5 {
  70. //BMC Console
  71. status = "okay";
  72. };
  73. &adc {
  74. status = "okay";
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&pinctrl_adc0_default
  77. &pinctrl_adc1_default
  78. &pinctrl_adc2_default
  79. &pinctrl_adc3_default
  80. &pinctrl_adc4_default>;
  81. };
  82. &gpio {
  83. status = "okay";
  84. gpio-line-names =
  85. /*A0-A7*/ "","","FAULT_LED","CHASSIS_ID_LED","","","","",
  86. /*B0-B7*/ "","","","","","","","",
  87. /*C0-C7*/ "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","",
  88. /*D0-D7*/ "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S",
  89. "JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD",
  90. /*E0-E7*/ "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN",
  91. "MON_P0_PWR_GOOD","MON_PWROK","MON_RESET",
  92. /*F0-F7*/ "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP",
  93. "MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","",
  94. /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0",
  95. "P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","",
  96. /*H0-H7*/ "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3",
  97. "PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1",
  98. /*I0-I7*/ "","","","","","","","",
  99. /*J0-J7*/ "","","","","","","","",
  100. /*K0-K7*/ "","","","","","","","",
  101. /*L0-L7*/ "","","","","","","","",
  102. /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN",
  103. "ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT",
  104. "ASSERT_CLR_CMOS","ASSERT_BMC_READY",
  105. /*N0-N7*/ "","","","","","","","",
  106. /*O0-O7*/ "","","","","","","","",
  107. /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT",
  108. "P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT",
  109. "P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT",
  110. "P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT",
  111. /*Q0-Q7*/ "","","","","","","","",
  112. /*R0-R7*/ "","","","","","","","",
  113. /*S0-S7*/ "","","","","","","","",
  114. /*T0-T7*/ "","","","","","","","",
  115. /*U0-U7*/ "","","","","","","","",
  116. /*V0-V7*/ "","","","","","","","",
  117. /*W0-W7*/ "","","","","","","","",
  118. /*X0-X7*/ "","","","","","","","",
  119. /*Y0-Y7*/ "","","","","","","","",
  120. /*Z0-Z7*/ "","","","","","","","",
  121. /*AA0-AA7*/ "","SENSOR THERM","","","","","","",
  122. /*AB0-AB7*/ "","","","","","","","",
  123. /*AC0-AC7*/ "","","","","","","","";
  124. };
  125. //APML for P0
  126. &i2c0 {
  127. status = "okay";
  128. };
  129. //APML for P1
  130. &i2c1 {
  131. status = "okay";
  132. };
  133. //FPGA
  134. &i2c2 {
  135. status = "okay";
  136. };
  137. //24LC128 EEPROM
  138. &i2c3 {
  139. status = "okay";
  140. eeprom@50 {
  141. compatible = "atmel,24c256";
  142. reg = <0x50>;
  143. pagesize = <64>;
  144. };
  145. };
  146. //P0 Power regulators
  147. &i2c4 {
  148. status = "okay";
  149. };
  150. //P1 Power regulators
  151. &i2c5 {
  152. status = "okay";
  153. };
  154. //P0/P1 Thermal diode
  155. &i2c6 {
  156. status = "okay";
  157. };
  158. // Thermal Sensors
  159. &i2c7 {
  160. status = "okay";
  161. lm75a@48 {
  162. compatible = "national,lm75a";
  163. reg = <0x48>;
  164. };
  165. lm75a@49 {
  166. compatible = "national,lm75a";
  167. reg = <0x49>;
  168. };
  169. lm75a@4a {
  170. compatible = "national,lm75a";
  171. reg = <0x4a>;
  172. };
  173. lm75a@4b {
  174. compatible = "national,lm75a";
  175. reg = <0x4b>;
  176. };
  177. lm75a@4c {
  178. compatible = "national,lm75a";
  179. reg = <0x4c>;
  180. };
  181. lm75a@4d {
  182. compatible = "national,lm75a";
  183. reg = <0x4d>;
  184. };
  185. lm75a@4e {
  186. compatible = "national,lm75a";
  187. reg = <0x4e>;
  188. };
  189. lm75a@4f {
  190. compatible = "national,lm75a";
  191. reg = <0x4f>;
  192. };
  193. };
  194. //BMC I2C
  195. &i2c8 {
  196. status = "okay";
  197. };
  198. &kcs1 {
  199. status = "okay";
  200. aspeed,lpc-io-reg = <0x60>;
  201. };
  202. &kcs2 {
  203. status = "okay";
  204. aspeed,lpc-io-reg = <0x62>;
  205. };
  206. &kcs3 {
  207. status = "okay";
  208. aspeed,lpc-io-reg = <0xCA2>;
  209. };
  210. &kcs4 {
  211. status = "okay";
  212. aspeed,lpc-io-reg = <0x97DE>;
  213. };
  214. &lpc_snoop {
  215. status = "okay";
  216. snoop-ports = <0x80>, <0x81>;
  217. };
  218. &lpc_ctrl {
  219. //Enable lpc clock
  220. status = "okay";
  221. };
  222. &pwm_tacho {
  223. status = "okay";
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&pinctrl_pwm0_default
  226. &pinctrl_pwm1_default
  227. &pinctrl_pwm2_default
  228. &pinctrl_pwm3_default
  229. &pinctrl_pwm4_default
  230. &pinctrl_pwm5_default
  231. &pinctrl_pwm6_default
  232. &pinctrl_pwm7_default>;
  233. fan@0 {
  234. reg = <0x00>;
  235. aspeed,fan-tach-ch = /bits/ 8 <0x00>;
  236. };
  237. fan@1 {
  238. reg = <0x01>;
  239. aspeed,fan-tach-ch = /bits/ 8 <0x01>;
  240. };
  241. fan@2 {
  242. reg = <0x02>;
  243. aspeed,fan-tach-ch = /bits/ 8 <0x02>;
  244. };
  245. fan@3 {
  246. reg = <0x03>;
  247. aspeed,fan-tach-ch = /bits/ 8 <0x03>;
  248. };
  249. fan@4 {
  250. reg = <0x04>;
  251. aspeed,fan-tach-ch = /bits/ 8 <0x04>;
  252. };
  253. fan@5 {
  254. reg = <0x05>;
  255. aspeed,fan-tach-ch = /bits/ 8 <0x05>;
  256. };
  257. fan@6 {
  258. reg = <0x06>;
  259. aspeed,fan-tach-ch = /bits/ 8 <0x06>;
  260. };
  261. fan@7 {
  262. reg = <0x07>;
  263. aspeed,fan-tach-ch = /bits/ 8 <0x07>;
  264. };
  265. };
  266. &video {
  267. status = "okay";
  268. memory-region = <&video_engine_memory>;
  269. };
  270. &vhub {
  271. status = "okay";
  272. };