armada-xp-synology-ds414.dts 7.5 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for Synology DS414
  4. *
  5. * Copyright (C) 2014, Arnaud EBALARD <[email protected]>
  6. *
  7. * Note: this Device Tree assumes that the bootloader has remapped the
  8. * internal registers to 0xf1000000 (instead of the old 0xd0000000).
  9. * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
  10. * bootloaders provided by Marvell. It is used in recent versions of
  11. * DSM software provided by Synology. Nonetheless, some earlier boards
  12. * were delivered with an older version of u-boot that left internal
  13. * registers mapped at 0xd0000000. If you have such a device you will
  14. * not be able to directly boot a kernel based on this Device Tree. In
  15. * that case, the preferred solution is to update your bootloader (e.g.
  16. * by upgrading to latest version of DSM, or building a new one and
  17. * installing it from u-boot prompt) or adjust the Devive Tree
  18. * (s/0xf1000000/0xd0000000/ in 'ranges' below).
  19. */
  20. /dts-v1/;
  21. #include <dt-bindings/input/input.h>
  22. #include <dt-bindings/gpio/gpio.h>
  23. #include "armada-xp-mv78230.dtsi"
  24. / {
  25. model = "Synology DS414";
  26. compatible = "synology,ds414", "marvell,armadaxp-mv78230",
  27. "marvell,armadaxp", "marvell,armada-370-xp";
  28. chosen {
  29. stdout-path = "serial0:115200n8";
  30. };
  31. memory@0 {
  32. device_type = "memory";
  33. reg = <0 0x00000000 0 0x40000000>; /* 1GB */
  34. };
  35. soc {
  36. ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
  37. MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
  38. MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
  39. MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
  40. internal-regs {
  41. /* RTC is provided by Seiko S-35390A below */
  42. rtc@10300 {
  43. status = "disabled";
  44. };
  45. i2c@11000 {
  46. clock-frequency = <400000>;
  47. status = "okay";
  48. s35390a: s35390a@30 {
  49. compatible = "sii,s35390a";
  50. reg = <0x30>;
  51. };
  52. };
  53. /* Connected to a header on device's PCB. This
  54. * provides the main console for the device.
  55. *
  56. * Warning: the device may not boot with a 3.3V
  57. * USB-serial converter connected when the power
  58. * button is pressed. The converter needs to be
  59. * connected a few seconds after pressing the
  60. * power button. This is possibly due to UART0_TXD
  61. * pin being sampled at reset (bit 0 of SAR).
  62. */
  63. serial@12000 {
  64. status = "okay";
  65. };
  66. /* Connected to a Microchip PIC16F883 for power control */
  67. serial@12100 {
  68. status = "okay";
  69. };
  70. poweroff@12100 {
  71. compatible = "synology,power-off";
  72. reg = <0x12100 0x100>;
  73. clocks = <&coreclk 0>;
  74. };
  75. /* Front USB 2.0 port */
  76. usb@50000 {
  77. status = "okay";
  78. };
  79. ethernet@70000 {
  80. status = "okay";
  81. pinctrl-0 = <&ge0_rgmii_pins>;
  82. pinctrl-names = "default";
  83. phy = <&phy1>;
  84. phy-mode = "rgmii-id";
  85. };
  86. ethernet@74000 {
  87. pinctrl-0 = <&ge1_rgmii_pins>;
  88. pinctrl-names = "default";
  89. status = "okay";
  90. phy = <&phy0>;
  91. phy-mode = "rgmii-id";
  92. };
  93. };
  94. };
  95. regulators {
  96. compatible = "simple-bus";
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
  100. &sata3_pwr_pin &sata4_pwr_pin>;
  101. pinctrl-names = "default";
  102. sata1_regulator: sata1-regulator@1 {
  103. compatible = "regulator-fixed";
  104. reg = <1>;
  105. regulator-name = "SATA1 Power";
  106. regulator-min-microvolt = <5000000>;
  107. regulator-max-microvolt = <5000000>;
  108. startup-delay-us = <2000000>;
  109. enable-active-high;
  110. regulator-always-on;
  111. regulator-boot-on;
  112. gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
  113. };
  114. sata2_regulator: sata2-regulator@2 {
  115. compatible = "regulator-fixed";
  116. reg = <2>;
  117. regulator-name = "SATA2 Power";
  118. regulator-min-microvolt = <5000000>;
  119. regulator-max-microvolt = <5000000>;
  120. startup-delay-us = <4000000>;
  121. enable-active-high;
  122. regulator-always-on;
  123. regulator-boot-on;
  124. gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  125. };
  126. sata3_regulator: sata3-regulator@3 {
  127. compatible = "regulator-fixed";
  128. reg = <3>;
  129. regulator-name = "SATA3 Power";
  130. regulator-min-microvolt = <5000000>;
  131. regulator-max-microvolt = <5000000>;
  132. startup-delay-us = <6000000>;
  133. enable-active-high;
  134. regulator-always-on;
  135. regulator-boot-on;
  136. gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  137. };
  138. sata4_regulator: sata4-regulator@4 {
  139. compatible = "regulator-fixed";
  140. reg = <4>;
  141. regulator-name = "SATA4 Power";
  142. regulator-min-microvolt = <5000000>;
  143. regulator-max-microvolt = <5000000>;
  144. startup-delay-us = <8000000>;
  145. enable-active-high;
  146. regulator-always-on;
  147. regulator-boot-on;
  148. gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  149. };
  150. };
  151. };
  152. &pciec {
  153. status = "okay";
  154. /*
  155. * Connected to Marvell 88SX7042 SATA-II controller
  156. * handling the four disks.
  157. */
  158. pcie@1,0 {
  159. /* Port 0, Lane 0 */
  160. status = "okay";
  161. };
  162. /*
  163. * Connected to EtronTech EJ168A XHCI controller
  164. * providing the two rear USB 3.0 ports.
  165. */
  166. pcie@5,0 {
  167. /* Port 1, Lane 0 */
  168. status = "okay";
  169. };
  170. };
  171. &mdio {
  172. phy0: ethernet-phy@0 { /* Marvell 88E1512 */
  173. reg = <0>;
  174. };
  175. phy1: ethernet-phy@1 { /* Marvell 88E1512 */
  176. reg = <1>;
  177. };
  178. };
  179. &pinctrl {
  180. sata1_pwr_pin: sata1-pwr-pin {
  181. marvell,pins = "mpp42";
  182. marvell,function = "gpio";
  183. };
  184. sata2_pwr_pin: sata2-pwr-pin {
  185. marvell,pins = "mpp44";
  186. marvell,function = "gpio";
  187. };
  188. sata3_pwr_pin: sata3-pwr-pin {
  189. marvell,pins = "mpp45";
  190. marvell,function = "gpio";
  191. };
  192. sata4_pwr_pin: sata4-pwr-pin {
  193. marvell,pins = "mpp46";
  194. marvell,function = "gpio";
  195. };
  196. sata1_pres_pin: sata1-pres-pin {
  197. marvell,pins = "mpp34";
  198. marvell,function = "gpio";
  199. };
  200. sata2_pres_pin: sata2-pres-pin {
  201. marvell,pins = "mpp35";
  202. marvell,function = "gpio";
  203. };
  204. sata3_pres_pin: sata3-pres-pin {
  205. marvell,pins = "mpp40";
  206. marvell,function = "gpio";
  207. };
  208. sata4_pres_pin: sata4-pres-pin {
  209. marvell,pins = "mpp41";
  210. marvell,function = "gpio";
  211. };
  212. syno_id_bit0_pin: syno-id-bit0-pin {
  213. marvell,pins = "mpp26";
  214. marvell,function = "gpio";
  215. };
  216. syno_id_bit1_pin: syno-id-bit1-pin {
  217. marvell,pins = "mpp28";
  218. marvell,function = "gpio";
  219. };
  220. syno_id_bit2_pin: syno-id-bit2-pin {
  221. marvell,pins = "mpp29";
  222. marvell,function = "gpio";
  223. };
  224. fan1_alarm_pin: fan1-alarm-pin {
  225. marvell,pins = "mpp33";
  226. marvell,function = "gpio";
  227. };
  228. fan2_alarm_pin: fan2-alarm-pin {
  229. marvell,pins = "mpp32";
  230. marvell,function = "gpio";
  231. };
  232. };
  233. &spi0 {
  234. status = "okay";
  235. flash@0 {
  236. #address-cells = <1>;
  237. #size-cells = <1>;
  238. compatible = "micron,n25q064", "jedec,spi-nor";
  239. reg = <0>; /* Chip select 0 */
  240. spi-max-frequency = <20000000>;
  241. /*
  242. * Warning!
  243. *
  244. * Synology u-boot uses its compiled-in environment
  245. * and it seems Synology did not care to change u-boot
  246. * default configuration in order to allow saving a
  247. * modified environment at a sensible location. So,
  248. * if you do a 'saveenv' under u-boot, your modified
  249. * environment will be saved at 1MB after the start
  250. * of the flash, i.e. in the middle of the uImage.
  251. * For that reason, it is strongly advised not to
  252. * change the default environment, unless you know
  253. * what you are doing.
  254. */
  255. partition@0 { /* u-boot */
  256. label = "RedBoot";
  257. reg = <0x00000000 0x000d0000>; /* 832KB */
  258. };
  259. partition@c0000 { /* uImage */
  260. label = "zImage";
  261. reg = <0x000d0000 0x002d0000>; /* 2880KB */
  262. };
  263. partition@3a0000 { /* uInitramfs */
  264. label = "rd.gz";
  265. reg = <0x003a0000 0x00430000>; /* 4250KB */
  266. };
  267. partition@7d0000 { /* MAC address and serial number */
  268. label = "vendor";
  269. reg = <0x007d0000 0x00010000>; /* 64KB */
  270. };
  271. partition@7e0000 {
  272. label = "RedBoot config";
  273. reg = <0x007e0000 0x00010000>; /* 64KB */
  274. };
  275. partition@7f0000 {
  276. label = "FIS directory";
  277. reg = <0x007f0000 0x00010000>; /* 64KB */
  278. };
  279. };
  280. };