armada-xp-db-xc3-24g4xg.dts 2.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Device Tree file for DB-XC3-24G4XG board
  4. *
  5. * Copyright (C) 2016 Allied Telesis Labs
  6. *
  7. * Based on armada-xp-db.dts
  8. *
  9. * Note: this Device Tree assumes that the bootloader has remapped the
  10. * internal registers to 0xf1000000 (instead of the default
  11. * 0xd0000000). The 0xf1000000 is the default used by the recent,
  12. * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
  13. * boards were delivered with an older version of the bootloader that
  14. * left internal registers mapped at 0xd0000000. If you are in this
  15. * situation, you should either update your bootloader (preferred
  16. * solution) or the below Device Tree should be adjusted.
  17. */
  18. /dts-v1/;
  19. #include "armada-xp-98dx3336.dtsi"
  20. / {
  21. model = "DB-XC3-24G4XG";
  22. compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
  23. chosen {
  24. bootargs = "console=ttyS0,115200 earlyprintk";
  25. };
  26. memory {
  27. device_type = "memory";
  28. reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
  29. };
  30. };
  31. &L2 {
  32. arm,parity-enable;
  33. marvell,ecc-enable;
  34. };
  35. &devbus_bootcs {
  36. status = "okay";
  37. /* Device Bus parameters are required */
  38. /* Read parameters */
  39. devbus,bus-width = <16>;
  40. devbus,turn-off-ps = <60000>;
  41. devbus,badr-skew-ps = <0>;
  42. devbus,acc-first-ps = <124000>;
  43. devbus,acc-next-ps = <248000>;
  44. devbus,rd-setup-ps = <0>;
  45. devbus,rd-hold-ps = <0>;
  46. /* Write parameters */
  47. devbus,sync-enable = <0>;
  48. devbus,wr-high-ps = <60000>;
  49. devbus,wr-low-ps = <60000>;
  50. devbus,ale-wr-ps = <60000>;
  51. };
  52. &uart0 {
  53. status = "okay";
  54. };
  55. &uart1 {
  56. status = "okay";
  57. };
  58. &i2c0 {
  59. clock-frequency = <100000>;
  60. status = "okay";
  61. };
  62. &nand_controller {
  63. status = "okay";
  64. nand@0 {
  65. reg = <0>;
  66. label = "pxa3xx_nand-0";
  67. nand-rb = <0>;
  68. marvell,nand-keep-config;
  69. nand-on-flash-bbt;
  70. nand-ecc-strength = <4>;
  71. nand-ecc-step-size = <512>;
  72. };
  73. };
  74. &spi0 {
  75. status = "okay";
  76. flash@0 {
  77. #address-cells = <1>;
  78. #size-cells = <1>;
  79. compatible = "m25p64";
  80. reg = <0>; /* Chip select 0 */
  81. spi-max-frequency = <20000000>;
  82. m25p,fast-read;
  83. partition@u-boot {
  84. reg = <0x00000000 0x00100000>;
  85. label = "u-boot";
  86. };
  87. partition@u-boot-env {
  88. reg = <0x00100000 0x00040000>;
  89. label = "u-boot-env";
  90. };
  91. partition@unused {
  92. reg = <0x00140000 0x00ec0000>;
  93. label = "unused";
  94. };
  95. };
  96. };