armada-388-clearfog-base.dts 1.3 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
  4. *
  5. * Copyright (C) 2015 Russell King
  6. */
  7. /dts-v1/;
  8. #include "armada-388-clearfog.dtsi"
  9. / {
  10. model = "SolidRun Clearfog Base A1";
  11. compatible = "solidrun,clearfog-base-a1",
  12. "solidrun,clearfog-a1", "marvell,armada388",
  13. "marvell,armada385", "marvell,armada380";
  14. gpio-keys {
  15. compatible = "gpio-keys";
  16. pinctrl-0 = <&rear_button_pins>;
  17. pinctrl-names = "default";
  18. button-0 {
  19. /* The rear SW3 button */
  20. label = "Rear Button";
  21. gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
  22. linux,can-disable;
  23. linux,code = <BTN_0>;
  24. };
  25. };
  26. };
  27. &eth1 {
  28. phy = <&phy1>;
  29. };
  30. &gpio0 {
  31. phy1_reset {
  32. gpio-hog;
  33. gpios = <19 GPIO_ACTIVE_LOW>;
  34. output-low;
  35. line-name = "phy1-reset";
  36. };
  37. };
  38. &mdio {
  39. pinctrl-0 = <&mdio_pins &microsom_phy_clk_pins &clearfog_phy_pins>;
  40. phy1: ethernet-phy@1 {
  41. /*
  42. * Annoyingly, the marvell phy driver configures the LED
  43. * register, rather than preserving reset-loaded setting.
  44. * We undo that rubbish here.
  45. */
  46. marvell,reg-init = <3 16 0 0x101e>;
  47. reg = <1>;
  48. };
  49. };
  50. &pinctrl {
  51. /* phy1 reset */
  52. clearfog_phy_pins: clearfog-phy-pins {
  53. marvell,pins = "mpp19";
  54. marvell,function = "gpio";
  55. };
  56. rear_button_pins: rear-button-pins {
  57. marvell,pins = "mpp44";
  58. marvell,function = "gpio";
  59. };
  60. };