am437x-idk-evm.dts 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "am4372.dtsi"
  7. #include <dt-bindings/pinctrl/am43xx.h>
  8. #include <dt-bindings/pwm/pwm.h>
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include <dt-bindings/input/input.h>
  11. / {
  12. model = "TI AM437x Industrial Development Kit";
  13. compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  14. chosen {
  15. stdout-path = &uart0;
  16. };
  17. v24_0d: fixed-regulator-v24_0d {
  18. compatible = "regulator-fixed";
  19. regulator-name = "V24_0D";
  20. regulator-min-microvolt = <24000000>;
  21. regulator-max-microvolt = <24000000>;
  22. regulator-always-on;
  23. regulator-boot-on;
  24. };
  25. v3_3d: fixed-regulator-v3_3d {
  26. compatible = "regulator-fixed";
  27. regulator-name = "V3_3D";
  28. regulator-min-microvolt = <3300000>;
  29. regulator-max-microvolt = <3300000>;
  30. regulator-always-on;
  31. regulator-boot-on;
  32. vin-supply = <&v24_0d>;
  33. };
  34. vdd_corereg: fixed-regulator-vdd_corereg {
  35. compatible = "regulator-fixed";
  36. regulator-name = "VDD_COREREG";
  37. regulator-min-microvolt = <1100000>;
  38. regulator-max-microvolt = <1100000>;
  39. regulator-always-on;
  40. regulator-boot-on;
  41. vin-supply = <&v24_0d>;
  42. };
  43. vdd_core: fixed-regulator-vdd_core {
  44. compatible = "regulator-fixed";
  45. regulator-name = "VDD_CORE";
  46. regulator-min-microvolt = <1100000>;
  47. regulator-max-microvolt = <1100000>;
  48. regulator-always-on;
  49. regulator-boot-on;
  50. vin-supply = <&vdd_corereg>;
  51. };
  52. v1_8dreg: fixed-regulator-v1_8dreg{
  53. compatible = "regulator-fixed";
  54. regulator-name = "V1_8DREG";
  55. regulator-min-microvolt = <1800000>;
  56. regulator-max-microvolt = <1800000>;
  57. regulator-always-on;
  58. regulator-boot-on;
  59. vin-supply = <&v24_0d>;
  60. };
  61. v1_8d: fixed-regulator-v1_8d{
  62. compatible = "regulator-fixed";
  63. regulator-name = "V1_8D";
  64. regulator-min-microvolt = <1800000>;
  65. regulator-max-microvolt = <1800000>;
  66. regulator-always-on;
  67. regulator-boot-on;
  68. vin-supply = <&v1_8dreg>;
  69. };
  70. v1_5dreg: fixed-regulator-v1_5dreg{
  71. compatible = "regulator-fixed";
  72. regulator-name = "V1_5DREG";
  73. regulator-min-microvolt = <1500000>;
  74. regulator-max-microvolt = <1500000>;
  75. regulator-always-on;
  76. regulator-boot-on;
  77. vin-supply = <&v24_0d>;
  78. };
  79. v1_5d: fixed-regulator-v1_5d{
  80. compatible = "regulator-fixed";
  81. regulator-name = "V1_5D";
  82. regulator-min-microvolt = <1500000>;
  83. regulator-max-microvolt = <1500000>;
  84. regulator-always-on;
  85. regulator-boot-on;
  86. vin-supply = <&v1_5dreg>;
  87. };
  88. gpio_keys: gpio-keys {
  89. compatible = "gpio-keys";
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&gpio_keys_pins_default>;
  92. switch-0 {
  93. label = "power-button";
  94. linux,code = <KEY_POWER>;
  95. gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
  96. };
  97. };
  98. /* fixed 32k external oscillator clock */
  99. clk_32k_rtc: clk_32k_rtc {
  100. #clock-cells = <0>;
  101. compatible = "fixed-clock";
  102. clock-frequency = <32768>;
  103. };
  104. leds-iio {
  105. status = "disabled";
  106. compatible = "gpio-leds";
  107. led-out0 {
  108. label = "out0";
  109. gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
  110. default-state = "off";
  111. };
  112. led-out1 {
  113. label = "out1";
  114. gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
  115. default-state = "off";
  116. };
  117. led-out2 {
  118. label = "out2";
  119. gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
  120. default-state = "off";
  121. };
  122. led-out3 {
  123. label = "out3";
  124. gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
  125. default-state = "off";
  126. };
  127. led-out4 {
  128. label = "out4";
  129. gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
  130. default-state = "off";
  131. };
  132. led-out5 {
  133. label = "out5";
  134. gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
  135. default-state = "off";
  136. };
  137. led-out6 {
  138. label = "out6";
  139. gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
  140. default-state = "off";
  141. };
  142. led-out7 {
  143. label = "out7";
  144. gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
  145. default-state = "off";
  146. };
  147. };
  148. };
  149. &am43xx_pinmux {
  150. gpio_keys_pins_default: gpio_keys_pins_default {
  151. pinctrl-single,pins = <
  152. AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
  153. >;
  154. };
  155. i2c0_pins_default: i2c0_pins_default {
  156. pinctrl-single,pins = <
  157. AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  158. AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  159. >;
  160. };
  161. i2c0_pins_sleep: i2c0_pins_sleep {
  162. pinctrl-single,pins = <
  163. AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
  164. AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  165. >;
  166. };
  167. i2c2_pins_default: i2c2_pins_default {
  168. pinctrl-single,pins = <
  169. AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
  170. AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
  171. >;
  172. };
  173. i2c2_pins_sleep: i2c2_pins_sleep {
  174. pinctrl-single,pins = <
  175. AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
  176. AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
  177. >;
  178. };
  179. mmc1_pins_default: pinmux_mmc1_pins_default {
  180. pinctrl-single,pins = <
  181. AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  182. AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  183. AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  184. AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  185. AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  186. AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  187. AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  188. >;
  189. };
  190. mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
  191. pinctrl-single,pins = <
  192. AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
  193. AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
  194. AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
  195. AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
  196. AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
  197. AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
  198. AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
  199. >;
  200. };
  201. spi1_pins_default: spi1_pins_default {
  202. pinctrl-single,pins = <
  203. AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */
  204. AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */
  205. AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */
  206. AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */
  207. >;
  208. };
  209. spi1_pins_sleep: spi1_pins_sleep {
  210. pinctrl-single,pins = <
  211. AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
  212. AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
  213. AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
  214. AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  215. >;
  216. };
  217. ecap0_pins_default: backlight_pins_default {
  218. pinctrl-single,pins = <
  219. AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
  220. >;
  221. };
  222. cpsw_default: cpsw_default {
  223. pinctrl-single,pins = <
  224. AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  225. AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  226. AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  227. AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  228. AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
  229. AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
  230. AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
  231. AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  232. AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  233. AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  234. AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
  235. AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
  236. >;
  237. };
  238. cpsw_sleep: cpsw_sleep {
  239. pinctrl-single,pins = <
  240. AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  241. AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
  242. AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
  243. AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
  244. AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
  245. AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  246. AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
  247. AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
  248. AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
  249. AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  250. AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
  251. AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
  252. >;
  253. };
  254. davinci_mdio_default: davinci_mdio_default {
  255. pinctrl-single,pins = <
  256. /* MDIO */
  257. AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  258. AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  259. >;
  260. };
  261. davinci_mdio_sleep: davinci_mdio_sleep {
  262. pinctrl-single,pins = <
  263. /* MDIO reset value */
  264. AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
  265. AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  266. >;
  267. };
  268. qspi_pins_default: qspi_pins_default {
  269. pinctrl-single,pins = <
  270. AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
  271. AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
  272. AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
  273. AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
  274. AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
  275. AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
  276. >;
  277. };
  278. qspi_pins_sleep: qspi_pins_sleep{
  279. pinctrl-single,pins = <
  280. AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  281. AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
  282. AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
  283. AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
  284. AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
  285. AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
  286. >;
  287. };
  288. };
  289. &i2c0 {
  290. status = "okay";
  291. pinctrl-names = "default", "sleep";
  292. pinctrl-0 = <&i2c0_pins_default>;
  293. pinctrl-1 = <&i2c0_pins_sleep>;
  294. clock-frequency = <400000>;
  295. at24@50 {
  296. compatible = "atmel,24c256";
  297. pagesize = <64>;
  298. reg = <0x50>;
  299. };
  300. tps: tps62362@60 {
  301. compatible = "ti,tps62362";
  302. reg = <0x60>;
  303. regulator-name = "VDD_MPU";
  304. regulator-min-microvolt = <950000>;
  305. regulator-max-microvolt = <1330000>;
  306. regulator-boot-on;
  307. regulator-always-on;
  308. ti,vsel0-state-high;
  309. ti,vsel1-state-high;
  310. vin-supply = <&v3_3d>;
  311. };
  312. };
  313. &i2c2 {
  314. status = "okay";
  315. pinctrl-names = "default", "sleep";
  316. pinctrl-0 = <&i2c2_pins_default>;
  317. pinctrl-1 = <&i2c2_pins_sleep>;
  318. clock-frequency = <100000>;
  319. tpic2810: tpic2810@60 {
  320. compatible = "ti,tpic2810";
  321. reg = <0x60>;
  322. gpio-controller;
  323. #gpio-cells = <2>;
  324. };
  325. };
  326. &spi1 {
  327. status = "okay";
  328. pinctrl-names = "default", "sleep";
  329. pinctrl-0 = <&spi1_pins_default>;
  330. pinctrl-1 = <&spi1_pins_sleep>;
  331. ti,pindir-d0-out-d1-in;
  332. sn65hvs882: sn65hvs882@0 {
  333. compatible = "pisosr-gpio";
  334. gpio-controller;
  335. #gpio-cells = <2>;
  336. load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
  337. reg = <0>;
  338. spi-max-frequency = <1000000>;
  339. spi-cpol;
  340. };
  341. };
  342. &epwmss0 {
  343. status = "okay";
  344. };
  345. &ecap0 {
  346. status = "okay";
  347. pinctrl-names = "default";
  348. pinctrl-0 = <&ecap0_pins_default>;
  349. };
  350. &gpio0 {
  351. status = "okay";
  352. };
  353. &gpio1 {
  354. status = "okay";
  355. };
  356. &gpio3 {
  357. status = "okay";
  358. };
  359. &gpio4 {
  360. status = "okay";
  361. };
  362. &gpio5 {
  363. status = "okay";
  364. };
  365. &mmc1 {
  366. status = "okay";
  367. pinctrl-names = "default", "sleep";
  368. pinctrl-0 = <&mmc1_pins_default>;
  369. pinctrl-1 = <&mmc1_pins_sleep>;
  370. vmmc-supply = <&v3_3d>;
  371. bus-width = <4>;
  372. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  373. };
  374. &qspi {
  375. status = "okay";
  376. pinctrl-names = "default", "sleep";
  377. pinctrl-0 = <&qspi_pins_default>;
  378. pinctrl-1 = <&qspi_pins_sleep>;
  379. spi-max-frequency = <48000000>;
  380. flash@0 {
  381. compatible = "mx66l51235l";
  382. spi-max-frequency = <48000000>;
  383. reg = <0>;
  384. spi-cpol;
  385. spi-cpha;
  386. spi-tx-bus-width = <1>;
  387. spi-rx-bus-width = <4>;
  388. #address-cells = <1>;
  389. #size-cells = <1>;
  390. /*
  391. * MTD partition table. The ROM checks the first 512KiB for a
  392. * valid file to boot(XIP).
  393. */
  394. partition@0 {
  395. label = "QSPI.U_BOOT";
  396. reg = <0x00000000 0x000080000>;
  397. };
  398. partition@1 {
  399. label = "QSPI.U_BOOT.backup";
  400. reg = <0x00080000 0x00080000>;
  401. };
  402. partition@2 {
  403. label = "QSPI.U-BOOT-SPL_OS";
  404. reg = <0x00100000 0x00010000>;
  405. };
  406. partition@3 {
  407. label = "QSPI.U_BOOT_ENV";
  408. reg = <0x00110000 0x00010000>;
  409. };
  410. partition@4 {
  411. label = "QSPI.U-BOOT-ENV.backup";
  412. reg = <0x00120000 0x00010000>;
  413. };
  414. partition@5 {
  415. label = "QSPI.KERNEL";
  416. reg = <0x00130000 0x0800000>;
  417. };
  418. partition@6 {
  419. label = "QSPI.FILESYSTEM";
  420. reg = <0x00930000 0x36D0000>;
  421. };
  422. };
  423. };
  424. &mac_sw {
  425. pinctrl-names = "default", "sleep";
  426. pinctrl-0 = <&cpsw_default>;
  427. pinctrl-1 = <&cpsw_sleep>;
  428. status = "okay";
  429. };
  430. &davinci_mdio_sw {
  431. pinctrl-names = "default", "sleep";
  432. pinctrl-0 = <&davinci_mdio_default>;
  433. pinctrl-1 = <&davinci_mdio_sleep>;
  434. ethphy0: ethernet-phy@0 {
  435. reg = <0>;
  436. };
  437. };
  438. &cpsw_port1 {
  439. phy-handle = <&ethphy0>;
  440. phy-mode = "rgmii-rxid";
  441. ti,dual-emac-pvid = <1>;
  442. };
  443. &cpsw_port2 {
  444. status = "disabled";
  445. };
  446. &rtc {
  447. clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
  448. clock-names = "ext-clk", "int-clk";
  449. status = "okay";
  450. };
  451. &wdt {
  452. status = "okay";
  453. };
  454. &cpu {
  455. cpu0-supply = <&tps>;
  456. };
  457. &cpu0_opp_table {
  458. /*
  459. * Supply voltage supervisor on board will not allow opp50 so
  460. * disable it and set opp100 as suspend OPP.
  461. */
  462. opp50-300000000 {
  463. status = "disabled";
  464. };
  465. opp100-600000000 {
  466. opp-suspend;
  467. };
  468. };
  469. &pruss1_mdio {
  470. status = "disabled";
  471. };