am335x-osd3358-sm-red.dts 13 KB

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  1. //SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (C) 2018 Octavo Systems LLC - https://www.octavosystems.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. #include "am335x-osd335x-common.dtsi"
  11. #include <dt-bindings/interrupt-controller/irq.h>
  12. #include <dt-bindings/display/tda998x.h>
  13. / {
  14. model = "Octavo Systems OSD3358-SM-RED";
  15. compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  16. };
  17. &ldo3_reg {
  18. regulator-min-microvolt = <1800000>;
  19. regulator-max-microvolt = <1800000>;
  20. regulator-always-on;
  21. };
  22. &mmc2 {
  23. vmmc-supply = <&vmmcsd_fixed>;
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&emmc_pins>;
  26. bus-width = <8>;
  27. status = "okay";
  28. };
  29. &lcdc {
  30. status = "okay";
  31. /* If you want to get 24 bit RGB and 16 BGR mode instead of
  32. * current 16 bit RGB and 24 BGR modes, set the propety
  33. * below to "crossed" and uncomment the video-ports -property
  34. * in tda19988 node.
  35. * AM335x errata for wiring:
  36. * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf
  37. */
  38. blue-and-red-wiring = "straight";
  39. port {
  40. lcdc_0: endpoint {
  41. remote-endpoint = <&hdmi_0>;
  42. };
  43. };
  44. };
  45. &i2c0 {
  46. tda19988: hdmi-encoder@70 {
  47. compatible = "nxp,tda998x";
  48. reg = <0x70>;
  49. pinctrl-names = "default", "off";
  50. pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
  51. pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
  52. /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
  53. /* video-ports = <0x234501>; */
  54. #sound-dai-cells = <0>;
  55. audio-ports = < TDA998x_I2S 0x03>;
  56. port {
  57. hdmi_0: endpoint {
  58. remote-endpoint = <&lcdc_0>;
  59. };
  60. };
  61. };
  62. mpu9250: imu@68 {
  63. compatible = "invensense,mpu6050";
  64. reg = <0x68>;
  65. interrupt-parent = <&gpio3>;
  66. interrupts = <21 IRQ_TYPE_EDGE_RISING>;
  67. i2c-gate {
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. ax8975@c {
  71. compatible = "asahi-kasei,ak8975";
  72. reg = <0x0c>;
  73. };
  74. };
  75. /*invensense,int_config = <0x10>;
  76. invensense,level_shifter = <0>;
  77. invensense,orientation = [01 00 00 00 01 00 00 00 01];
  78. invensense,sec_slave_type = <0>;
  79. invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/
  80. };
  81. bmp280: pressure@76 {
  82. compatible = "bosch,bmp280";
  83. reg = <0x76>;
  84. };
  85. };
  86. &mcasp0 {
  87. #sound-dai-cells = <0>;
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&mcasp0_pins>;
  90. status = "okay";
  91. op-mode = <0>; /* MCASP_IIS_MODE */
  92. tdm-slots = <2>;
  93. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  94. 0 0 1 0
  95. >;
  96. tx-num-evt = <32>;
  97. rx-num-evt = <32>;
  98. };
  99. / {
  100. clk_mcasp0_fixed: clk-mcasp0-fixed {
  101. #clock-cells = <0>;
  102. compatible = "fixed-clock";
  103. clock-frequency = <24576000>;
  104. };
  105. clk_mcasp0: clk-mcasp0 {
  106. #clock-cells = <0>;
  107. compatible = "gpio-gate-clock";
  108. clocks = <&clk_mcasp0_fixed>;
  109. enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
  110. };
  111. sound {
  112. compatible = "simple-audio-card";
  113. simple-audio-card,name = "TI BeagleBone Black";
  114. simple-audio-card,format = "i2s";
  115. simple-audio-card,bitclock-master = <&dailink0_master>;
  116. simple-audio-card,frame-master = <&dailink0_master>;
  117. dailink0_master: simple-audio-card,cpu {
  118. sound-dai = <&mcasp0>;
  119. clocks = <&clk_mcasp0>;
  120. };
  121. simple-audio-card,codec {
  122. sound-dai = <&tda19988>;
  123. };
  124. };
  125. chosen {
  126. stdout-path = &uart0;
  127. };
  128. leds {
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&user_leds_s0>;
  131. compatible = "gpio-leds";
  132. led2 {
  133. label = "beaglebone:green:usr0";
  134. gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
  135. linux,default-trigger = "heartbeat";
  136. default-state = "off";
  137. };
  138. led3 {
  139. label = "beaglebone:green:usr1";
  140. gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
  141. linux,default-trigger = "mmc0";
  142. default-state = "off";
  143. };
  144. led4 {
  145. label = "beaglebone:green:usr2";
  146. gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
  147. linux,default-trigger = "cpu0";
  148. default-state = "off";
  149. };
  150. led5 {
  151. label = "beaglebone:green:usr3";
  152. gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
  153. linux,default-trigger = "mmc1";
  154. default-state = "off";
  155. };
  156. };
  157. vmmcsd_fixed: fixedregulator0 {
  158. compatible = "regulator-fixed";
  159. regulator-name = "vmmcsd_fixed";
  160. regulator-min-microvolt = <3300000>;
  161. regulator-max-microvolt = <3300000>;
  162. };
  163. };
  164. &am33xx_pinmux {
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&clkout2_pin>;
  167. nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
  168. pinctrl-single,pins = <
  169. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
  170. AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
  171. AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
  172. AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
  173. AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
  174. AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
  175. AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
  176. AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
  177. AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
  178. AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
  179. AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
  180. AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
  181. AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
  182. AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
  183. AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
  184. AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
  185. AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
  186. AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  187. AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  188. AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  189. AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  190. >;
  191. };
  192. nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
  193. pinctrl-single,pins = <
  194. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
  195. >;
  196. };
  197. mcasp0_pins: mcasp0-pins {
  198. pinctrl-single,pins = <
  199. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
  200. AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
  201. AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
  202. AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  203. AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
  204. >;
  205. };
  206. flash_enable: flash-enable {
  207. pinctrl-single,pins = <
  208. AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
  209. >;
  210. };
  211. imu_interrupt: imu-interrupt {
  212. pinctrl-single,pins = <
  213. AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */
  214. >;
  215. };
  216. ethernet_interrupt: ethernet-interrupt{
  217. pinctrl-single,pins = <
  218. AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */
  219. >;
  220. };
  221. user_leds_s0: user-leds-s0 {
  222. pinctrl-single,pins = <
  223. AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
  224. AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
  225. AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
  226. AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
  227. >;
  228. };
  229. i2c2_pins: pinmux-i2c2-pins {
  230. pinctrl-single,pins = <
  231. AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
  232. AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
  233. >;
  234. };
  235. uart0_pins: pinmux-uart0-pins {
  236. pinctrl-single,pins = <
  237. AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
  238. AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
  239. >;
  240. };
  241. clkout2_pin: pinmux-clkout2-pin {
  242. pinctrl-single,pins = <
  243. AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
  244. >;
  245. };
  246. cpsw_default: cpsw-default {
  247. pinctrl-single,pins = <
  248. /* Slave 1 */
  249. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  250. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  251. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  252. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  253. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  254. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  255. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
  256. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
  257. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
  258. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
  259. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
  260. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
  261. >;
  262. };
  263. cpsw_sleep: cpsw-sleep {
  264. pinctrl-single,pins = <
  265. /* Slave 1 reset value */
  266. AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
  267. AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
  268. AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  269. AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  270. AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  271. AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  272. AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  273. AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
  274. AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
  275. AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
  276. AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
  277. AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
  278. >;
  279. };
  280. davinci_mdio_default: davinci-mdio-default {
  281. pinctrl-single,pins = <
  282. /* MDIO */
  283. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
  284. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
  285. >;
  286. };
  287. davinci_mdio_sleep: davinci-mdio-sleep {
  288. pinctrl-single,pins = <
  289. /* MDIO reset value */
  290. AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
  291. AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
  292. >;
  293. };
  294. mmc1_pins: pinmux-mmc1-pins {
  295. pinctrl-single,pins = <
  296. AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
  297. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
  298. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
  299. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
  300. AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
  301. AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
  302. AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
  303. >;
  304. };
  305. emmc_pins: pinmux-emmc-pins {
  306. pinctrl-single,pins = <
  307. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
  308. AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
  309. AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
  310. AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
  311. AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
  312. AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
  313. AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
  314. AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
  315. AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
  316. AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
  317. >;
  318. };
  319. };
  320. &uart0 {
  321. pinctrl-names = "default";
  322. pinctrl-0 = <&uart0_pins>;
  323. status = "okay";
  324. };
  325. &usb0 {
  326. dr_mode = "peripheral";
  327. interrupts-extended = <&intc 18 &tps 0>;
  328. interrupt-names = "mc", "vbus";
  329. };
  330. &usb1 {
  331. dr_mode = "host";
  332. };
  333. &i2c2 {
  334. pinctrl-names = "default";
  335. pinctrl-0 = <&i2c2_pins>;
  336. status = "okay";
  337. clock-frequency = <100000>;
  338. };
  339. &cpsw_port1 {
  340. phy-handle = <&ethphy0>;
  341. phy-mode = "rgmii-txid";
  342. ti,dual-emac-pvid = <1>;
  343. };
  344. &cpsw_port2 {
  345. status = "disabled";
  346. };
  347. &mac_sw {
  348. pinctrl-names = "default", "sleep";
  349. pinctrl-0 = <&cpsw_default>;
  350. pinctrl-1 = <&cpsw_sleep>;
  351. status = "okay";
  352. };
  353. &davinci_mdio_sw {
  354. pinctrl-names = "default", "sleep";
  355. pinctrl-0 = <&davinci_mdio_default>;
  356. pinctrl-1 = <&davinci_mdio_sleep>;
  357. ethphy0: ethernet-phy@4 {
  358. reg = <4>;
  359. };
  360. };
  361. &mmc1 {
  362. status = "okay";
  363. vmmc-supply = <&vmmcsd_fixed>;
  364. bus-width = <0x4>;
  365. pinctrl-names = "default";
  366. pinctrl-0 = <&mmc1_pins>;
  367. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  368. };
  369. &rtc {
  370. system-power-controller;
  371. clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
  372. clock-names = "ext-clk", "int-clk";
  373. };