am335x-boneblack.dts 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
  4. */
  5. /dts-v1/;
  6. #include "am33xx.dtsi"
  7. #include "am335x-bone-common.dtsi"
  8. #include "am335x-boneblack-common.dtsi"
  9. #include "am335x-boneblack-hdmi.dtsi"
  10. / {
  11. model = "TI AM335x BeagleBone Black";
  12. compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  13. };
  14. &cpu0_opp_table {
  15. /*
  16. * All PG 2.0 silicon may not support 1GHz but some of the early
  17. * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
  18. * to support 1GHz OPP so enable it for PG 2.0 on this board.
  19. */
  20. oppnitro-1000000000 {
  21. opp-supported-hw = <0x06 0x0100>;
  22. };
  23. };
  24. &gpio0 {
  25. gpio-line-names =
  26. "[mdio_data]",
  27. "[mdio_clk]",
  28. "P9_22 [spi0_sclk]",
  29. "P9_21 [spi0_d0]",
  30. "P9_18 [spi0_d1]",
  31. "P9_17 [spi0_cs0]",
  32. "[mmc0_cd]",
  33. "P8_42A [ecappwm0]",
  34. "P8_35 [lcd d12]",
  35. "P8_33 [lcd d13]",
  36. "P8_31 [lcd d14]",
  37. "P8_32 [lcd d15]",
  38. "P9_20 [i2c2_sda]",
  39. "P9_19 [i2c2_scl]",
  40. "P9_26 [uart1_rxd]",
  41. "P9_24 [uart1_txd]",
  42. "[rmii1_txd3]",
  43. "[rmii1_txd2]",
  44. "[usb0_drvvbus]",
  45. "[hdmi cec]",
  46. "P9_41B",
  47. "[rmii1_txd1]",
  48. "P8_19 [ehrpwm2a]",
  49. "P8_13 [ehrpwm2b]",
  50. "NC",
  51. "NC",
  52. "P8_14",
  53. "P8_17",
  54. "[rmii1_txd0]",
  55. "[rmii1_refclk]",
  56. "P9_11 [uart4_rxd]",
  57. "P9_13 [uart4_txd]";
  58. };
  59. &gpio1 {
  60. gpio-line-names =
  61. "P8_25 [mmc1_dat0]",
  62. "[mmc1_dat1]",
  63. "P8_5 [mmc1_dat2]",
  64. "P8_6 [mmc1_dat3]",
  65. "P8_23 [mmc1_dat4]",
  66. "P8_22 [mmc1_dat5]",
  67. "P8_3 [mmc1_dat6]",
  68. "P8_4 [mmc1_dat7]",
  69. "NC",
  70. "NC",
  71. "NC",
  72. "NC",
  73. "P8_12",
  74. "P8_11",
  75. "P8_16",
  76. "P8_15",
  77. "P9_15A",
  78. "P9_23",
  79. "P9_14 [ehrpwm1a]",
  80. "P9_16 [ehrpwm1b]",
  81. "[emmc rst]",
  82. "[usr0 led]",
  83. "[usr1 led]",
  84. "[usr2 led]",
  85. "[usr3 led]",
  86. "[hdmi irq]",
  87. "[usb vbus oc]",
  88. "[hdmi audio]",
  89. "P9_12",
  90. "P8_26",
  91. "P8_21 [emmc]",
  92. "P8_20 [emmc]";
  93. };
  94. &gpio2 {
  95. gpio-line-names =
  96. "P9_15B",
  97. "P8_18",
  98. "P8_7",
  99. "P8_8",
  100. "P8_10",
  101. "P8_9",
  102. "P8_45 [hdmi]",
  103. "P8_46 [hdmi]",
  104. "P8_43 [hdmi]",
  105. "P8_44 [hdmi]",
  106. "P8_41 [hdmi]",
  107. "P8_42 [hdmi]",
  108. "P8_39 [hdmi]",
  109. "P8_40 [hdmi]",
  110. "P8_37 [hdmi]",
  111. "P8_38 [hdmi]",
  112. "P8_36 [hdmi]",
  113. "P8_34 [hdmi]",
  114. "[rmii1_rxd3]",
  115. "[rmii1_rxd2]",
  116. "[rmii1_rxd1]",
  117. "[rmii1_rxd0]",
  118. "P8_27 [hdmi]",
  119. "P8_29 [hdmi]",
  120. "P8_28 [hdmi]",
  121. "P8_30 [hdmi]",
  122. "[mmc0_dat3]",
  123. "[mmc0_dat2]",
  124. "[mmc0_dat1]",
  125. "[mmc0_dat0]",
  126. "[mmc0_clk]",
  127. "[mmc0_cmd]";
  128. };
  129. &gpio3 {
  130. gpio-line-names =
  131. "[mii col]",
  132. "[mii crs]",
  133. "[mii rx err]",
  134. "[mii tx en]",
  135. "[mii rx dv]",
  136. "[i2c0 sda]",
  137. "[i2c0 scl]",
  138. "[jtag emu0]",
  139. "[jtag emu1]",
  140. "[mii tx clk]",
  141. "[mii rx clk]",
  142. "NC",
  143. "NC",
  144. "[usb vbus en]",
  145. "P9_31 [spi1_sclk]",
  146. "P9_29 [spi1_d0]",
  147. "P9_30 [spi1_d1]",
  148. "P9_28 [spi1_cs0]",
  149. "P9_42B [ecappwm0]",
  150. "P9_27",
  151. "P9_41A",
  152. "P9_25",
  153. "NC",
  154. "NC",
  155. "NC",
  156. "NC",
  157. "NC",
  158. "NC",
  159. "NC",
  160. "NC",
  161. "NC",
  162. "NC";
  163. };
  164. &baseboard_eeprom {
  165. vcc-supply = <&ldo4_reg>;
  166. };