memcpy.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * linux/arch/alpha/lib/memcpy.c
  4. *
  5. * Copyright (C) 1995 Linus Torvalds
  6. */
  7. /*
  8. * This is a reasonably optimized memcpy() routine.
  9. */
  10. /*
  11. * Note that the C code is written to be optimized into good assembly. However,
  12. * at this point gcc is unable to sanely compile "if (n >= 0)", resulting in a
  13. * explicit compare against 0 (instead of just using the proper "blt reg, xx" or
  14. * "bge reg, xx"). I hope alpha-gcc will be fixed to notice this eventually..
  15. */
  16. #include <linux/types.h>
  17. #include <linux/export.h>
  18. /*
  19. * This should be done in one go with ldq_u*2/mask/stq_u. Do it
  20. * with a macro so that we can fix it up later..
  21. */
  22. #define ALIGN_DEST_TO8_UP(d,s,n) \
  23. while (d & 7) { \
  24. if (n <= 0) return; \
  25. n--; \
  26. *(char *) d = *(char *) s; \
  27. d++; s++; \
  28. }
  29. #define ALIGN_DEST_TO8_DN(d,s,n) \
  30. while (d & 7) { \
  31. if (n <= 0) return; \
  32. n--; \
  33. d--; s--; \
  34. *(char *) d = *(char *) s; \
  35. }
  36. /*
  37. * This should similarly be done with ldq_u*2/mask/stq. The destination
  38. * is aligned, but we don't fill in a full quad-word
  39. */
  40. #define DO_REST_UP(d,s,n) \
  41. while (n > 0) { \
  42. n--; \
  43. *(char *) d = *(char *) s; \
  44. d++; s++; \
  45. }
  46. #define DO_REST_DN(d,s,n) \
  47. while (n > 0) { \
  48. n--; \
  49. d--; s--; \
  50. *(char *) d = *(char *) s; \
  51. }
  52. /*
  53. * This should be done with ldq/mask/stq. The source and destination are
  54. * aligned, but we don't fill in a full quad-word
  55. */
  56. #define DO_REST_ALIGNED_UP(d,s,n) DO_REST_UP(d,s,n)
  57. #define DO_REST_ALIGNED_DN(d,s,n) DO_REST_DN(d,s,n)
  58. /*
  59. * This does unaligned memory copies. We want to avoid storing to
  60. * an unaligned address, as that would do a read-modify-write cycle.
  61. * We also want to avoid double-reading the unaligned reads.
  62. *
  63. * Note the ordering to try to avoid load (and address generation) latencies.
  64. */
  65. static inline void __memcpy_unaligned_up (unsigned long d, unsigned long s,
  66. long n)
  67. {
  68. ALIGN_DEST_TO8_UP(d,s,n);
  69. n -= 8; /* to avoid compare against 8 in the loop */
  70. if (n >= 0) {
  71. unsigned long low_word, high_word;
  72. __asm__("ldq_u %0,%1":"=r" (low_word):"m" (*(unsigned long *) s));
  73. do {
  74. unsigned long tmp;
  75. __asm__("ldq_u %0,%1":"=r" (high_word):"m" (*(unsigned long *)(s+8)));
  76. n -= 8;
  77. __asm__("extql %1,%2,%0"
  78. :"=r" (low_word)
  79. :"r" (low_word), "r" (s));
  80. __asm__("extqh %1,%2,%0"
  81. :"=r" (tmp)
  82. :"r" (high_word), "r" (s));
  83. s += 8;
  84. *(unsigned long *) d = low_word | tmp;
  85. d += 8;
  86. low_word = high_word;
  87. } while (n >= 0);
  88. }
  89. n += 8;
  90. DO_REST_UP(d,s,n);
  91. }
  92. static inline void __memcpy_unaligned_dn (unsigned long d, unsigned long s,
  93. long n)
  94. {
  95. /* I don't understand AXP assembler well enough for this. -Tim */
  96. s += n;
  97. d += n;
  98. while (n--)
  99. * (char *) --d = * (char *) --s;
  100. }
  101. /*
  102. * Hmm.. Strange. The __asm__ here is there to make gcc use an integer register
  103. * for the load-store. I don't know why, but it would seem that using a floating
  104. * point register for the move seems to slow things down (very small difference,
  105. * though).
  106. *
  107. * Note the ordering to try to avoid load (and address generation) latencies.
  108. */
  109. static inline void __memcpy_aligned_up (unsigned long d, unsigned long s,
  110. long n)
  111. {
  112. ALIGN_DEST_TO8_UP(d,s,n);
  113. n -= 8;
  114. while (n >= 0) {
  115. unsigned long tmp;
  116. __asm__("ldq %0,%1":"=r" (tmp):"m" (*(unsigned long *) s));
  117. n -= 8;
  118. s += 8;
  119. *(unsigned long *) d = tmp;
  120. d += 8;
  121. }
  122. n += 8;
  123. DO_REST_ALIGNED_UP(d,s,n);
  124. }
  125. static inline void __memcpy_aligned_dn (unsigned long d, unsigned long s,
  126. long n)
  127. {
  128. s += n;
  129. d += n;
  130. ALIGN_DEST_TO8_DN(d,s,n);
  131. n -= 8;
  132. while (n >= 0) {
  133. unsigned long tmp;
  134. s -= 8;
  135. __asm__("ldq %0,%1":"=r" (tmp):"m" (*(unsigned long *) s));
  136. n -= 8;
  137. d -= 8;
  138. *(unsigned long *) d = tmp;
  139. }
  140. n += 8;
  141. DO_REST_ALIGNED_DN(d,s,n);
  142. }
  143. void * memcpy(void * dest, const void *src, size_t n)
  144. {
  145. if (!(((unsigned long) dest ^ (unsigned long) src) & 7)) {
  146. __memcpy_aligned_up ((unsigned long) dest, (unsigned long) src,
  147. n);
  148. return dest;
  149. }
  150. __memcpy_unaligned_up ((unsigned long) dest, (unsigned long) src, n);
  151. return dest;
  152. }
  153. EXPORT_SYMBOL(memcpy);